From: Rafael J. Wysocki Date: Thu, 5 May 2022 18:10:43 +0000 (+0200) Subject: PCI/PM: Write 0 to PMCSR in pci_power_up() in all cases X-Git-Url: http://git.maquefel.me/?a=commitdiff_plain;h=f0881d38c7eca3351f59d551604aaf74283c2e13;p=linux.git PCI/PM: Write 0 to PMCSR in pci_power_up() in all cases Make pci_power_up() write 0 to the device's PCI_PM_CTRL register in order to put it into D0 regardless of the power state returned by the previous read from that register which should not matter. Link: https://lore.kernel.org/r/5748066.MhkbZ0Pkbq@kreacher Signed-off-by: Rafael J. Wysocki Signed-off-by: Bjorn Helgaas --- diff --git a/drivers/pci/pci.c b/drivers/pci/pci.c index a5b93f85377ab..5cce2cae09339 100644 --- a/drivers/pci/pci.c +++ b/drivers/pci/pci.c @@ -1230,15 +1230,10 @@ int pci_power_up(struct pci_dev *dev) } /* - * If we're (effectively) in D3, force entire word to 0. This doesn't - * affect PME_Status, disables PME_En, and sets PowerState to 0. + * Force the entire word to 0. This doesn't affect PME_Status, disables + * PME_En, and sets PowerState to 0. */ - if (state == PCI_D3hot) - pmcsr = 0; - else - pmcsr &= ~PCI_PM_CTRL_STATE_MASK; - - pci_write_config_word(dev, dev->pm_cap + PCI_PM_CTRL, pmcsr); + pci_write_config_word(dev, dev->pm_cap + PCI_PM_CTRL, 0); /* Mandatory transition delays; see PCI PM 1.2. */ if (state == PCI_D3hot)