From: Vasily Khoruzhick <anarsoul@gmail.com>
Date: Wed, 8 Jan 2020 04:20:15 +0000 (-0800)
Subject: arm64: dts: allwinner: a64: add CPU clock to CPU0-3 nodes
X-Git-Url: http://git.maquefel.me/?a=commitdiff_plain;h=f267eff70c0c4f51765fcb2498444d7bc0048725;p=linux.git

arm64: dts: allwinner: a64: add CPU clock to CPU0-3 nodes

Add CPU clock to the CPU nodes since it is a prerequisite for enabling
DVFS.

Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com>
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
[wens@csie.org: Replace CLK_CPUX macro with raw number]
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
---

diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
index 293059ffbbf62..72eedd39a2ebb 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
@@ -51,6 +51,8 @@
 			reg = <0>;
 			enable-method = "psci";
 			next-level-cache = <&L2>;
+			clocks = <&ccu 21>;
+			clock-names = "cpu";
 		};
 
 		cpu1: cpu@1 {
@@ -59,6 +61,8 @@
 			reg = <1>;
 			enable-method = "psci";
 			next-level-cache = <&L2>;
+			clocks = <&ccu 21>;
+			clock-names = "cpu";
 		};
 
 		cpu2: cpu@2 {
@@ -67,6 +71,8 @@
 			reg = <2>;
 			enable-method = "psci";
 			next-level-cache = <&L2>;
+			clocks = <&ccu 21>;
+			clock-names = "cpu";
 		};
 
 		cpu3: cpu@3 {
@@ -75,6 +81,8 @@
 			reg = <3>;
 			enable-method = "psci";
 			next-level-cache = <&L2>;
+			clocks = <&ccu 21>;
+			clock-names = "cpu";
 		};
 
 		L2: l2-cache {