From: Amit Kucheria Date: Wed, 18 Jul 2018 06:43:10 +0000 (+0530) Subject: arm64: dts: msm8996: thermal: Initialise via DT and add second controller X-Git-Url: http://git.maquefel.me/?a=commitdiff_plain;h=f35c11b03b44d68d7d0688e30f4a9a18a3a334d5;p=linux.git arm64: dts: msm8996: thermal: Initialise via DT and add second controller We also split up the regmap address space into two, for the TM and SROT registers. This was required to deal with different address offsets for the TM and SROT registers across different SoC families. 8996 has two TSENS IP blocks, initialise the second one too. Since tsens-common.c/init_common() currently only registers one address space, the order is important (TM before SROT). This is OK since the code doesn't really use the SROT functionality yet. Signed-off-by: Amit Kucheria Reviewed-by: Bjorn Andersson Tested-by: Matthias Kaehlcke Reviewed-by: Matthias Kaehlcke Reviewed-by: Douglas Anderson Signed-off-by: Andy Gross --- diff --git a/arch/arm64/boot/dts/qcom/msm8996.dtsi b/arch/arm64/boot/dts/qcom/msm8996.dtsi index 8c7f9ca25b534..cd3865e7a270b 100644 --- a/arch/arm64/boot/dts/qcom/msm8996.dtsi +++ b/arch/arm64/boot/dts/qcom/msm8996.dtsi @@ -377,6 +377,22 @@ reg = <0x740000 0x20000>; }; + tsens0: thermal-sensor@4a9000 { + compatible = "qcom,msm8996-tsens"; + reg = <0x4a9000 0x1000>, /* TM */ + <0x4a8000 0x1000>; /* SROT */ + #qcom,sensors = <13>; + #thermal-sensor-cells = <1>; + }; + + tsens1: thermal-sensor@4ad000 { + compatible = "qcom,msm8996-tsens"; + reg = <0x4ad000 0x1000>, /* TM */ + <0x4ac000 0x1000>; /* SROT */ + #qcom,sensors = <8>; + #thermal-sensor-cells = <1>; + }; + tcsr: syscon@7a0000 { compatible = "qcom,tcsr-msm8996", "syscon"; reg = <0x7a0000 0x18000>; @@ -459,12 +475,6 @@ status = "disabled"; }; - tsens0: thermal-sensor@4a8000 { - compatible = "qcom,msm8996-tsens"; - reg = <0x4a8000 0x2000>; - #thermal-sensor-cells = <1>; - }; - blsp2_uart1: serial@75b0000 { compatible = "qcom,msm-uartdm-v1.4", "qcom,msm-uartdm"; reg = <0x75b0000 0x1000>;