From: Alim Akhtar Date: Mon, 21 Feb 2022 17:45:46 +0000 (+0530) Subject: clocksource/drivers/exynos_mct: Bump up mct max irq number X-Git-Url: http://git.maquefel.me/?a=commitdiff_plain;h=f49b82a0a54fa85451ed96c35f24679522d59c7a;p=linux.git clocksource/drivers/exynos_mct: Bump up mct max irq number Bump-up maximum number of MCT IRQ to match the binding documentation. This make driver scalable for SoC which has more than 12 timer irqs, like recently added FSD SoC. Reviewed-by: Krzysztof Kozlowski Signed-off-by: Alim Akhtar Link: https://lore.kernel.org/r/20220221174547.26176-2-alim.akhtar@samsung.com Signed-off-by: Daniel Lezcano --- diff --git a/drivers/clocksource/exynos_mct.c b/drivers/clocksource/exynos_mct.c index 341ee47ba35bb..bcf21006ebd88 100644 --- a/drivers/clocksource/exynos_mct.c +++ b/drivers/clocksource/exynos_mct.c @@ -64,7 +64,8 @@ #define MCT_G0_IRQ 0 /* Local timers count starts after global timer count */ #define MCT_L0_IRQ 4 -#define MCT_NR_IRQS 12 +/* Max number of IRQ as per DT binding document */ +#define MCT_NR_IRQS 20 enum { MCT_INT_SPI,