From: Chris Packham Date: Fri, 4 May 2018 03:06:37 +0000 (+1200) Subject: pinctrl: mvebu: update use "nand" function for "rb" pin X-Git-Url: http://git.maquefel.me/?a=commitdiff_plain;h=f61f5a2174cd7534f128dc26e2fe7de56cb08a3c;p=linux.git pinctrl: mvebu: update use "nand" function for "rb" pin The Armada 98dx3236 SoCs don't have a different MPP sel value for nand specific pins so "dev" was technically correct. But all the other Armada SoCs use "nand" in their dts and the pin is specific to the nand interface so use "nand" for the function name. Signed-off-by: Chris Packham Acked-by: Gregory CLEMENT Signed-off-by: Linus Walleij --- diff --git a/drivers/pinctrl/mvebu/pinctrl-armada-xp.c b/drivers/pinctrl/mvebu/pinctrl-armada-xp.c index e732f3a1efb71..5e828468e43da 100644 --- a/drivers/pinctrl/mvebu/pinctrl-armada-xp.c +++ b/drivers/pinctrl/mvebu/pinctrl-armada-xp.c @@ -431,7 +431,7 @@ static struct mvebu_mpp_mode mv98dx3236_mpp_modes[] = { MPP_MODE(19, MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_98DX3236_PLUS), MPP_VAR_FUNCTION(0x3, "uart1", "rxd", V_98DX3236_PLUS), - MPP_VAR_FUNCTION(0x4, "dev", "rb", V_98DX3236_PLUS)), + MPP_VAR_FUNCTION(0x4, "nand", "rb", V_98DX3236_PLUS)), MPP_MODE(20, MPP_VAR_FUNCTION(0x0, "gpo", NULL, V_98DX3236_PLUS), MPP_VAR_FUNCTION(0x4, "dev", "we0", V_98DX3236_PLUS)),