From: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
Date: Tue, 1 Apr 2014 04:31:09 +0000 (-0700)
Subject: timer: cadence_ttc: Fix match register write logic
X-Git-Url: http://git.maquefel.me/?a=commitdiff_plain;h=f727d0e6219e6d5a9f91326f01b85aa563e37bb9;p=qemu.git

timer: cadence_ttc: Fix match register write logic

This switch logic should not fall through. Fix.

Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
Message-id: 74147b4c017c904364955cc73107f90e6ac8ba74.1396326389.git.peter.crosthwaite@xilinx.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
---

diff --git a/hw/timer/cadence_ttc.c b/hw/timer/cadence_ttc.c
index a279bced78..28cb328f9b 100644
--- a/hw/timer/cadence_ttc.c
+++ b/hw/timer/cadence_ttc.c
@@ -346,11 +346,13 @@ static void cadence_ttc_write(void *opaque, hwaddr offset,
     case 0x34:
     case 0x38:
         s->reg_match[0] = value & 0xffff;
+        break;
 
     case 0x3c: /* match register */
     case 0x40:
     case 0x44:
         s->reg_match[1] = value & 0xffff;
+        break;
 
     case 0x48: /* match register */
     case 0x4c: