From: Alexander Graf Date: Fri, 10 Sep 2010 15:08:33 +0000 (+0000) Subject: PPC: Enable hint bits for lwarx/ldarx X-Git-Url: http://git.maquefel.me/?a=commitdiff_plain;h=f844c817d726cd2bdb431aa41c8217891ede2eaf;p=qemu.git PPC: Enable hint bits for lwarx/ldarx The lwarx and ldarx instructions have a bit to give some hint to the CPU which is safe to ignore. We currently refuse to accept any instruction with that bit set, as it used to be declared MBZ. Let's remove the reserved bit and make the instruction work as expected. This fixes Linux boot for ppc64. Signed-off-by: Alexander Graf Reviewed-by: Andreas Färber Signed-off-by: Edgar E. Iglesias --- diff --git a/target-ppc/translate.c b/target-ppc/translate.c index 95ab0a1d80..fd0686182e 100644 --- a/target-ppc/translate.c +++ b/target-ppc/translate.c @@ -8048,10 +8048,10 @@ GEN_HANDLER(stswi, 0x1F, 0x15, 0x16, 0x00000001, PPC_STRING), GEN_HANDLER(stswx, 0x1F, 0x15, 0x14, 0x00000001, PPC_STRING), GEN_HANDLER(eieio, 0x1F, 0x16, 0x1A, 0x03FFF801, PPC_MEM_EIEIO), GEN_HANDLER(isync, 0x13, 0x16, 0x04, 0x03FFF801, PPC_MEM), -GEN_HANDLER(lwarx, 0x1F, 0x14, 0x00, 0x00000001, PPC_RES), +GEN_HANDLER(lwarx, 0x1F, 0x14, 0x00, 0x00000000, PPC_RES), GEN_HANDLER2(stwcx_, "stwcx.", 0x1F, 0x16, 0x04, 0x00000000, PPC_RES), #if defined(TARGET_PPC64) -GEN_HANDLER(ldarx, 0x1F, 0x14, 0x02, 0x00000001, PPC_64B), +GEN_HANDLER(ldarx, 0x1F, 0x14, 0x02, 0x00000000, PPC_64B), GEN_HANDLER2(stdcx_, "stdcx.", 0x1F, 0x16, 0x06, 0x00000000, PPC_64B), #endif GEN_HANDLER(sync, 0x1F, 0x16, 0x12, 0x039FF801, PPC_MEM_SYNC),