From: Huacai Chen Date: Mon, 15 Jun 2020 06:04:16 +0000 (+0800) Subject: MIPS: Loongson: Rename CPU device-tree binding X-Git-Url: http://git.maquefel.me/?a=commitdiff_plain;h=f8523d0e83613ab8d082cd504dc53a09fbba4889;p=linux.git MIPS: Loongson: Rename CPU device-tree binding Loongson-3A R1/R2/R3 and Loongson-3B R1/R2 use the same package naming in dts, and Loongson-3A R4 will be different. In cpu.h the classic 64bit Loongson processors are called Loongson64C (C for classic, pre Loongson- 3A R4), and the new 64bit Loongson processors are called Loongson64G (G for generic, Loongson-3A R4+). To keep consistency and make extensible, we rename the classic "loongson3" prefix to "loongson64c", and the new prefix for Loongson-3A R4+ will be "loongson64g". Signed-off-by: Huacai Chen Signed-off-by: Thomas Bogendoerfer --- diff --git a/Documentation/devicetree/bindings/mips/loongson/devices.yaml b/Documentation/devicetree/bindings/mips/loongson/devices.yaml index 74ed4e397a78e..0516fe2b2897c 100644 --- a/Documentation/devicetree/bindings/mips/loongson/devices.yaml +++ b/Documentation/devicetree/bindings/mips/loongson/devices.yaml @@ -17,11 +17,11 @@ properties: compatible: oneOf: - - description: Generic Loongson3 Quad Core + RS780E + - description: Classic Loongson64 Quad Core + RS780E items: - - const: loongson,loongson3-4core-rs780e + - const: loongson,loongson64c-4core-rs780e - - description: Generic Loongson3 Octa Core + RS780E + - description: Classic Loongson64 Octa Core + RS780E items: - - const: loongson,loongson3-8core-rs780e + - const: loongson,loongson64c-8core-rs780e ... diff --git a/arch/mips/boot/dts/loongson/Makefile b/arch/mips/boot/dts/loongson/Makefile index 56d3794712623..aa5069a05da95 100644 --- a/arch/mips/boot/dts/loongson/Makefile +++ b/arch/mips/boot/dts/loongson/Makefile @@ -1,4 +1,4 @@ # SPDX_License_Identifier: GPL_2.0 -dtb-$(CONFIG_MACH_LOONGSON64) += loongson3_4core_rs780e.dtb loongson3_8core_rs780e.dtb +dtb-$(CONFIG_MACH_LOONGSON64) += loongson64c_4core_rs780e.dtb loongson64c_8core_rs780e.dtb obj-$(CONFIG_BUILTIN_DTB) += $(addsuffix .o, $(dtb-y)) diff --git a/arch/mips/boot/dts/loongson/loongson3-package.dtsi b/arch/mips/boot/dts/loongson/loongson3-package.dtsi deleted file mode 100644 index 5bb876a4de528..0000000000000 --- a/arch/mips/boot/dts/loongson/loongson3-package.dtsi +++ /dev/null @@ -1,64 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0 - -#include - -/ { - #address-cells = <2>; - #size-cells = <2>; - - cpuintc: interrupt-controller { - #address-cells = <0>; - #interrupt-cells = <1>; - interrupt-controller; - compatible = "mti,cpu-interrupt-controller"; - }; - - package0: bus@1fe00000 { - compatible = "simple-bus"; - #address-cells = <2>; - #size-cells = <1>; - ranges = <0 0x1fe00000 0 0x1fe00000 0x100000 - 0 0x3ff00000 0 0x3ff00000 0x100000 - /* 3A HT Config Space */ - 0xefd 0xfb000000 0xefd 0xfb000000 0x10000000 - /* 3B HT Config Space */ - 0x1efd 0xfb000000 0x1efd 0xfb000000 0x10000000>; - - liointc: interrupt-controller@3ff01400 { - compatible = "loongson,liointc-1.0"; - reg = <0 0x3ff01400 0x64>; - - interrupt-controller; - #interrupt-cells = <2>; - - interrupt-parent = <&cpuintc>; - interrupts = <2>, <3>; - interrupt-names = "int0", "int1"; - - loongson,parent_int_map = <0xf0ffffff>, /* int0 */ - <0x0f000000>, /* int1 */ - <0x00000000>, /* int2 */ - <0x00000000>; /* int3 */ - - }; - - cpu_uart0: serial@1fe001e0 { - compatible = "ns16550a"; - reg = <0 0x1fe001e0 0x8>; - clock-frequency = <33000000>; - interrupt-parent = <&liointc>; - interrupts = <10 IRQ_TYPE_LEVEL_HIGH>; - no-loopback-test; - }; - - cpu_uart1: serial@1fe001e8 { - status = "disabled"; - compatible = "ns16550a"; - reg = <0 0x1fe001e8 0x8>; - clock-frequency = <33000000>; - interrupts = <10 IRQ_TYPE_LEVEL_HIGH>; - interrupt-parent = <&liointc>; - no-loopback-test; - }; - }; -}; diff --git a/arch/mips/boot/dts/loongson/loongson3_4core_rs780e.dts b/arch/mips/boot/dts/loongson/loongson3_4core_rs780e.dts deleted file mode 100644 index 6b5694ca0f957..0000000000000 --- a/arch/mips/boot/dts/loongson/loongson3_4core_rs780e.dts +++ /dev/null @@ -1,25 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0 - -/dts-v1/; - -#include "loongson3-package.dtsi" -#include "rs780e-pch.dtsi" - -/ { - compatible = "loongson,loongson3-4core-rs780e"; -}; - -&package0 { - htpic: interrupt-controller@efdfb000080 { - compatible = "loongson,htpic-1.0"; - reg = <0xefd 0xfb000080 0x40>; - interrupt-controller; - #interrupt-cells = <1>; - - interrupt-parent = <&liointc>; - interrupts = <24 IRQ_TYPE_LEVEL_HIGH>, - <25 IRQ_TYPE_LEVEL_HIGH>, - <26 IRQ_TYPE_LEVEL_HIGH>, - <27 IRQ_TYPE_LEVEL_HIGH>; - }; -}; diff --git a/arch/mips/boot/dts/loongson/loongson3_8core_rs780e.dts b/arch/mips/boot/dts/loongson/loongson3_8core_rs780e.dts deleted file mode 100644 index ffefa2f829b09..0000000000000 --- a/arch/mips/boot/dts/loongson/loongson3_8core_rs780e.dts +++ /dev/null @@ -1,25 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0 - -/dts-v1/; - -#include "loongson3-package.dtsi" -#include "rs780e-pch.dtsi" - -/ { - compatible = "loongson,loongson3-8core-rs780e"; -}; - -&package0 { - htpic: interrupt-controller@1efdfb000080 { - compatible = "loongson,htpic-1.0"; - reg = <0x1efd 0xfb000080 0x40>; - interrupt-controller; - #interrupt-cells = <1>; - - interrupt-parent = <&liointc>; - interrupts = <24 IRQ_TYPE_LEVEL_HIGH>, - <25 IRQ_TYPE_LEVEL_HIGH>, - <26 IRQ_TYPE_LEVEL_HIGH>, - <27 IRQ_TYPE_LEVEL_HIGH>; - }; -}; diff --git a/arch/mips/boot/dts/loongson/loongson64c-package.dtsi b/arch/mips/boot/dts/loongson/loongson64c-package.dtsi new file mode 100644 index 0000000000000..5bb876a4de528 --- /dev/null +++ b/arch/mips/boot/dts/loongson/loongson64c-package.dtsi @@ -0,0 +1,64 @@ +// SPDX-License-Identifier: GPL-2.0 + +#include + +/ { + #address-cells = <2>; + #size-cells = <2>; + + cpuintc: interrupt-controller { + #address-cells = <0>; + #interrupt-cells = <1>; + interrupt-controller; + compatible = "mti,cpu-interrupt-controller"; + }; + + package0: bus@1fe00000 { + compatible = "simple-bus"; + #address-cells = <2>; + #size-cells = <1>; + ranges = <0 0x1fe00000 0 0x1fe00000 0x100000 + 0 0x3ff00000 0 0x3ff00000 0x100000 + /* 3A HT Config Space */ + 0xefd 0xfb000000 0xefd 0xfb000000 0x10000000 + /* 3B HT Config Space */ + 0x1efd 0xfb000000 0x1efd 0xfb000000 0x10000000>; + + liointc: interrupt-controller@3ff01400 { + compatible = "loongson,liointc-1.0"; + reg = <0 0x3ff01400 0x64>; + + interrupt-controller; + #interrupt-cells = <2>; + + interrupt-parent = <&cpuintc>; + interrupts = <2>, <3>; + interrupt-names = "int0", "int1"; + + loongson,parent_int_map = <0xf0ffffff>, /* int0 */ + <0x0f000000>, /* int1 */ + <0x00000000>, /* int2 */ + <0x00000000>; /* int3 */ + + }; + + cpu_uart0: serial@1fe001e0 { + compatible = "ns16550a"; + reg = <0 0x1fe001e0 0x8>; + clock-frequency = <33000000>; + interrupt-parent = <&liointc>; + interrupts = <10 IRQ_TYPE_LEVEL_HIGH>; + no-loopback-test; + }; + + cpu_uart1: serial@1fe001e8 { + status = "disabled"; + compatible = "ns16550a"; + reg = <0 0x1fe001e8 0x8>; + clock-frequency = <33000000>; + interrupts = <10 IRQ_TYPE_LEVEL_HIGH>; + interrupt-parent = <&liointc>; + no-loopback-test; + }; + }; +}; diff --git a/arch/mips/boot/dts/loongson/loongson64c_4core_rs780e.dts b/arch/mips/boot/dts/loongson/loongson64c_4core_rs780e.dts new file mode 100644 index 0000000000000..acd53a13cc7a1 --- /dev/null +++ b/arch/mips/boot/dts/loongson/loongson64c_4core_rs780e.dts @@ -0,0 +1,25 @@ +// SPDX-License-Identifier: GPL-2.0 + +/dts-v1/; + +#include "loongson64c-package.dtsi" +#include "rs780e-pch.dtsi" + +/ { + compatible = "loongson,loongson3-4core-rs780e"; +}; + +&package0 { + htpic: interrupt-controller@efdfb000080 { + compatible = "loongson,htpic-1.0"; + reg = <0xefd 0xfb000080 0x40>; + interrupt-controller; + #interrupt-cells = <1>; + + interrupt-parent = <&liointc>; + interrupts = <24 IRQ_TYPE_LEVEL_HIGH>, + <25 IRQ_TYPE_LEVEL_HIGH>, + <26 IRQ_TYPE_LEVEL_HIGH>, + <27 IRQ_TYPE_LEVEL_HIGH>; + }; +}; diff --git a/arch/mips/boot/dts/loongson/loongson64c_8core_rs780e.dts b/arch/mips/boot/dts/loongson/loongson64c_8core_rs780e.dts new file mode 100644 index 0000000000000..433f9c3d01b86 --- /dev/null +++ b/arch/mips/boot/dts/loongson/loongson64c_8core_rs780e.dts @@ -0,0 +1,25 @@ +// SPDX-License-Identifier: GPL-2.0 + +/dts-v1/; + +#include "loongson64c-package.dtsi" +#include "rs780e-pch.dtsi" + +/ { + compatible = "loongson,loongson3-8core-rs780e"; +}; + +&package0 { + htpic: interrupt-controller@1efdfb000080 { + compatible = "loongson,htpic-1.0"; + reg = <0x1efd 0xfb000080 0x40>; + interrupt-controller; + #interrupt-cells = <1>; + + interrupt-parent = <&liointc>; + interrupts = <24 IRQ_TYPE_LEVEL_HIGH>, + <25 IRQ_TYPE_LEVEL_HIGH>, + <26 IRQ_TYPE_LEVEL_HIGH>, + <27 IRQ_TYPE_LEVEL_HIGH>; + }; +}; diff --git a/arch/mips/include/asm/mach-loongson64/builtin_dtbs.h b/arch/mips/include/asm/mach-loongson64/builtin_dtbs.h index 853c6d80887b2..930c8a1c1e21b 100644 --- a/arch/mips/include/asm/mach-loongson64/builtin_dtbs.h +++ b/arch/mips/include/asm/mach-loongson64/builtin_dtbs.h @@ -8,6 +8,6 @@ #ifndef __ASM_MACH_LOONGSON64_BUILTIN_DTBS_H_ #define __ASM_MACH_LOONGSON64_BUILTIN_DTBS_H_ -extern u32 __dtb_loongson3_4core_rs780e_begin[]; -extern u32 __dtb_loongson3_8core_rs780e_begin[]; +extern u32 __dtb_loongson64c_4core_rs780e_begin[]; +extern u32 __dtb_loongson64c_8core_rs780e_begin[]; #endif diff --git a/arch/mips/loongson64/env.c b/arch/mips/loongson64/env.c index d11bc346bbcaf..3e7caba8e788a 100644 --- a/arch/mips/loongson64/env.c +++ b/arch/mips/loongson64/env.c @@ -133,11 +133,11 @@ void __init prom_init_env(void) case PRID_REV_LOONGSON3A_R2_1: case PRID_REV_LOONGSON3A_R3_0: case PRID_REV_LOONGSON3A_R3_1: - loongson_fdt_blob = __dtb_loongson3_4core_rs780e_begin; + loongson_fdt_blob = __dtb_loongson64c_4core_rs780e_begin; break; case PRID_REV_LOONGSON3B_R1: case PRID_REV_LOONGSON3B_R2: - loongson_fdt_blob = __dtb_loongson3_8core_rs780e_begin; + loongson_fdt_blob = __dtb_loongson64c_8core_rs780e_begin; break; default: break;