Stefan Hajnoczi [Tue, 19 Sep 2023 17:22:10 +0000 (13:22 -0400)]
Merge tag 'firmware/edk2-
20230918-pull-request' of https://gitlab.com/kraxel/qemu into staging
edk2: update to edk2-stable202308
v2: include acpi test data updates
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# =Grjx
# -----END PGP SIGNATURE-----
# gpg: Signature made Mon 18 Sep 2023 09:32:53 EDT
# gpg: using RSA key
A0328CFFB93A17A79901FE7D4CB6D8EED3E87138
# gpg: Good signature from "Gerd Hoffmann (work) <kraxel@redhat.com>" [full]
# gpg: aka "Gerd Hoffmann <gerd@kraxel.org>" [full]
# gpg: aka "Gerd Hoffmann (private) <kraxel@gmail.com>" [full]
# Primary key fingerprint: A032 8CFF B93A 17A7 9901 FE7D 4CB6 D8EE D3E8 7138
* tag 'firmware/edk2-
20230918-pull-request' of https://gitlab.com/kraxel/qemu:
tests/acpi: disallow virt/SSDT.memhp updates
tests/acpi: update virt/SSDT.memhp
edk2: update binaries to edk2-stable202308
edk2: update submodule to edk2-stable202308
edk2: workaround edk-stable202308 bug
edk2: update build config
edk2: update build script
tests/acpi: allow virt/SSDT.memhp updates
Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
Stefan Hajnoczi [Tue, 19 Sep 2023 17:22:02 +0000 (13:22 -0400)]
Merge tag 'pull-ppc-
20230918' of https://gitlab.com/danielhb/qemu into staging
ppc patch queue for 2023-09-18:
In this short queue we're making two important changes:
- Nicholas Piggin is now the qemu-ppc maintainer. Cédric Le Goater and
Daniel Barboza will act as backup during Nick's transition to this new
role.
- Support for NVIDIA V100 GPU with NVLink2 is dropped from qemu-ppc.
Linux removed the same support back in 5.13, we're following suit now.
A xive Coverity fix is also included.
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# -----END PGP SIGNATURE-----
# gpg: Signature made Mon 18 Sep 2023 09:24:44 EDT
# gpg: using EDDSA key
17EBFF9923D01800AF2838193CD9CA96DE033164
# gpg: issuer "danielhb413@gmail.com"
# gpg: Good signature from "Daniel Henrique Barboza <danielhb413@gmail.com>" [unknown]
# gpg: WARNING: The key's User ID is not certified with a trusted signature!
# gpg: There is no indication that the signature belongs to the owner.
# Primary key fingerprint: 17EB FF99 23D0 1800 AF28 3819 3CD9 CA96 DE03 3164
* tag 'pull-ppc-
20230918' of https://gitlab.com/danielhb/qemu:
spapr: Remove support for NVIDIA V100 GPU with NVLink2
ppc/xive: Fix uint32_t overflow
MAINTAINERS: Nick Piggin PPC maintainer, other PPC changes
Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
Stefan Hajnoczi [Tue, 19 Sep 2023 17:21:49 +0000 (13:21 -0400)]
Merge tag 'net-pull-request' of https://github.com/jasowang/qemu into staging
# -----BEGIN PGP SIGNATURE-----
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# iQEcBAABAgAGBQJlB/SLAAoJEO8Ells5jWIR7EQH/1kAbxHcSGJXDOgQAXJ/rOZi
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# gpg: Signature made Mon 18 Sep 2023 02:56:11 EDT
# gpg: using RSA key
EF04965B398D6211
# gpg: Good signature from "Jason Wang (Jason Wang on RedHat) <jasowang@redhat.com>" [full]
# Primary key fingerprint: 215D 46F4 8246 689E C77F 3562 EF04 965B 398D 6211
* tag 'net-pull-request' of https://github.com/jasowang/qemu:
net/tap: Avoid variable-length array
net/dump: Avoid variable length array
hw/net/rocker: Avoid variable length array
hw/net/fsl_etsec/rings.c: Avoid variable length array
net: add initial support for AF_XDP network backend
tests: bump libvirt-ci for libasan and libxdp
e1000e: rename e1000e_ba_state and e1000e_write_hdr_to_rx_buffers
igb: packet-split descriptors support
igb: add IPv6 extended headers traffic detection
igb: RX payload guest writting refactoring
igb: RX descriptors guest writting refactoring
igb: rename E1000E_RingInfo_st
igb: remove TCP ACK detection
virtio-net: Add support for USO features
virtio-net: Add USO flags to vhost support.
tap: Add check for USO features
tap: Add USO support to tap device.
Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
Stefan Hajnoczi [Tue, 19 Sep 2023 17:20:54 +0000 (13:20 -0400)]
Merge tag 'pull-tcg-
20230915-2' of https://gitlab.com/rth7680/qemu into staging
*: Delete checks for old host definitions
tcg/loongarch64: Generate LSX instructions
fpu: Add conversions between bfloat16 and [u]int8
fpu: Handle m68k extended precision denormals properly
accel/tcg: Improve cputlb i/o organization
accel/tcg: Simplify tlb_plugin_lookup
accel/tcg: Remove false-negative halted assertion
tcg: Add gvec compare with immediate and scalar operand
tcg/aarch64: Emit BTI insns at jump landing pads
[Resolved conflict between CPUINFO_PMULL and CPUINFO_BTI.
--Stefan]
* tag 'pull-tcg-
20230915-2' of https://gitlab.com/rth7680/qemu: (39 commits)
tcg: Map code_gen_buffer with PROT_BTI
tcg/aarch64: Emit BTI insns at jump landing pads
util/cpuinfo-aarch64: Add CPUINFO_BTI
tcg: Add tcg_out_tb_start backend hook
fpu: Handle m68k extended precision denormals properly
fpu: Add conversions between bfloat16 and [u]int8
accel/tcg: Introduce do_st16_mmio_leN
accel/tcg: Introduce do_ld16_mmio_beN
accel/tcg: Merge io_writex into do_st_mmio_leN
accel/tcg: Merge io_readx into do_ld_mmio_beN
accel/tcg: Replace direct use of io_readx/io_writex in do_{ld,st}_1
accel/tcg: Merge cpu_transaction_failed into io_failed
plugin: Simplify struct qemu_plugin_hwaddr
accel/tcg: Use CPUTLBEntryFull.phys_addr in io_failed
accel/tcg: Split out io_prepare and io_failed
accel/tcg: Simplify tlb_plugin_lookup
target/arm: Use tcg_gen_gvec_cmpi for compare vs 0
tcg: Add gvec compare with immediate and scalar operand
tcg/loongarch64: Implement 128-bit load & store
tcg/loongarch64: Lower rotli_vec to vrotri
...
Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
Stefan Hajnoczi [Mon, 18 Sep 2023 15:04:21 +0000 (11:04 -0400)]
Merge tag 'pull-crypto-
20230915' of https://gitlab.com/rth7680/qemu into staging
Unify implementation of carry-less multiply.
Accelerate carry-less multiply for 64x64->128.
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# gpg: Signature made Fri 15 Sep 2023 12:40:26 EDT
# gpg: using RSA key
7A481E78868B4DB6A85A05C064DF38E8AF7E215F
# gpg: issuer "richard.henderson@linaro.org"
# gpg: Good signature from "Richard Henderson <richard.henderson@linaro.org>" [full]
# Primary key fingerprint: 7A48 1E78 868B 4DB6 A85A 05C0 64DF 38E8 AF7E 215F
* tag 'pull-crypto-
20230915' of https://gitlab.com/rth7680/qemu:
host/include/aarch64: Implement clmul.h
host/include/i386: Implement clmul.h
target/ppc: Use clmul_64
target/s390x: Use clmul_64
target/i386: Use clmul_64
target/arm: Use clmul_64
crypto: Add generic 64-bit carry-less multiply routine
target/ppc: Use clmul_32* routines
target/s390x: Use clmul_32* routines
target/arm: Use clmul_32* routines
crypto: Add generic 32-bit carry-less multiply routines
target/ppc: Use clmul_16* routines
target/s390x: Use clmul_16* routines
target/arm: Use clmul_16* routines
crypto: Add generic 16-bit carry-less multiply routines
target/ppc: Use clmul_8* routines
target/s390x: Use clmul_8* routines
target/arm: Use clmul_8* routines
crypto: Add generic 8-bit carry-less multiply routines
Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
Gerd Hoffmann [Mon, 18 Sep 2023 13:00:24 +0000 (15:00 +0200)]
tests/acpi: disallow virt/SSDT.memhp updates
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
Gerd Hoffmann [Mon, 18 Sep 2023 12:15:51 +0000 (14:15 +0200)]
tests/acpi: update virt/SSDT.memhp
The edk2 update caused an address change:
DefinitionBlock ("", "SSDT", 1, "BOCHS ", "NVDIMM", 0x00000001)
{
Scope (\_SB)
{
Device (NVDR)
{
Name (_HID, "ACPI0012" /* NVDIMM Root Device */) // _HID: Hardware ID
[ ... ]
}
}
- Name (MEMA, 0x43D10000)
+ Name (MEMA, 0x43C90000)
}
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
Gerd Hoffmann [Mon, 11 Sep 2023 19:09:54 +0000 (21:09 +0200)]
edk2: update binaries to edk2-stable202308
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
Gerd Hoffmann [Mon, 11 Sep 2023 15:39:23 +0000 (17:39 +0200)]
edk2: update submodule to edk2-stable202308
New stable release was tagged in August 2023,
update the edk2 submodule to it.
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
Gerd Hoffmann [Mon, 11 Sep 2023 18:20:15 +0000 (20:20 +0200)]
edk2: workaround edk-stable202308 bug
Set PCD to workaround two fixes missing the release.
https://github.com/tianocore/edk2/commit/
8b66f9df1bb0fd5ebb743944d41cb33178cf2fdd
https://github.com/tianocore/edk2/commit/
020cc9e2e7053bb62247b0babbbe80cb855592e5
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
Gerd Hoffmann [Mon, 11 Sep 2023 15:38:21 +0000 (17:38 +0200)]
edk2: update build config
risc-v switched to use split code/vars images like the other archs.
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
Gerd Hoffmann [Mon, 11 Sep 2023 15:38:12 +0000 (17:38 +0200)]
edk2: update build script
Sync with latest version from gitlab.com/kraxel/edk2-build-config
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
Gerd Hoffmann [Mon, 18 Sep 2023 12:07:25 +0000 (14:07 +0200)]
tests/acpi: allow virt/SSDT.memhp updates
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
Cédric Le Goater [Mon, 18 Sep 2023 09:17:17 +0000 (11:17 +0200)]
spapr: Remove support for NVIDIA V100 GPU with NVLink2
NVLink2 support was removed from the PPC PowerNV platform and VFIO in
Linux 5.13 with commits :
562d1e207d32 ("powerpc/powernv: remove the nvlink support")
b392a1989170 ("vfio/pci: remove vfio_pci_nvlink2")
This was 2.5 years ago. Do the same in QEMU with a revert of commit
ec132efaa81f ("spapr: Support NVIDIA V100 GPU with NVLink2"). Some
adjustements are required on the NUMA part.
Cc: Alexey Kardashevskiy <aik@ozlabs.ru>
Reviewed-by: Daniel Henrique Barboza <danielhb413@gmail.com>
Acked-by: Alex Williamson <alex.williamson@redhat.com>
Signed-off-by: Cédric Le Goater <clg@redhat.com>
Message-ID: <
20230918091717.149950-1-clg@kaod.org>
Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
Cédric Le Goater [Thu, 14 Sep 2023 15:46:50 +0000 (17:46 +0200)]
ppc/xive: Fix uint32_t overflow
As reported by Coverity, "idx << xive->pc_shift" is evaluated using
32-bit arithmetic, and then used in a context expecting a "uint64_t".
Add a uint64_t cast.
Fixes: Coverity CID 1519049
Fixes: b68147b7a5bf ("ppc/xive: Add support for the PC MMIOs")
Signed-off-by: Cédric Le Goater <clg@kaod.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Frederic Barrat <fbarrat@linux.ibm.com>
Message-ID: <
20230914154650.222111-1-clg@kaod.org>
Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
Daniel Henrique Barboza [Fri, 15 Sep 2023 11:05:07 +0000 (08:05 -0300)]
MAINTAINERS: Nick Piggin PPC maintainer, other PPC changes
Update all relevant PowerPC entries as follows:
- Nick Piggin is promoted to Maintainer in all qemu-ppc subsystems.
Nick has been a solid contributor for the last couple of years and
has the required knowledge and motivation to drive the boat.
- Greg Kurz is being removed from all qemu-ppc entries. Greg has moved
to other areas of interest and will retire from qemu-ppc. Thanks Mr
Kurz for all the years of service.
- David Gibson was removed as 'Reviewer' from PowerPC TCG CPUs and PPC
KVM CPUs. Change done per his request.
- Daniel Barboza downgraded from 'Maintainer' to 'Reviewer' in sPAPR and
PPC KVM CPUs. It has been a long since I last touched those areas and
it's not justified to be kept as maintainer in them.
- Cedric Le Goater and Daniel Barboza removed as 'Reviewer' in VOF. We
don't have the required knowledge to justify it.
- VOF support downgraded from 'Maintained' to 'Odd Fixes' since it
better reflects the current state of the subsystem.
Acked-by: Cédric Le Goater <clg@kaod.org>
Acked-by: Greg Kurz <groug@kaod.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Harsh Prateek Bora <harshpb@linux.ibm.com>
Acked-by: David Gibson <david@gibson.dropbear.id.au>
Acked-by: Nicholas Piggin <npiggin@gmail.com>
Message-ID: <
20230915110507.194762-1-danielhb413@gmail.com>
Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
Peter Maydell [Thu, 24 Aug 2023 15:32:24 +0000 (16:32 +0100)]
net/tap: Avoid variable-length array
Use a heap allocation instead of a variable length array in
tap_receive_iov().
The codebase has very few VLAs, and if we can get rid of them all we
can make the compiler error on new additions. This is a defensive
measure against security bugs where an on-stack dynamic allocation
isn't correctly size-checked (e.g. CVE-2021-3527).
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Francisco Iglesias <frasse.iglesias@gmail.com>
Signed-off-by: Jason Wang <jasowang@redhat.com>
Peter Maydell [Thu, 24 Aug 2023 15:32:23 +0000 (16:32 +0100)]
net/dump: Avoid variable length array
Use a g_autofree heap allocation instead of a variable length
array in dump_receive_iov().
The codebase has very few VLAs, and if we can get rid of them all we
can make the compiler error on new additions. This is a defensive
measure against security bugs where an on-stack dynamic allocation
isn't correctly size-checked (e.g. CVE-2021-3527).
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Francisco Iglesias <frasse.iglesias@gmail.com>
Signed-off-by: Jason Wang <jasowang@redhat.com>
Peter Maydell [Thu, 24 Aug 2023 15:32:22 +0000 (16:32 +0100)]
hw/net/rocker: Avoid variable length array
Replace an on-stack variable length array in of_dpa_ig() with
a g_autofree heap allocation.
The codebase has very few VLAs, and if we can get rid of them all we
can make the compiler error on new additions. This is a defensive
measure against security bugs where an on-stack dynamic allocation
isn't correctly size-checked (e.g. CVE-2021-3527).
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Francisco Iglesias <frasse.iglesias@gmail.com>
Signed-off-by: Jason Wang <jasowang@redhat.com>
Peter Maydell [Thu, 24 Aug 2023 15:32:21 +0000 (16:32 +0100)]
hw/net/fsl_etsec/rings.c: Avoid variable length array
In fill_rx_bd() we create a variable length array of size
etsec->rx_padding. In fact we know that this will never be
larger than 64 bytes, because rx_padding is set in rx_init_frame()
in a way that ensures it is only that large. Use a fixed sized
array and assert that it is big enough.
Since padd[] is now potentially rather larger than the actual
padding required, adjust the memset() we do on it to match the
size that we write with cpu_physical_memory_write(), rather than
clearing the entire array.
The codebase has very few VLAs, and if we can get rid of them all we
can make the compiler error on new additions. This is a defensive
measure against security bugs where an on-stack dynamic allocation
isn't correctly size-checked (e.g. CVE-2021-3527).
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Jason Wang <jasowang@redhat.com>
Ilya Maximets [Wed, 13 Sep 2023 18:34:37 +0000 (20:34 +0200)]
net: add initial support for AF_XDP network backend
AF_XDP is a network socket family that allows communication directly
with the network device driver in the kernel, bypassing most or all
of the kernel networking stack. In the essence, the technology is
pretty similar to netmap. But, unlike netmap, AF_XDP is Linux-native
and works with any network interfaces without driver modifications.
Unlike vhost-based backends (kernel, user, vdpa), AF_XDP doesn't
require access to character devices or unix sockets. Only access to
the network interface itself is necessary.
This patch implements a network backend that communicates with the
kernel by creating an AF_XDP socket. A chunk of userspace memory
is shared between QEMU and the host kernel. 4 ring buffers (Tx, Rx,
Fill and Completion) are placed in that memory along with a pool of
memory buffers for the packet data. Data transmission is done by
allocating one of the buffers, copying packet data into it and
placing the pointer into Tx ring. After transmission, device will
return the buffer via Completion ring. On Rx, device will take
a buffer form a pre-populated Fill ring, write the packet data into
it and place the buffer into Rx ring.
AF_XDP network backend takes on the communication with the host
kernel and the network interface and forwards packets to/from the
peer device in QEMU.
Usage example:
-device virtio-net-pci,netdev=guest1,mac=00:16:35:AF:AA:5C
-netdev af-xdp,ifname=ens6f1np1,id=guest1,mode=native,queues=1
XDP program bridges the socket with a network interface. It can be
attached to the interface in 2 different modes:
1. skb - this mode should work for any interface and doesn't require
driver support. With a caveat of lower performance.
2. native - this does require support from the driver and allows to
bypass skb allocation in the kernel and potentially use
zero-copy while getting packets in/out userspace.
By default, QEMU will try to use native mode and fall back to skb.
Mode can be forced via 'mode' option. To force 'copy' even in native
mode, use 'force-copy=on' option. This might be useful if there is
some issue with the driver.
Option 'queues=N' allows to specify how many device queues should
be open. Note that all the queues that are not open are still
functional and can receive traffic, but it will not be delivered to
QEMU. So, the number of device queues should generally match the
QEMU configuration, unless the device is shared with something
else and the traffic re-direction to appropriate queues is correctly
configured on a device level (e.g. with ethtool -N).
'start-queue=M' option can be used to specify from which queue id
QEMU should start configuring 'N' queues. It might also be necessary
to use this option with certain NICs, e.g. MLX5 NICs. See the docs
for examples.
In a general case QEMU will need CAP_NET_ADMIN and CAP_SYS_ADMIN
or CAP_BPF capabilities in order to load default XSK/XDP programs to
the network interface and configure BPF maps. It is possible, however,
to run with no capabilities. For that to work, an external process
with enough capabilities will need to pre-load default XSK program,
create AF_XDP sockets and pass their file descriptors to QEMU process
on startup via 'sock-fds' option. Network backend will need to be
configured with 'inhibit=on' to avoid loading of the program.
QEMU will need 32 MB of locked memory (RLIMIT_MEMLOCK) per queue
or CAP_IPC_LOCK.
There are few performance challenges with the current network backends.
First is that they do not support IO threads. This means that data
path is handled by the main thread in QEMU and may slow down other
work or may be slowed down by some other work. This also means that
taking advantage of multi-queue is generally not possible today.
Another thing is that data path is going through the device emulation
code, which is not really optimized for performance. The fastest
"frontend" device is virtio-net. But it's not optimized for heavy
traffic either, because it expects such use-cases to be handled via
some implementation of vhost (user, kernel, vdpa). In practice, we
have virtio notifications and rcu lock/unlock on a per-packet basis
and not very efficient accesses to the guest memory. Communication
channels between backend and frontend devices do not allow passing
more than one packet at a time as well.
Some of these challenges can be avoided in the future by adding better
batching into device emulation or by implementing vhost-af-xdp variant.
There are also a few kernel limitations. AF_XDP sockets do not
support any kinds of checksum or segmentation offloading. Buffers
are limited to a page size (4K), i.e. MTU is limited. Multi-buffer
support implementation for AF_XDP is in progress, but not ready yet.
Also, transmission in all non-zero-copy modes is synchronous, i.e.
done in a syscall. That doesn't allow high packet rates on virtual
interfaces.
However, keeping in mind all of these challenges, current implementation
of the AF_XDP backend shows a decent performance while running on top
of a physical NIC with zero-copy support.
Test setup:
2 VMs running on 2 physical hosts connected via ConnectX6-Dx card.
Network backend is configured to open the NIC directly in native mode.
The driver supports zero-copy. NIC is configured to use 1 queue.
Inside a VM - iperf3 for basic TCP performance testing and dpdk-testpmd
for PPS testing.
iperf3 result:
TCP stream : 19.1 Gbps
dpdk-testpmd (single queue, single CPU core, 64 B packets) results:
Tx only : 3.4 Mpps
Rx only : 2.0 Mpps
L2 FWD Loopback : 1.5 Mpps
In skb mode the same setup shows much lower performance, similar to
the setup where pair of physical NICs is replaced with veth pair:
iperf3 result:
TCP stream : 9 Gbps
dpdk-testpmd (single queue, single CPU core, 64 B packets) results:
Tx only : 1.2 Mpps
Rx only : 1.0 Mpps
L2 FWD Loopback : 0.7 Mpps
Results in skb mode or over the veth are close to results of a tap
backend with vhost=on and disabled segmentation offloading bridged
with a NIC.
Signed-off-by: Ilya Maximets <i.maximets@ovn.org>
Reviewed-by: Daniel P. Berrangé <berrange@redhat.com> (docker/lcitool)
Signed-off-by: Jason Wang <jasowang@redhat.com>
Ilya Maximets [Wed, 13 Sep 2023 18:34:36 +0000 (20:34 +0200)]
tests: bump libvirt-ci for libasan and libxdp
This pulls in the fixes for libasan version as well as support for
libxdp that will be used for af-xdp netdev in the next commits.
Signed-off-by: Ilya Maximets <i.maximets@ovn.org>
Reviewed-by: Daniel P. Berrangé <berrange@redhat.com>
Signed-off-by: Jason Wang <jasowang@redhat.com>
Tomasz Dzieciol [Mon, 29 May 2023 14:01:53 +0000 (16:01 +0200)]
e1000e: rename e1000e_ba_state and e1000e_write_hdr_to_rx_buffers
Rename e1000e_ba_state according and e1000e_write_hdr_to_rx_buffers for
consistency with IGB.
Signed-off-by: Tomasz Dzieciol <t.dzieciol@partner.samsung.com>
Reviewed-by: Akihiko Odaki <akihiko.odaki@daynix.com>
Tested-by: Akihiko Odaki <akihiko.odaki@daynix.com>
Signed-off-by: Jason Wang <jasowang@redhat.com>
Tomasz Dzieciol [Mon, 29 May 2023 14:01:52 +0000 (16:01 +0200)]
igb: packet-split descriptors support
Packet-split descriptors are used by Linux VF driver for MTU values from 2048
Signed-off-by: Tomasz Dzieciol <t.dzieciol@partner.samsung.com>
Reviewed-by: Akihiko Odaki <akihiko.odaki@daynix.com>
Tested-by: Akihiko Odaki <akihiko.odaki@daynix.com>
Signed-off-by: Jason Wang <jasowang@redhat.com>
Tomasz Dzieciol [Mon, 29 May 2023 14:01:51 +0000 (16:01 +0200)]
igb: add IPv6 extended headers traffic detection
Signed-off-by: Tomasz Dzieciol <t.dzieciol@partner.samsung.com>
Reviewed-by: Akihiko Odaki <akihiko.odaki@daynix.com>
Tested-by: Akihiko Odaki <akihiko.odaki@daynix.com>
Signed-off-by: Jason Wang <jasowang@redhat.com>
Tomasz Dzieciol [Mon, 29 May 2023 14:01:50 +0000 (16:01 +0200)]
igb: RX payload guest writting refactoring
Refactoring is done in preparation for support of multiple advanced
descriptors RX modes, especially packet-split modes.
Signed-off-by: Tomasz Dzieciol <t.dzieciol@partner.samsung.com>
Reviewed-by: Akihiko Odaki <akihiko.odaki@daynix.com>
Tested-by: Akihiko Odaki <akihiko.odaki@daynix.com>
Signed-off-by: Jason Wang <jasowang@redhat.com>
Tomasz Dzieciol [Mon, 29 May 2023 14:01:49 +0000 (16:01 +0200)]
igb: RX descriptors guest writting refactoring
Refactoring is done in preparation for support of multiple advanced
descriptors RX modes, especially packet-split modes.
Signed-off-by: Tomasz Dzieciol <t.dzieciol@partner.samsung.com>
Reviewed-by: Akihiko Odaki <akihiko.odaki@daynix.com>
Tested-by: Akihiko Odaki <akihiko.odaki@daynix.com>
Signed-off-by: Jason Wang <jasowang@redhat.com>
Tomasz Dzieciol [Mon, 29 May 2023 14:01:48 +0000 (16:01 +0200)]
igb: rename E1000E_RingInfo_st
Rename E1000E_RingInfo_st and E1000E_RingInfo according to qemu typdefs guide.
Signed-off-by: Tomasz Dzieciol <t.dzieciol@partner.samsung.com>
Reviewed-by: Akihiko Odaki <akihiko.odaki@daynix.com>
Tested-by: Akihiko Odaki <akihiko.odaki@daynix.com>
Signed-off-by: Jason Wang <jasowang@redhat.com>
Tomasz Dzieciol [Mon, 29 May 2023 14:01:47 +0000 (16:01 +0200)]
igb: remove TCP ACK detection
TCP ACK detection is no longer present in igb.
Signed-off-by: Tomasz Dzieciol <t.dzieciol@partner.samsung.com>
Reviewed-by: Akihiko Odaki <akihiko.odaki@daynix.com>
Tested-by: Akihiko Odaki <akihiko.odaki@daynix.com>
Signed-off-by: Jason Wang <jasowang@redhat.com>
Yuri Benditovich [Mon, 31 Jul 2023 22:31:48 +0000 (01:31 +0300)]
virtio-net: Add support for USO features
USO features of virtio-net device depend on kernel ability
to support them, for backward compatibility by default the
features are disabled on 8.0 and earlier.
Signed-off-by: Yuri Benditovich <yuri.benditovich@daynix.com>
Signed-off-by: Andrew Melnychecnko <andrew@daynix.com>
Signed-off-by: Jason Wang <jasowang@redhat.com>
Andrew Melnychenko [Mon, 31 Jul 2023 22:31:47 +0000 (01:31 +0300)]
virtio-net: Add USO flags to vhost support.
New features are subject to check with vhost-user and vdpa.
Signed-off-by: Yuri Benditovich <yuri.benditovich@daynix.com>
Signed-off-by: Andrew Melnychenko <andrew@daynix.com>
Signed-off-by: Jason Wang <jasowang@redhat.com>
Yuri Benditovich [Mon, 31 Jul 2023 22:31:46 +0000 (01:31 +0300)]
tap: Add check for USO features
Tap indicates support for USO features according to
capabilities of current kernel module.
Signed-off-by: Yuri Benditovich <yuri.benditovich@daynix.com>
Signed-off-by: Andrew Melnychecnko <andrew@daynix.com>
Signed-off-by: Jason Wang <jasowang@redhat.com>
Andrew Melnychenko [Mon, 31 Jul 2023 22:31:45 +0000 (01:31 +0300)]
tap: Add USO support to tap device.
Passing additional parameters (USOv4 and USOv6 offloads) when
setting TAP offloads
Signed-off-by: Yuri Benditovich <yuri.benditovich@daynix.com>
Signed-off-by: Andrew Melnychenko <andrew@daynix.com>
Signed-off-by: Jason Wang <jasowang@redhat.com>
Richard Henderson [Wed, 16 Aug 2023 00:53:42 +0000 (17:53 -0700)]
tcg: Map code_gen_buffer with PROT_BTI
For linux aarch64 host supporting BTI, map the buffer
to require BTI instructions at branch landing pads.
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Richard Henderson [Wed, 16 Aug 2023 02:31:38 +0000 (19:31 -0700)]
tcg/aarch64: Emit BTI insns at jump landing pads
The prologue is entered via "call"; the epilogue, each tb,
and each goto_tb continuation point are all reached via "jump".
As tcg_out_goto_long is only used by tcg_out_exit_tb, merge
the two functions. Change the indirect register used to
TCG_REG_TMP1, aka X17, so that the BTI condition created
is "jump" instead of "jump or call".
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Richard Henderson [Wed, 16 Aug 2023 00:33:56 +0000 (17:33 -0700)]
util/cpuinfo-aarch64: Add CPUINFO_BTI
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Richard Henderson [Tue, 15 Aug 2023 16:34:59 +0000 (16:34 +0000)]
tcg: Add tcg_out_tb_start backend hook
This hook may emit code at the beginning of the TB.
Suggested-by: Jordan Niethe <jniethe5@gmail.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Richard Henderson [Mon, 21 Aug 2023 00:28:33 +0000 (17:28 -0700)]
fpu: Handle m68k extended precision denormals properly
Motorola treats denormals with explicit integer bit set as
having unbiased exponent 0, unlike Intel which treats it as
having unbiased exponent 1 (more like all other IEEE formats
that have no explicit integer bit).
Add a flag on FloatFmt to differentiate the behaviour.
Reported-by: Keith Packard <keithp@keithp.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
LIU Zhiwei [Wed, 31 May 2023 06:54:57 +0000 (14:54 +0800)]
fpu: Add conversions between bfloat16 and [u]int8
We missed these functions when upstreaming the bfloat16 support.
Signed-off-by: LIU Zhiwei <zhiwei_liu@linux.alibaba.com>
Message-Id: <
20230531065458.2082-1-zhiwei_liu@linux.alibaba.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Richard Henderson [Mon, 28 Aug 2023 03:09:58 +0000 (20:09 -0700)]
accel/tcg: Introduce do_st16_mmio_leN
Split out int_st_mmio_leN, to be used by both do_st_mmio_leN
and do_st16_mmio_leN. Move the locks down into the two
functions, since each one now covers all accesses to once page.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Richard Henderson [Mon, 28 Aug 2023 02:54:54 +0000 (19:54 -0700)]
accel/tcg: Introduce do_ld16_mmio_beN
Split out int_ld_mmio_beN, to be used by both do_ld_mmio_beN
and do_ld16_mmio_beN. Move the locks down into the two
functions, since each one now covers all accesses to once page.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Richard Henderson [Sun, 27 Aug 2023 18:25:25 +0000 (11:25 -0700)]
accel/tcg: Merge io_writex into do_st_mmio_leN
Avoid multiple calls to io_prepare for unaligned acceses.
One call to do_st_mmio_leN will never cross pages.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Richard Henderson [Sun, 27 Aug 2023 16:50:41 +0000 (09:50 -0700)]
accel/tcg: Merge io_readx into do_ld_mmio_beN
Avoid multiple calls to io_prepare for unaligned acceses.
One call to do_ld_mmio_beN will never cross pages.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Richard Henderson [Sun, 27 Aug 2023 16:49:13 +0000 (09:49 -0700)]
accel/tcg: Replace direct use of io_readx/io_writex in do_{ld,st}_1
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Richard Henderson [Sun, 27 Aug 2023 15:54:50 +0000 (08:54 -0700)]
accel/tcg: Merge cpu_transaction_failed into io_failed
Push computation down into the if statements to the point
the data is used.
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Richard Henderson [Mon, 28 Aug 2023 01:58:15 +0000 (18:58 -0700)]
plugin: Simplify struct qemu_plugin_hwaddr
Rather than saving MemoryRegionSection and offset,
save phys_addr and MemoryRegion. This matches up
much closer with the plugin api.
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Richard Henderson [Mon, 28 Aug 2023 01:22:41 +0000 (18:22 -0700)]
accel/tcg: Use CPUTLBEntryFull.phys_addr in io_failed
Since the introduction of CPUTLBEntryFull, we can recover
the full cpu address space physical address without having
to examine the MemoryRegionSection.
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Richard Henderson [Mon, 28 Aug 2023 00:31:27 +0000 (17:31 -0700)]
accel/tcg: Split out io_prepare and io_failed
These are common code from io_readx and io_writex.
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Richard Henderson [Mon, 28 Aug 2023 00:28:16 +0000 (17:28 -0700)]
accel/tcg: Simplify tlb_plugin_lookup
Now that we defer address space update and tlb_flush until
the next async_run_on_cpu, the plugin run at the end of the
instruction no longer has to contend with a flushed tlb.
Therefore, delete SavedIOTLB entirely.
Properly return false from tlb_plugin_lookup when we do
not have a tlb match.
Fixes a bug in which SavedIOTLB had stale data, because
there were multiple i/o accesses within a single insn.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Richard Henderson [Thu, 31 Aug 2023 03:09:04 +0000 (20:09 -0700)]
target/arm: Use tcg_gen_gvec_cmpi for compare vs 0
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Song Gao <gaosong@loongson.cn>
Message-Id: <
20230831030904.
1194667-3-richard.henderson@linaro.org>
Richard Henderson [Thu, 31 Aug 2023 03:09:03 +0000 (20:09 -0700)]
tcg: Add gvec compare with immediate and scalar operand
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Tested-by: Song Gao <gaosong@loongson.cn>
Reviewed-by: Song Gao <gaosong@loongson.cn>
Message-Id: <
20230831030904.
1194667-2-richard.henderson@linaro.org>
Jiajie Chen [Fri, 8 Sep 2023 02:21:23 +0000 (10:21 +0800)]
tcg/loongarch64: Implement 128-bit load & store
If LSX is available, use LSX instructions to implement 128-bit load &
store when MO_128 is required, otherwise use two 64-bit loads & stores.
Signed-off-by: Jiajie Chen <c@jia.je>
Message-Id: <
20230908022302.180442-17-c@jia.je>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Richard Henderson [Wed, 12 Jul 2023 18:21:19 +0000 (18:21 +0000)]
host/include/aarch64: Implement clmul.h
Detect PMULL in cpuinfo; implement the accel hook.
Acked-by: Ard Biesheuvel <ardb@kernel.org>
Tested-by: Ard Biesheuvel <ardb@kernel.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Richard Henderson [Tue, 11 Jul 2023 20:39:10 +0000 (21:39 +0100)]
host/include/i386: Implement clmul.h
Detect PCLMUL in cpuinfo; implement the accel hook.
Reviewed-by: Ard Biesheuvel <ardb@kernel.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Richard Henderson [Tue, 11 Jul 2023 09:41:28 +0000 (10:41 +0100)]
target/ppc: Use clmul_64
Use generic routine for 64-bit carry-less multiply.
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Richard Henderson [Tue, 11 Jul 2023 09:19:45 +0000 (10:19 +0100)]
target/s390x: Use clmul_64
Use the generic routine for 64-bit carry-less multiply.
Remove our local version of galois_multiply64.
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Richard Henderson [Mon, 21 Aug 2023 15:24:07 +0000 (08:24 -0700)]
target/i386: Use clmul_64
Use generic routine for 64-bit carry-less multiply.
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Richard Henderson [Tue, 11 Jul 2023 09:13:45 +0000 (10:13 +0100)]
target/arm: Use clmul_64
Use generic routine for 64-bit carry-less multiply.
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Richard Henderson [Tue, 11 Jul 2023 09:10:47 +0000 (10:10 +0100)]
crypto: Add generic 64-bit carry-less multiply routine
Reviewed-by: Ard Biesheuvel <ardb@kernel.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Richard Henderson [Tue, 11 Jul 2023 09:01:57 +0000 (10:01 +0100)]
target/ppc: Use clmul_32* routines
Use generic routines for 32-bit carry-less multiply.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Richard Henderson [Tue, 11 Jul 2023 08:58:46 +0000 (09:58 +0100)]
target/s390x: Use clmul_32* routines
Use generic routines for 32-bit carry-less multiply.
Remove our local version of galois_multiply32.
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Richard Henderson [Tue, 11 Jul 2023 08:56:41 +0000 (09:56 +0100)]
target/arm: Use clmul_32* routines
Use generic routines for 32-bit carry-less multiply.
Remove our local version of pmull_d.
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Richard Henderson [Tue, 11 Jul 2023 08:54:06 +0000 (09:54 +0100)]
crypto: Add generic 32-bit carry-less multiply routines
Reviewed-by: Ard Biesheuvel <ardb@kernel.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Richard Henderson [Tue, 11 Jul 2023 08:38:28 +0000 (09:38 +0100)]
target/ppc: Use clmul_16* routines
Use generic routines for 16-bit carry-less multiply.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Richard Henderson [Tue, 11 Jul 2023 08:35:30 +0000 (09:35 +0100)]
target/s390x: Use clmul_16* routines
Use generic routines for 16-bit carry-less multiply.
Remove our local version of galois_multiply16.
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Richard Henderson [Tue, 11 Jul 2023 08:26:24 +0000 (09:26 +0100)]
target/arm: Use clmul_16* routines
Use generic routines for 16-bit carry-less multiply.
Remove our local version of pmull_w.
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Richard Henderson [Tue, 11 Jul 2023 08:14:58 +0000 (09:14 +0100)]
crypto: Add generic 16-bit carry-less multiply routines
Reviewed-by: Ard Biesheuvel <ardb@kernel.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Richard Henderson [Tue, 11 Jul 2023 07:00:21 +0000 (08:00 +0100)]
target/ppc: Use clmul_8* routines
Use generic routines for 8-bit carry-less multiply.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Richard Henderson [Mon, 10 Jul 2023 15:26:49 +0000 (16:26 +0100)]
target/s390x: Use clmul_8* routines
Use generic routines for 8-bit carry-less multiply.
Remove our local version of galois_multiply8.
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Richard Henderson [Mon, 10 Jul 2023 15:07:57 +0000 (16:07 +0100)]
target/arm: Use clmul_8* routines
Use generic routines for 8-bit carry-less multiply.
Remove our local version of pmull_h.
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Richard Henderson [Mon, 10 Jul 2023 14:38:28 +0000 (15:38 +0100)]
crypto: Add generic 8-bit carry-less multiply routines
Reviewed-by: Ard Biesheuvel <ardb@kernel.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Jiajie Chen [Fri, 8 Sep 2023 02:21:22 +0000 (10:21 +0800)]
tcg/loongarch64: Lower rotli_vec to vrotri
Signed-off-by: Jiajie Chen <c@jia.je>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <
20230908022302.180442-16-c@jia.je>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Jiajie Chen [Fri, 8 Sep 2023 02:21:21 +0000 (10:21 +0800)]
tcg/loongarch64: Lower rotv_vec ops to LSX
Lower the following ops:
- rotrv_vec
- rotlv_vec
Signed-off-by: Jiajie Chen <c@jia.je>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <
20230908022302.180442-15-c@jia.je>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Jiajie Chen [Fri, 8 Sep 2023 02:21:20 +0000 (10:21 +0800)]
tcg/loongarch64: Lower vector shift integer ops
Lower the following ops:
- shli_vec
- shrv_vec
- sarv_vec
Signed-off-by: Jiajie Chen <c@jia.je>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <
20230908022302.180442-14-c@jia.je>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Jiajie Chen [Fri, 8 Sep 2023 02:21:19 +0000 (10:21 +0800)]
tcg/loongarch64: Lower bitsel_vec to vbitsel
Signed-off-by: Jiajie Chen <c@jia.je>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <
20230908022302.180442-13-c@jia.je>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Jiajie Chen [Fri, 8 Sep 2023 02:21:18 +0000 (10:21 +0800)]
tcg/loongarch64: Lower vector shift vector ops
Lower the following ops:
- shlv_vec
- shrv_vec
- sarv_vec
Signed-off-by: Jiajie Chen <c@jia.je>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <
20230908022302.180442-12-c@jia.je>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Jiajie Chen [Fri, 8 Sep 2023 02:21:17 +0000 (10:21 +0800)]
tcg/loongarch64: Lower vector saturated ops
Lower the following ops:
- ssadd_vec
- usadd_vec
- sssub_vec
- ussub_vec
Signed-off-by: Jiajie Chen <c@jia.je>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <
20230908022302.180442-11-c@jia.je>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Jiajie Chen [Fri, 8 Sep 2023 02:21:16 +0000 (10:21 +0800)]
tcg/loongarch64: Lower vector min max ops
Lower the following ops:
- smin_vec
- smax_vec
- umin_vec
- umax_vec
Signed-off-by: Jiajie Chen <c@jia.je>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <
20230908022302.180442-10-c@jia.je>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Jiajie Chen [Fri, 8 Sep 2023 02:21:15 +0000 (10:21 +0800)]
tcg/loongarch64: Lower mul_vec to vmul
Signed-off-by: Jiajie Chen <c@jia.je>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <
20230908022302.180442-9-c@jia.je>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Jiajie Chen [Fri, 8 Sep 2023 02:21:14 +0000 (10:21 +0800)]
tcg/loongarch64: Lower neg_vec to vneg
Signed-off-by: Jiajie Chen <c@jia.je>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <
20230908022302.180442-8-c@jia.je>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Jiajie Chen [Fri, 8 Sep 2023 02:21:13 +0000 (10:21 +0800)]
tcg/loongarch64: Lower vector bitwise operations
Lower the following ops:
- and_vec
- andc_vec
- or_vec
- orc_vec
- xor_vec
- nor_vec
- not_vec
Signed-off-by: Jiajie Chen <c@jia.je>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <
20230908022302.180442-7-c@jia.je>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Jiajie Chen [Fri, 8 Sep 2023 02:21:12 +0000 (10:21 +0800)]
tcg/loongarch64: Lower add/sub_vec to vadd/vsub
Lower the following ops:
- add_vec
- sub_vec
Signed-off-by: Jiajie Chen <c@jia.je>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <
20230908022302.180442-6-c@jia.je>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Jiajie Chen [Fri, 8 Sep 2023 02:21:11 +0000 (10:21 +0800)]
tcg/loongarch64: Lower cmp_vec to vseq/vsle/vslt
Signed-off-by: Jiajie Chen <c@jia.je>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <
20230908022302.180442-5-c@jia.je>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Jiajie Chen [Fri, 8 Sep 2023 02:21:10 +0000 (10:21 +0800)]
tcg: pass vece to tcg_target_const_match()
Pass vece to tcg_target_const_match() to allow correct interpretation of
const args of vector ops.
Signed-off-by: Jiajie Chen <c@jia.je>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-Id: <
20230908022302.180442-4-c@jia.je>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Jiajie Chen [Fri, 8 Sep 2023 02:21:09 +0000 (10:21 +0800)]
tcg/loongarch64: Lower basic tcg vec ops to LSX
LSX support on host cpu is detected via hwcap.
Lower the following ops to LSX:
- dup_vec
- dupi_vec
- dupm_vec
- ld_vec
- st_vec
Signed-off-by: Jiajie Chen <c@jia.je>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <
20230908022302.180442-3-c@jia.je>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Jiajie Chen [Fri, 8 Sep 2023 02:21:08 +0000 (10:21 +0800)]
tcg/loongarch64: Import LSX instructions
Add opcodes and encoder functions for LSX.
Generated from
https://github.com/jiegec/loongarch-opcodes/tree/qemu-lsx.
Signed-off-by: Jiajie Chen <c@jia.je>
Acked-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <
20230908022302.180442-2-c@jia.je>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Akihiko Odaki [Tue, 8 Aug 2023 15:23:10 +0000 (00:23 +0900)]
thunk: Delete checks for old host definitions
Alpha, IA-64, and PA-RISC hosts are no longer supported.
Signed-off-by: Akihiko Odaki <akihiko.odaki@daynix.com>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Message-Id: <
20230808152314.102036-1-akihiko.odaki@daynix.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Akihiko Odaki [Sat, 9 Sep 2023 21:40:25 +0000 (14:40 -0700)]
softmmu: Delete checks for old host definitions
PA-RISC host support is already removed with commit
b1cef6d02f ("Drop remaining bits of ia64 host support").
Signed-off-by: Akihiko Odaki <akihiko.odaki@daynix.com>
Message-Id: <
20230810225922.21600-1-akihiko.odaki@daynix.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Akihiko Odaki [Sat, 9 Sep 2023 21:37:24 +0000 (14:37 -0700)]
util: Delete checks for old host definitions
IA-64 and PA-RISC host support is already removed with commit
b1cef6d02f ("Drop remaining bits of ia64 host support").
Signed-off-by: Akihiko Odaki <akihiko.odaki@daynix.com>
Message-Id: <
20230810225922.21600-1-akihiko.odaki@daynix.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
LIU Zhiwei [Fri, 1 Sep 2023 06:01:18 +0000 (14:01 +0800)]
accel/tcg: Fix the comment for CPUTLBEntryFull
When memory region is ram, the lower TARGET_PAGE_BITS is not the
physical section number. Instead, its value is always 0.
Add comment and assert to make it clear.
Signed-off-by: LIU Zhiwei <zhiwei_liu@linux.alibaba.com>
Message-Id: <
20230901060118.379-1-zhiwei_liu@linux.alibaba.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Nicholas Piggin [Tue, 29 Aug 2023 01:06:58 +0000 (11:06 +1000)]
accel/tcg: mttcg remove false-negative halted assertion
mttcg asserts that an execution ending with EXCP_HALTED must have
cpu->halted. However between the event or instruction that sets
cpu->halted and requests exit and the assertion here, an
asynchronous event could clear cpu->halted.
This leads to crashes running AIX on ppc/pseries because it uses
H_CEDE/H_PROD hcalls, where H_CEDE sets self->halted = 1 and
H_PROD sets other cpu->halted = 0 and kicks it.
H_PROD could be turned into an interrupt to wake, but several other
places in ppc, sparc, and semihosting follow what looks like a similar
pattern setting halted = 0 directly. So remove this assertion.
Reported-by: Ivan Warren <ivan@vmfacility.fr>
Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
Message-Id: <
20230829010658.8252-1-npiggin@gmail.com>
[rth: Keep the case label and adjust the comment.]
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Stefan Hajnoczi [Wed, 13 Sep 2023 17:41:57 +0000 (13:41 -0400)]
Merge tag 'pull-tpm-2023-09-12-3' of https://github.com/stefanberger/qemu-tpm into staging
Merge tpm 2023/09/12 v3
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# =WBnS
# -----END PGP SIGNATURE-----
# gpg: Signature made Wed 13 Sep 2023 08:46:00 EDT
# gpg: using RSA key
B818B9CADF9089C2D5CEC66B75AD65802A0B4211
# gpg: Good signature from "Stefan Berger <stefanb@linux.vnet.ibm.com>" [unknown]
# gpg: WARNING: This key is not certified with a trusted signature!
# gpg: There is no indication that the signature belongs to the owner.
# Primary key fingerprint: B818 B9CA DF90 89C2 D5CE C66B 75AD 6580 2A0B 4211
* tag 'pull-tpm-2023-09-12-3' of https://github.com/stefanberger/qemu-tpm:
tpm: fix crash when FD >= 1024 and unnecessary errors due to EINTR
Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
Stefan Hajnoczi [Wed, 13 Sep 2023 17:41:27 +0000 (13:41 -0400)]
Merge tag 'for-upstream' of https://gitlab.com/bonzini/qemu into staging
* target/i386: fix non-optimized compilation on clang
* fix detection of Solaris/IllumOS
# -----BEGIN PGP SIGNATURE-----
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# gpg: Signature made Wed 13 Sep 2023 06:32:39 EDT
# gpg: using RSA key
F13338574B662389866C7682BFFBD25F78C7AE83
# gpg: issuer "pbonzini@redhat.com"
# gpg: Good signature from "Paolo Bonzini <bonzini@gnu.org>" [full]
# gpg: aka "Paolo Bonzini <pbonzini@redhat.com>" [full]
# Primary key fingerprint: 46F5 9FBD 57D6 12E7 BFD4 E2F7 7E15 100C CD36 69B1
# Subkey fingerprint: F133 3857 4B66 2389 866C 7682 BFFB D25F 78C7 AE83
* tag 'for-upstream' of https://gitlab.com/bonzini/qemu:
target/i386: Call accel-agnostic x86_cpu_get_supported_cpuid()
target/i386: Drop accel_uses_host_cpuid before x86_cpu_get_supported_cpuid
target/i386: Check kvm_hyperv_expand_features() return value
meson: Fix targetos match for illumos and Solaris.
Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
Stefan Hajnoczi [Wed, 13 Sep 2023 17:41:09 +0000 (13:41 -0400)]
Merge tag 'nvme-next-pull-request' of https://gitlab.com/birkelund/qemu into staging
hw/nvme updates
Two fixes for dynamic array allocation.
# -----BEGIN PGP SIGNATURE-----
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# gpg: Signature made Tue 12 Sep 2023 10:20:48 EDT
# gpg: using RSA key
522833AA75E2DCE6A24766C04DE1AF316D4F0DE9
# gpg: Good signature from "Klaus Jensen <its@irrelevant.dk>" [unknown]
# gpg: aka "Klaus Jensen <k.jensen@samsung.com>" [unknown]
# gpg: WARNING: This key is not certified with a trusted signature!
# gpg: There is no indication that the signature belongs to the owner.
# Primary key fingerprint: DDCA 4D9C 9EF9 31CC 3468 4272 63D5 6FC5 E55D A838
# Subkey fingerprint: 5228 33AA 75E2 DCE6 A247 66C0 4DE1 AF31 6D4F 0DE9
* tag 'nvme-next-pull-request' of https://gitlab.com/birkelund/qemu:
hw/nvme: Avoid dynamic stack allocation
hw/nvme: Use #define to avoid variable length array
Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
Marc-André Lureau [Mon, 11 Sep 2023 13:25:51 +0000 (17:25 +0400)]
tpm: fix crash when FD >= 1024 and unnecessary errors due to EINTR
Replace select() with poll() to fix a crash when QEMU has a large number
of FDs. Also use RETRY_ON_EINTR to avoid unnecessary errors due to EINTR.
Cc: qemu-stable@nongnu.org
Fixes: https://bugzilla.redhat.com/show_bug.cgi?id=2020133
Fixes: 56a3c24ffc ("tpm: Probe for connected TPM 1.2 or TPM 2")
Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com>
Reviewed-by: Michael Tokarev <mjt@tls.msk.ru>
Reviewed-by: Stefan Berger <stefanb@linux.ibm.com>
Signed-off-by: Stefan Berger <stefanb@linux.ibm.com>
Stefan Hajnoczi [Wed, 13 Sep 2023 11:52:43 +0000 (07:52 -0400)]
Merge tag 'pull-request-2023-09-12' of https://gitlab.com/thuth/qemu into staging
* Enable AP (crypto adapter) instructions for s390x PV-guests
* Allow NVME for s390x machines
* Update Linux headers to v6.6-rc1
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# gpg: Signature made Tue 12 Sep 2023 07:37:51 EDT
# gpg: using RSA key
27B88847EEE0250118F3EAB92ED9D774FE702DB5
# gpg: issuer "thuth@redhat.com"
# gpg: Good signature from "Thomas Huth <th.huth@gmx.de>" [full]
# gpg: aka "Thomas Huth <thuth@redhat.com>" [full]
# gpg: aka "Thomas Huth <huth@tuxfamily.org>" [full]
# gpg: aka "Thomas Huth <th.huth@posteo.de>" [unknown]
# Primary key fingerprint: 27B8 8847 EEE0 2501 18F3 EAB9 2ED9 D774 FE70 2DB5
* tag 'pull-request-2023-09-12' of https://gitlab.com/thuth/qemu:
tests/qtest/pflash: Clean up local variable shadowing
kconfig: Add NVME to s390x machines
target/s390x: AP-passthrough for PV guests
target/s390x/kvm: Refactor AP functionalities
linux-headers: Update to Linux v6.6-rc1
s390x: do a subsystem reset before the unprotect on reboot
s390x/ap: fix missing subsystem reset registration
Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
Stefan Hajnoczi [Wed, 13 Sep 2023 11:52:27 +0000 (07:52 -0400)]
Merge tag 'ui-pull-request' of https://gitlab.com/marcandre.lureau/qemu into staging
UI patch queue
- vhost-user-gpu: support dmabuf modifiers
- fix VNC crash when there are no active_console
- cleanups and refactoring in ui/vc code
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# gpg: Signature made Tue 12 Sep 2023 06:46:22 EDT
# gpg: using RSA key
87A9BD933F87C606D276F62DDAE8E10975969CE5
# gpg: issuer "marcandre.lureau@redhat.com"
# gpg: Good signature from "Marc-André Lureau <marcandre.lureau@redhat.com>" [full]
# gpg: aka "Marc-André Lureau <marcandre.lureau@gmail.com>" [full]
# Primary key fingerprint: 87A9 BD93 3F87 C606 D276 F62D DAE8 E109 7596 9CE5
* tag 'ui-pull-request' of https://gitlab.com/marcandre.lureau/qemu:
ui: add precondition for dpy_get_ui_info()
ui: fix crash when there are no active_console
virtio-gpu/win32: set the destroy function on load
ui/console: move DisplaySurface to its own header
ui/vc: split off the VC part from console.c
ui/vc: preliminary QemuTextConsole changes before split
ui/console: remove redundant format field
ui/vc: rename kbd_put to qemu_text_console functions
ui/vc: remove kbd_put_keysym() and update function calls
vmmouse: use explicit code
vmmouse: replace DPRINTF with tracing
vhost-user-gpu: support dmabuf modifiers
contrib/vhost-user-gpu: add support for sending dmabuf modifiers
docs: vhost-user-gpu: add protocol changes for dmabuf modifiers
Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
Philippe Mathieu-Daudé [Wed, 13 Sep 2023 09:30:05 +0000 (11:30 +0200)]
target/i386: Call accel-agnostic x86_cpu_get_supported_cpuid()
x86_cpu_get_supported_cpuid() is generic and handles the different
accelerators. Use it instead of kvm_arch_get_supported_cpuid().
That fixes a link failure introduced by commit
3adce820cf
("target/i386: Remove unused KVM stubs") when QEMU is configured
as:
$ ./configure --cc=clang \
--target-list=x86_64-linux-user,x86_64-softmmu \
--enable-debug
We were getting:
[71/71] Linking target qemu-x86_64
FAILED: qemu-x86_64
/usr/bin/ld: libqemu-x86_64-linux-user.fa.p/target_i386_cpu.c.o: in function `cpu_x86_cpuid':
cpu.c:(.text+0x1374): undefined reference to `kvm_arch_get_supported_cpuid'
/usr/bin/ld: libqemu-x86_64-linux-user.fa.p/target_i386_cpu.c.o: in function `x86_cpu_filter_features':
cpu.c:(.text+0x81c2): undefined reference to `kvm_arch_get_supported_cpuid'
/usr/bin/ld: cpu.c:(.text+0x81da): undefined reference to `kvm_arch_get_supported_cpuid'
/usr/bin/ld: cpu.c:(.text+0x81f2): undefined reference to `kvm_arch_get_supported_cpuid'
/usr/bin/ld: cpu.c:(.text+0x820a): undefined reference to `kvm_arch_get_supported_cpuid'
/usr/bin/ld: libqemu-x86_64-linux-user.fa.p/target_i386_cpu.c.o:cpu.c:(.text+0x8225): more undefined references to `kvm_arch_get_supported_cpuid' follow
clang: error: linker command failed with exit code 1 (use -v to see invocation)
ninja: build stopped: subcommand failed.
For the record, this is because '--enable-debug' disables
optimizations (CFLAGS=-O0).
While at this (un)optimization level GCC eliminate the
following dead code (CPP output of mentioned build):
static void x86_cpu_get_supported_cpuid(uint32_t func, uint32_t index,
uint32_t *eax, uint32_t *ebx,
uint32_t *ecx, uint32_t *edx)
{
if ((0)) {
*eax = kvm_arch_get_supported_cpuid(kvm_state, func, index, R_EAX);
*ebx = kvm_arch_get_supported_cpuid(kvm_state, func, index, R_EBX);
*ecx = kvm_arch_get_supported_cpuid(kvm_state, func, index, R_ECX);
*edx = kvm_arch_get_supported_cpuid(kvm_state, func, index, R_EDX);
} else if (0) {
*eax = 0;
*ebx = 0;
*ecx = 0;
*edx = 0;
} else {
*eax = 0;
*ebx = 0;
*ecx = 0;
*edx = 0;
}
Clang does not (see commit
2140cfa51d "i386: Fix build by
providing stub kvm_arch_get_supported_cpuid()").
Cc: qemu-stable@nongnu.org
Fixes: 3adce820cf ("target/i386: Remove unused KVM stubs")
Reported-by: Kevin Wolf <kwolf@redhat.com>
Suggested-by: Paolo Bonzini <pbonzini@redhat.com>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-ID: <
20230913093009.83520-4-philmd@linaro.org>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Philippe Mathieu-Daudé [Wed, 13 Sep 2023 09:30:04 +0000 (11:30 +0200)]
target/i386: Drop accel_uses_host_cpuid before x86_cpu_get_supported_cpuid
x86_cpu_get_supported_cpuid() already checks for KVM/HVF
accelerators, so it is not needed to manually check it via
a call to accel_uses_host_cpuid() before calling it.
Suggested-by: Paolo Bonzini <pbonzini@redhat.com>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-ID: <
20230913093009.83520-3-philmd@linaro.org>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Philippe Mathieu-Daudé [Wed, 13 Sep 2023 09:30:03 +0000 (11:30 +0200)]
target/i386: Check kvm_hyperv_expand_features() return value
In case more code is added after the kvm_hyperv_expand_features()
call, check its return value (since it can fail).
Fixes: 071ce4b03b ("i386: expand Hyper-V features during CPU feature expansion time")
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-ID: <
20230913093009.83520-2-philmd@linaro.org>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>