Collin Walling [Tue, 15 Sep 2020 19:44:13 +0000 (15:44 -0400)]
s390/sclp: use cpu offset to locate cpu entries
The start of the CPU entry region in the Read SCP Info response data is
denoted by the offset_cpu field. As such, QEMU needs to begin creating
entries at this address.
This is in preparation for when Read SCP Info inevitably introduces new
bytes that push the start of the CPUEntry field further away.
Read CPU Info is unlikely to ever change, so let's not bother
accounting for the offset there.
Signed-off-by: Collin Walling <walling@linux.ibm.com>
Reviewed-by: Thomas Huth <thuth@redhat.com>
Reviewed-by: Cornelia Huck <cohuck@redhat.com>
Reviewed-by: Claudio Imbrenda <imbrenda@linux.ibm.com>
Message-Id: <
20200915194416.107460-6-walling@linux.ibm.com>
Signed-off-by: Cornelia Huck <cohuck@redhat.com>
Collin Walling [Tue, 15 Sep 2020 19:44:12 +0000 (15:44 -0400)]
s390/sclp: check sccb len before filling in data
The SCCB must be checked for a sufficient length before it is filled
with any data. If the length is insufficient, then the SCLP command
is suppressed and the proper response code is set in the SCCB header.
While we're at it, let's cleanup the length check by placing the
calculation inside a macro.
Fixes: 832be0d8a3bb ("s390x: sclp: Report insufficient SCCB length")
Signed-off-by: Collin Walling <walling@linux.ibm.com>
Reviewed-by: Janosch Frank <frankja@linux.ibm.com>
Reviewed-by: David Hildenbrand <david@redhat.com>
Reviewed-by: Cornelia Huck <cohuck@redhat.com>
Reviewed-by: Thomas Huth <thuth@redhat.com>
Reviewed-by: Claudio Imbrenda <imbrenda@linux.ibm.com>
Message-Id: <
20200915194416.107460-5-walling@linux.ibm.com>
Signed-off-by: Cornelia Huck <cohuck@redhat.com>
Collin Walling [Tue, 15 Sep 2020 19:44:11 +0000 (15:44 -0400)]
s390/sclp: read sccb from mem based on provided length
The header contained within the SCCB passed to the SCLP service call
contains the actual length of the SCCB. Instead of allocating a static
4K size for the work sccb, let's allow for a variable size determined
by the value in the header. The proper checks are already in place to
ensure the SCCB length is sufficent to store a full response and that
the length does not cross any explicitly-set boundaries.
Signed-off-by: Collin Walling <walling@linux.ibm.com>
Reviewed-by: Thomas Huth <thuth@redhat.com>
Reviewed-by: Claudio Imbrenda <imbrenda@linux.ibm.com>
Message-Id: <
20200915194416.107460-4-walling@linux.ibm.com>
Signed-off-by: Cornelia Huck <cohuck@redhat.com>
Collin Walling [Tue, 15 Sep 2020 19:44:10 +0000 (15:44 -0400)]
s390/sclp: rework sclp boundary checks
Rework the SCLP boundary check to account for different SCLP commands
(eventually) allowing different boundary sizes.
Signed-off-by: Collin Walling <walling@linux.ibm.com>
Reviewed-by: Cornelia Huck <cohuck@redhat.com>
Reviewed-by: Thomas Huth <thuth@redhat.com>
Acked-by: Janosch Frank <frankja@linux.ibm.com>
Reviewed-by: Claudio Imbrenda <imbrenda@linux.ibm.com>
Message-Id: <
20200915194416.107460-3-walling@linux.ibm.com>
Signed-off-by: Cornelia Huck <cohuck@redhat.com>
Collin Walling [Tue, 15 Sep 2020 19:44:09 +0000 (15:44 -0400)]
s390/sclp: get machine once during read scp/cpu info
Functions within read scp/cpu info will need access to the machine
state. Let's make a call to retrieve the machine state once and
pass the appropriate data to the respective functions.
Signed-off-by: Collin Walling <walling@linux.ibm.com>
Reviewed-by: David Hildenbrand <david@redhat.com>
Reviewed-by: Thomas Huth <thuth@redhat.com>
Reviewed-by: Janosch Frank <frankja@linux.ibm.com>
Reviewed-by: Cornelia Huck <cohuck@redhat.com>
Reviewed-by: Claudio Imbrenda <imbrenda@linux.ibm.com>
Message-Id: <
20200915194416.107460-2-walling@linux.ibm.com>
Signed-off-by: Cornelia Huck <cohuck@redhat.com>
Philippe Mathieu-Daudé [Mon, 7 Sep 2020 02:40:20 +0000 (04:40 +0200)]
hw/s390x/css: Remove double initialization
Fix eventual copy/paste mistake introduced in commit
bc994b74ea
("s390x/css: Use static initialization for channel_subsys fields").
Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Reviewed-by: Thomas Huth <thuth@redhat.com>
Message-Id: <
20200907024020.854465-1-philmd@redhat.com>
Signed-off-by: Cornelia Huck <cohuck@redhat.com>
Peter Maydell [Thu, 1 Oct 2020 18:55:10 +0000 (19:55 +0100)]
Merge remote-tracking branch 'remotes/jsnow-gitlab/tags/ide-pull-request' into staging
Pull request
# gpg: Signature made Thu 01 Oct 2020 18:41:05 BST
# gpg: using RSA key
F9B7ABDBBCACDF95BE76CBD07DEF8106AAFC390E
# gpg: Good signature from "John Snow (John Huston) <jsnow@redhat.com>" [full]
# Primary key fingerprint: FAEB 9711 A12C F475 812F 18F2 88A9 064D 1835 61EB
# Subkey fingerprint: F9B7 ABDB BCAC DF95 BE76 CBD0 7DEF 8106 AAFC 390E
* remotes/jsnow-gitlab/tags/ide-pull-request:
ide: cancel pending callbacks on SRST
ide: clear interrupt on command write
ide: remove magic constants from the device register
ide: reorder set/get sector functions
ide: model HOB correctly
ide: don't tamper with the device register
ide: rename cmd_write to ctrl_write
hw/ide/ahci: Do not dma_memory_unmap(NULL)
MAINTAINERS: Update my git address
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
John Snow [Fri, 24 Jul 2020 05:23:00 +0000 (01:23 -0400)]
ide: cancel pending callbacks on SRST
The SRST implementation did not keep up with the rest of IDE; it is
possible to perform a weak reset on an IDE device to remove the BSY/DRQ
bits, and then issue writes to the control/device registers which can
cause chaos with the state machine.
Fix that by actually performing a real reset.
Reported-by: Alexander Bulekov <alxndr@bu.edu>
Fixes: https://bugs.launchpad.net/qemu/+bug/1878253
Fixes: https://bugs.launchpad.net/qemu/+bug/1887303
Fixes: https://bugs.launchpad.net/qemu/+bug/1887309
Signed-off-by: John Snow <jsnow@redhat.com>
John Snow [Fri, 24 Jul 2020 05:22:59 +0000 (01:22 -0400)]
ide: clear interrupt on command write
Not known to fix any bug, but I couldn't help but notice that ATA
specifies that writing to this register should clear an interrupt.
ATA7: Section 5.3.3 (Command register - Effect)
ATA6: Section 7.4.4 (Command register - Effect)
ATA5: Section 7.4.4 (Command register - Effect)
ATA4: Section 7.4.4 (Command register - Effect)
ATA3: Section 5.2.2 (Command register)
Other editions: try searching for the phrase "Writing this register".
Signed-off-by: John Snow <jsnow@redhat.com>
John Snow [Fri, 24 Jul 2020 05:22:58 +0000 (01:22 -0400)]
ide: remove magic constants from the device register
(In QEMU, we call this the "select" register.)
My memory isn't good enough to memorize what these magic runes
do. Label them to prevent mixups from happening in the future.
Side note: I assume it's safe to always set 0xA0 even though ATA2 claims
these bits are reserved, because ATA3 immediately reinstated that these
bits should be always on. ATA4 and subsequent specs only claim that the
fields are obsolete, so I assume it's safe to leave these set and that
it should work with the widest array of guests.
Signed-off-by: John Snow <jsnow@redhat.com>
John Snow [Fri, 24 Jul 2020 05:22:57 +0000 (01:22 -0400)]
ide: reorder set/get sector functions
Reorder these just a pinch to make them more obvious at a glance what
the addressing mode is.
Signed-off-by: John Snow <jsnow@redhat.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
John Snow [Fri, 24 Jul 2020 05:22:56 +0000 (01:22 -0400)]
ide: model HOB correctly
I have been staring at this FIXME for years and I never knew what it
meant. I finally stumbled across it!
When writing to the command registers, the old value is shifted into a
HOB copy of the register and the new value is written into the primary
register. When reading registers, the value retrieved is dependent on
the HOB bit in the CONTROL register.
By setting bit 7 (0x80) in CONTROL, any register read will, if it has
one, yield the HOB value for that register instead.
Our code has a problem: We were using bit 7 of the DEVICE register to
model this. We use bus->cmd roughly as the control register already, as
it stores the value from ide_ctrl_write.
Lastly, all command register writes reset the HOB, so fix that, too.
Signed-off-by: John Snow <jsnow@redhat.com>
John Snow [Fri, 24 Jul 2020 05:22:55 +0000 (01:22 -0400)]
ide: don't tamper with the device register
In real ISA operation, register writes go out to an entire bus channel
and all listening devices receive the write. The devices do not toggle
the DEV bit based on their own configuration, nor does the HBA
intermediate or tamper with that value.
The reality of the matter is that DEV0/DEV1 accordingly will react to
command register writes based on whether or not the device was selected.
This does not fix a known bug, but it makes the code slightly simpler
and more obvious.
Signed-off-by: John Snow <jsnow@redhat.com>
John Snow [Fri, 24 Jul 2020 05:22:54 +0000 (01:22 -0400)]
ide: rename cmd_write to ctrl_write
It's the Control register, part of the Control block -- Command is
misleading here. Rename all related functions and constants.
Signed-off-by: John Snow <jsnow@redhat.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Philippe Mathieu-Daudé [Sat, 18 Jul 2020 07:28:54 +0000 (09:28 +0200)]
hw/ide/ahci: Do not dma_memory_unmap(NULL)
libFuzzer triggered the following assertion:
cat << EOF | qemu-system-i386 -M pc-q35-5.0 \
-nographic -monitor none -serial none -qtest stdio
outl 0xcf8 0x8000fa24
outl 0xcfc 0xe1068000
outl 0xcf8 0x8000fa04
outw 0xcfc 0x7
outl 0xcf8 0x8000fb20
write 0xe1068304 0x1 0x21
write 0xe1068318 0x1 0x21
write 0xe1068384 0x1 0x21
write 0xe1068398 0x2 0x21
EOF
qemu-system-i386: exec.c:3621: address_space_unmap: Assertion `mr != NULL' failed.
Aborted (core dumped)
This is because we don't check the return value from dma_memory_map()
which can return NULL, then we call dma_memory_unmap(NULL) which is
illegal. Fix by only unmap if the value is not NULL (and the size is
not the expected one).
Cc: qemu-stable@nongnu.org
Reported-by: Alexander Bulekov <alxndr@bu.edu>
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-id:
20200718072854.7001-1-f4bug@amsat.org
Fixes: f6ad2e32f8 ("ahci: add ahci emulation")
BugLink: https://bugs.launchpad.net/qemu/+bug/1884693
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: John Snow <jsnow@redhat.com>
Signed-off-by: John Snow <jsnow@redhat.com>
John Snow [Thu, 1 Oct 2020 16:24:01 +0000 (12:24 -0400)]
MAINTAINERS: Update my git address
I am switching from github to gitlab.
Signed-off-by: John Snow <jsnow@redhat.com>
Peter Maydell [Thu, 1 Oct 2020 15:41:30 +0000 (16:41 +0100)]
Merge remote-tracking branch 'remotes/pmaydell/tags/pull-target-arm-
20201001' into staging
target-arm queue:
* Make isar_feature_aa32_fp16_arith() handle M-profile
* Fix SVE splice
* Fix SVE LDR/STR
* Remove ignore_memory_transaction_failures on the raspi2
* raspi: Various cleanup/refactoring
# gpg: Signature made Thu 01 Oct 2020 15:46:47 BST
# gpg: using RSA key
E1A5C593CD419DE28E8315CF3C2525ED14360CDE
# gpg: issuer "peter.maydell@linaro.org"
# gpg: Good signature from "Peter Maydell <peter.maydell@linaro.org>" [ultimate]
# gpg: aka "Peter Maydell <pmaydell@gmail.com>" [ultimate]
# gpg: aka "Peter Maydell <pmaydell@chiark.greenend.org.uk>" [ultimate]
# Primary key fingerprint: E1A5 C593 CD41 9DE2 8E83 15CF 3C25 25ED 1436 0CDE
* remotes/pmaydell/tags/pull-target-arm-
20201001:
hw/arm/raspi: Remove use of the 'version' value in the board code
hw/arm/raspi: Use RaspiProcessorId to set the firmware load address
hw/arm/raspi: Introduce RaspiProcessorId enum
hw/arm/raspi: Use more specific machine names
hw/arm/raspi: Avoid using TypeInfo::class_data pointer
hw/arm/raspi: Move arm_boot_info structure to RaspiMachineState
hw/arm/raspi: Load the firmware on the first core
hw/arm/raspi: Display the board revision in the machine description
hw/arm/raspi: Remove ignore_memory_transaction_failures on the raspi2
hw/arm/bcm2835: Add more unimplemented peripherals
hw/arm/raspi: Define various blocks base addresses
target/arm: Fix SVE splice
target/arm: Fix sve ldr/str
target/arm: Make isar_feature_aa32_fp16_arith() handle M-profile
target/arm: Add ID register values for Cortex-M0
hw/intc/armv7m_nvic: Only show ID register values for Main Extension CPUs
target/arm: Move id_pfr0, id_pfr1 into ARMISARegisters
target/arm: Replace ARM_FEATURE_PXN with ID_MMFR0.VMSA check
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Philippe Mathieu-Daudé [Thu, 24 Sep 2020 11:18:08 +0000 (13:18 +0200)]
hw/arm/raspi: Remove use of the 'version' value in the board code
We expected the 'version' ID to match the board processor ID,
but this is not always true (for example boards with revision
id 0xa02042/0xa22042 are Raspberry Pi 2 with a BCM2837 SoC).
This was not important because we were not modelling them, but
since the recent refactor now allow to model these boards, it
is safer to check the processor id directly. Remove the version
check.
Suggested-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Luc Michel <luc.michel@greensocs.com>
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-id:
20200924111808.77168-9-f4bug@amsat.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Philippe Mathieu-Daudé [Thu, 24 Sep 2020 11:18:07 +0000 (13:18 +0200)]
hw/arm/raspi: Use RaspiProcessorId to set the firmware load address
The firmware load address depends on the SoC ("processor id") used,
not on the version of the board.
Suggested-by: Luc Michel <luc.michel@greensocs.com>
Reviewed-by: Luc Michel <luc.michel@greensocs.com>
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-id:
20200924111808.77168-8-f4bug@amsat.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Philippe Mathieu-Daudé [Thu, 24 Sep 2020 11:18:06 +0000 (13:18 +0200)]
hw/arm/raspi: Introduce RaspiProcessorId enum
As we only support a reduced set of the REV_CODE_PROCESSOR id
encoded in the board revision, define the PROCESSOR_ID values
as an enum. We can simplify the board_soc_type and cores_count
methods.
Reviewed-by: Luc Michel <luc.michel@greensocs.com>
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-id:
20200924111808.77168-7-f4bug@amsat.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Philippe Mathieu-Daudé [Thu, 24 Sep 2020 11:18:05 +0000 (13:18 +0200)]
hw/arm/raspi: Use more specific machine names
Now that we can instantiate different machines based on their
board_rev register value, we can have various raspi2 and raspi3.
In commit
fc78a990ec103 we corrected the machine description.
Correct the machine names too. For backward compatibility, add
an alias to the previous generic name.
Reviewed-by: Luc Michel <luc.michel@greensocs.com>
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-id:
20200924111808.77168-6-f4bug@amsat.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Philippe Mathieu-Daudé [Thu, 24 Sep 2020 11:18:04 +0000 (13:18 +0200)]
hw/arm/raspi: Avoid using TypeInfo::class_data pointer
Using class_data pointer to create a MachineClass is not
the recommended way anymore. The correct way is to open-code
the MachineClass::fields in the class_init() method.
We can not use TYPE_RASPI_MACHINE::class_base_init() because
it is called *before* each machine class_init(), therefore the
board_rev field is not populated. We have to manually call
raspi_machine_class_common_init() for each machine.
This partly reverts commit
a03bde3674e.
Suggested-by: Igor Mammedov <imammedo@redhat.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Igor Mammedov <imammedo@redhat.com>
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-id:
20200924111808.77168-5-f4bug@amsat.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Philippe Mathieu-Daudé [Thu, 24 Sep 2020 11:18:03 +0000 (13:18 +0200)]
hw/arm/raspi: Move arm_boot_info structure to RaspiMachineState
The arm_boot_info structure belong to the machine,
move it to RaspiMachineState.
Reviewed-by: Luc Michel <luc.michel@greensocs.com>
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-id:
20200924111808.77168-4-f4bug@amsat.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Philippe Mathieu-Daudé [Thu, 24 Sep 2020 11:18:02 +0000 (13:18 +0200)]
hw/arm/raspi: Load the firmware on the first core
The 'first_cpu' is more a QEMU accelerator-related concept
than a variable the machine requires to use.
Since the machine is aware of its CPUs, directly use the
first one to load the firmware.
Reviewed-by: Luc Michel <luc.michel@greensocs.com>
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-id:
20200924111808.77168-3-f4bug@amsat.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Philippe Mathieu-Daudé [Thu, 24 Sep 2020 11:18:01 +0000 (13:18 +0200)]
hw/arm/raspi: Display the board revision in the machine description
Display the board revision in the machine description.
Before:
$ qemu-system-aarch64 -M help | fgrep raspi
raspi2 Raspberry Pi 2B
raspi3 Raspberry Pi 3B
After:
raspi2 Raspberry Pi 2B (revision 1.1)
raspi3 Raspberry Pi 3B (revision 1.2)
Reviewed-by: Luc Michel <luc.michel@greensocs.com>
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-id:
20200924111808.77168-2-f4bug@amsat.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Philippe Mathieu-Daudé [Mon, 21 Sep 2020 03:47:29 +0000 (05:47 +0200)]
hw/arm/raspi: Remove ignore_memory_transaction_failures on the raspi2
Commit
1c3db49d39 added the raspi3, which uses the same peripherals
than the raspi2 (but with different ARM cores). The raspi3 was
introduced without the ignore_memory_transaction_failures flag.
Almost 2 years later, the machine is usable running U-Boot and
Linux.
In commit
00cbd5bd74 we mapped a lot of unimplemented devices,
commit
d442d95f added thermal block and commit
0e5bbd7406 the
system timer.
As we are happy with the raspi3, let's remove this flag on the
raspi2.
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Luc Michel <luc.michel@greensocs.com>
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-id:
20200921034729.432931-4-f4bug@amsat.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Philippe Mathieu-Daudé [Mon, 21 Sep 2020 03:47:28 +0000 (05:47 +0200)]
hw/arm/bcm2835: Add more unimplemented peripherals
The bcm2835-v3d is used since Linux 4.7, see commit
49ac67e0c39c ("ARM: bcm2835: Add VC4 to the device tree"),
and the bcm2835-txp since Linux 4.19, see commit
b7dd29b401f5 ("ARM: dts: bcm283x: Add Transposer block").
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Luc Michel <luc.michel@greensocs.com>
Message-id:
20200921034729.432931-3-f4bug@amsat.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Philippe Mathieu-Daudé [Mon, 21 Sep 2020 03:47:27 +0000 (05:47 +0200)]
hw/arm/raspi: Define various blocks base addresses
The Raspberry firmware is closed-source. While running it, it
accesses various I/O registers. Logging these accesses as UNIMP
(unimplemented) help to understand what the firmware is doing
(ideally we want it able to boot a Linux kernel).
Document various blocks we might use later.
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Luc Michel <luc.michel@greensocs.com>
Message-id:
20200921034729.432931-2-f4bug@amsat.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Richard Henderson [Fri, 18 Sep 2020 00:05:00 +0000 (17:05 -0700)]
target/arm: Fix SVE splice
While converting to gen_gvec_ool_zzzp, we lost passing
a->esz as the data argument to the function.
Fixes: 36cbb7a8e71
Cc: qemu-stable@nongnu.org
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id:
20200918000500.
2690937-1-richard.henderson@linaro.org
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Richard Henderson [Wed, 16 Sep 2020 01:41:02 +0000 (18:41 -0700)]
target/arm: Fix sve ldr/str
The mte update missed a bit when producing clean addresses.
Fixes: b2aa8879b88
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id:
20200916014102.
2446323-1-richard.henderson@linaro.org
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Peter Maydell [Thu, 10 Sep 2020 17:38:55 +0000 (18:38 +0100)]
target/arm: Make isar_feature_aa32_fp16_arith() handle M-profile
The M-profile definition of the MVFR1 ID register differs slightly
from the A-profile one, and in particular the check for "does the CPU
support fp16 arithmetic" is not the same.
We don't currently implement any M-profile CPUs with fp16 arithmetic,
so this is not yet a visible bug, but correcting the logic now
disarms this beartrap for when we eventually do.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-id:
20200910173855.4068-6-peter.maydell@linaro.org
Peter Maydell [Thu, 10 Sep 2020 17:38:54 +0000 (18:38 +0100)]
target/arm: Add ID register values for Cortex-M0
Give the Cortex-M0 ID register values corresponding to its
implemented behaviour. These will not be guest-visible but will be
used to govern the behaviour of QEMU's emulation. We use the same
values that the Cortex-M3 does.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-id:
20200910173855.4068-5-peter.maydell@linaro.org
Peter Maydell [Thu, 10 Sep 2020 17:38:53 +0000 (18:38 +0100)]
hw/intc/armv7m_nvic: Only show ID register values for Main Extension CPUs
M-profile CPUs only implement the ID registers as guest-visible if
the CPU implements the Main Extension (all our current CPUs except
the Cortex-M0 do).
Currently we handle this by having the Cortex-M0 leave the ID
register values in the ARMCPU struct as zero, but this conflicts with
our design decision to make QEMU behaviour be keyed off ID register
fields wherever possible.
Explicitly code the ID registers in the NVIC to return 0 if the Main
Extension is not implemented, so we can make the M0 model set the
ARMCPU struct fields to obtain the correct behaviour without those
values becoming guest-visible.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-id:
20200910173855.4068-4-peter.maydell@linaro.org
Peter Maydell [Thu, 10 Sep 2020 17:38:52 +0000 (18:38 +0100)]
target/arm: Move id_pfr0, id_pfr1 into ARMISARegisters
Move the id_pfr0 and id_pfr1 fields into the ARMISARegisters
sub-struct. We're going to want id_pfr1 for an isar_features
check, and moving both at the same time avoids an odd
inconsistency.
Changes other than the ones to cpu.h and kvm64.c made
automatically with:
perl -p -i -e 's/cpu->id_pfr/cpu->isar.id_pfr/' target/arm/*.c hw/intc/armv7m_nvic.c
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-id:
20200910173855.4068-3-peter.maydell@linaro.org
Peter Maydell [Thu, 10 Sep 2020 17:38:51 +0000 (18:38 +0100)]
target/arm: Replace ARM_FEATURE_PXN with ID_MMFR0.VMSA check
The ARM_FEATURE_PXN bit indicates whether the CPU supports the PXN
bit in short-descriptor translation table format descriptors. This
is indicated by ID_MMFR0.VMSA being at least 0b0100. Replace the
feature bit with an ID register check, in line with our preference
for ID register checks over feature bits.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-id:
20200910173855.4068-2-peter.maydell@linaro.org
Peter Maydell [Thu, 1 Oct 2020 14:28:55 +0000 (15:28 +0100)]
Merge remote-tracking branch 'remotes/kraxel/tags/microvm-
20200930-pull-request' into staging
microvm: add pcie support.
# gpg: Signature made Wed 30 Sep 2020 18:48:41 BST
# gpg: using RSA key
4CB6D8EED3E87138
# gpg: Good signature from "Gerd Hoffmann (work) <kraxel@redhat.com>" [full]
# gpg: aka "Gerd Hoffmann <gerd@kraxel.org>" [full]
# gpg: aka "Gerd Hoffmann (private) <kraxel@gmail.com>" [full]
# Primary key fingerprint: A032 8CFF B93A 17A7 9901 FE7D 4CB6 D8EE D3E8 7138
* remotes/kraxel/tags/microvm-
20200930-pull-request:
tests/acpi: update expected data files
acpi/gpex: no reason to use a method for _CRS
tests/acpi: add microvm pcie test
tests/acpi: factor out common microvm test setup
tests/acpi: add empty tests/data/acpi/microvm/DSDT.pcie file
tests/acpi: allow updates for expected data files
microvm/pcie: add 64bit mmio window
microvm: add pcie support
microvm: add irq table
arm: use acpi_dsdt_add_gpex
acpi: add acpi_dsdt_add_gpex
move MemMapEntry
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Peter Maydell [Thu, 1 Oct 2020 11:23:19 +0000 (12:23 +0100)]
Merge remote-tracking branch 'remotes/bonzini-gitlab/tags/for-upstream' into staging
* SCSI fix (Dmitry, Li Feng, Li Qiang)
* memory API fixes (Eduardo)
* removal of deprecated '-numa node', 'cpu-add', '-smp' (Igor)
* ACPI fix for VMBus (Jon)
* relocatable install (myself)
* always remove docker containers (myself)
* serial cleanups (Philippe)
* vmware cpuid leaf for tsc and apic frequency (Sunil)
* KVM_FEATURE_ASYNC_PF_INT support (Vitaly)
* i386 XSAVE bugfix (Xiaoyao)
* QOM developer documentation in docs/devel (Eduardo)
* new checkpatch tests (Dov)
* x86_64 syscall fix (Douglas)
* interrupt-based APF fix (Vitaly)
* always create kvmclock (Vitaly)
* fix bios-tables-test (Eduardo)
* KVM PV features cleanup (myself)
* CAN FD (Pavel)
meson:
* fixes (Marc-André, Max, Stefan, Alexander, myself)
* moved libmpathpersist, cocoa, malloc tests (myself)
* support for 0.56 introspected test dependencies (myself)
# gpg: Signature made Wed 30 Sep 2020 18:11:45 BST
# gpg: using RSA key
F13338574B662389866C7682BFFBD25F78C7AE83
# gpg: issuer "pbonzini@redhat.com"
# gpg: Good signature from "Paolo Bonzini <bonzini@gnu.org>" [full]
# gpg: aka "Paolo Bonzini <pbonzini@redhat.com>" [full]
# Primary key fingerprint: 46F5 9FBD 57D6 12E7 BFD4 E2F7 7E15 100C CD36 69B1
# Subkey fingerprint: F133 3857 4B66 2389 866C 7682 BFFB D25F 78C7 AE83
* remotes/bonzini-gitlab/tags/for-upstream: (86 commits)
hw/net/can: Correct Kconfig dependencies
hw/net/can: Documentation for CTU CAN FD IP open hardware core emulation.
hw/net/can: CTU CAN FD IP open hardware core emulation.
hw/net/can/ctucafd: Add CTU CAN FD core register definitions.
net/can: Add can_dlc2len and can_len2dlc for CAN FD.
hw/net/can: sja1000 ignore CAN FD frames
net/can: Initial host SocketCan support for CAN FD.
target/i386: kvm: do not use kvm_check_extension to find paravirtual capabilities
bios-tables-test: Remove kernel-irqchip=off option
target/i386: always create kvmclock device
target/i386: Fix VM migration when interrupt based APF is enabled
helper_syscall x86_64: clear exception_is_int
checkpatch: Detect '%#' or '%0#' in printf-style format strings
typedefs: Restrict PCMachineState to 'hw/i386/pc.h'
hw/xen: Split x86-specific declaration from generic hardware ones
stubs: Split accelerator / hardware related stubs
sysemu/xen: Add missing 'exec/cpu-common.h' header for ram_addr_t type
hw/i386/xen: Rename X86/PC specific function as xen_hvm_init_pc()
docs: Move object.h overview doc comment to qom.rst
docs: Create docs/devel/qom.rst
...
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Pavel Pisa [Mon, 14 Sep 2020 08:13:42 +0000 (10:13 +0200)]
hw/net/can: Correct Kconfig dependencies
The original CAN_PCI config option enables multiple SJA1000 PCI boards
emulation build. These boards bridge SJA1000 into I/O or memory
address space of the host CPU and depend on SJA1000 emulation.
Signed-off-by: Pavel Pisa <pisa@cmp.felk.cvut.cz>
Message-Id: <
dd332de687bfe52bbec37f5de1d861fb8e620d74.
1600069689.git.pisa@cmp.felk.cvut.cz>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Pavel Pisa [Mon, 14 Sep 2020 08:13:41 +0000 (10:13 +0200)]
hw/net/can: Documentation for CTU CAN FD IP open hardware core emulation.
Updated MAINTAINERS for CAN bus related emulation as well.
Signed-off-by: Pavel Pisa <pisa@cmp.felk.cvut.cz>
Message-Id: <
6d1b8db69efc4e5cfad702d2150e1960e8f63572.
1600069689.git.pisa@cmp.felk.cvut.cz>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Jan Charvat [Mon, 14 Sep 2020 08:13:40 +0000 (10:13 +0200)]
hw/net/can: CTU CAN FD IP open hardware core emulation.
The implementation of the model of complete open-source/design/hardware
CAN FD controller. The IP core project has been started and is maintained
by Ondrej Ille at Czech Technical University in Prague.
CTU CAN FD project pages:
https://gitlab.fel.cvut.cz/canbus/ctucanfd_ip_core
CAN bus CTU FEE Projects Listing page:
http://canbus.pages.fel.cvut.cz/
The core is mapped to PCIe card same as on one of its real hardware
adaptations. The device implementing two CTU CAN FD ip cores
is instantiated after CAN bus definition
-object can-bus,id=canbus0-bus
by QEMU parameters
-device ctucan_pci,canbus0=canbus0-bus,canbus1=canbus0-bus
Signed-off-by: Jan Charvat <charvj10@fel.cvut.cz>
Signed-off-by: Pavel Pisa <pisa@cmp.felk.cvut.cz>
Message-Id: <
23e3ca4dcb2cc9900991016910a6cab7686c0e31.
1600069689.git.pisa@cmp.felk.cvut.cz>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Jan Charvat [Mon, 14 Sep 2020 08:13:39 +0000 (10:13 +0200)]
hw/net/can/ctucafd: Add CTU CAN FD core register definitions.
Definitions of registers and CAN FD frame message box of CTU CAN FD
IP core are generated the specification in CACTUS/IP-XACT format.
CTU CAN FD IP core repository
https://gitlab.fel.cvut.cz/canbus/ctucanfd_ip_core
The location of the CTU CAN IP core specification within
IP core design
spec/CTU/ip/CAN_FD_IP_Core/2.1/CAN_FD_IP_Core.2.1.xml
The header files are generated by pyXact_generator designed
by Ondrej Ille which is based on ipyxact_parser.
The specification is source of header files for driver and emulation,
documentation and VHDL registers map implementation.
Signed-off-by: Jan Charvat <charvj10@fel.cvut.cz>
Signed-off-by: Pavel Pisa <pisa@cmp.felk.cvut.cz>
Message-Id: <
97ae620f724bf1d76f127aaf628f7aec3af0a11c.
1600069689.git.pisa@cmp.felk.cvut.cz>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Jan Charvat [Mon, 14 Sep 2020 08:13:38 +0000 (10:13 +0200)]
net/can: Add can_dlc2len and can_len2dlc for CAN FD.
Signed-off-by: Jan Charvat <charvj10@fel.cvut.cz>
Signed-off-by: Pavel Pisa <pisa@cmp.felk.cvut.cz>
Reviewed-by: Vikram Garhwal <fnu.vikram@xilinx.com>
Message-Id: <
0a2efc6ef9c458505952ed230e49ae25cad7f324.
1600069689.git.pisa@cmp.felk.cvut.cz>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Jan Charvat [Mon, 14 Sep 2020 08:13:37 +0000 (10:13 +0200)]
hw/net/can: sja1000 ignore CAN FD frames
Signed-off-by: Jan Charvat <charvj10@fel.cvut.cz>
Signed-off-by: Pavel Pisa <pisa@cmp.felk.cvut.cz>
Reviewed-by: Vikram Garhwal <fnu.vikram@xilinx.com>
Message-Id: <
48d9ebf6b64e7652851c12fe4566e06b44803372.
1600069689.git.pisa@cmp.felk.cvut.cz>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Jan Charvat [Mon, 14 Sep 2020 08:09:02 +0000 (10:09 +0200)]
net/can: Initial host SocketCan support for CAN FD.
Signed-off-by: Jan Charvat <charvj10@fel.cvut.cz>
Signed-off-by: Pavel Pisa <pisa@cmp.felk.cvut.cz>
Reviewed-by: Vikram Garhwal <fnu.vikram@xilinx.com>
Message-Id: <
41383d4eb3f35586c696a8e29c4dff4031a81338.
1600069689.git.pisa@cmp.felk.cvut.cz>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Paolo Bonzini [Wed, 23 Sep 2020 03:01:39 +0000 (23:01 -0400)]
target/i386: kvm: do not use kvm_check_extension to find paravirtual capabilities
Paravirtualized features have been listed in KVM_GET_SUPPORTED_CPUID since
Linux 2.6.35 (commit
84478c829d0f, "KVM: x86: export paravirtual cpuid flags
in KVM_GET_SUPPORTED_CPUID", 2010-05-19). It has been more than 10 years,
so remove the fallback code.
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Eduardo Habkost [Tue, 22 Sep 2020 19:47:32 +0000 (15:47 -0400)]
bios-tables-test: Remove kernel-irqchip=off option
We don't need to use kernel-irqchip=off for irq0 override if IRQ
routing is supported by the host, which is the case since 2009
(IRQ routing was added to KVM in Linux v2.6.30).
This is a more straightforward fix for Launchpad bug #
1896263, as
it doesn't require increasing the complexity of the MSR code.
kernel-irqchip=off is for debugging only and there's no need to
increase the complexity of the code just to work around an issue
that was already fixed in the kernel.
Fixes: https://bugs.launchpad.net/bugs/1896263
Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
Message-Id: <
20200922194732.
2100510-1-ehabkost@redhat.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Vitaly Kuznetsov [Tue, 22 Sep 2020 15:19:34 +0000 (17:19 +0200)]
target/i386: always create kvmclock device
QEMU's kvmclock device is only created when KVM PV feature bits for
kvmclock (KVM_FEATURE_CLOCKSOURCE/KVM_FEATURE_CLOCKSOURCE2) are
exposed to the guest. With 'kvm=off' cpu flag the device is not
created and we don't call KVM_GET_CLOCK/KVM_SET_CLOCK upon migration.
It was reported that without these call at least Hyper-V TSC page
clocksouce (which can be enabled independently) gets broken after
migration.
Switch to creating kvmclock QEMU device unconditionally, it seems
to always make sense to call KVM_GET_CLOCK/KVM_SET_CLOCK on migration.
Use KVM_CAP_ADJUST_CLOCK check instead of CPUID feature bits.
Reported-by: Antoine Damhet <antoine.damhet@blade-group.com>
Suggested-by: Paolo Bonzini <pbonzini@redhat.com>
Signed-off-by: Vitaly Kuznetsov <vkuznets@redhat.com>
Message-Id: <
20200922151934.899555-1-vkuznets@redhat.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Vitaly Kuznetsov [Thu, 17 Sep 2020 10:23:16 +0000 (12:23 +0200)]
target/i386: Fix VM migration when interrupt based APF is enabled
VM with interrupt based APF enabled fails to migrate:
qemu-system-x86_64: error: failed to set MSR 0x4b564d02 to 0xf3
We have two issues:
1) There is a typo in kvm_put_msrs() and we write async_pf_int_msr
to MSR_KVM_ASYNC_PF_EN (instead of MSR_KVM_ASYNC_PF_INT)
2) We restore MSR_KVM_ASYNC_PF_EN before MSR_KVM_ASYNC_PF_INT is set
and this violates the check in KVM.
Re-order MSR_KVM_ASYNC_PF_EN/MSR_KVM_ASYNC_PF_INT setting (and
kvm_get_msrs() for consistency) and fix the typo.
Signed-off-by: Vitaly Kuznetsov <vkuznets@redhat.com>
Message-Id: <
20200917102316.814804-1-vkuznets@redhat.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Douglas Crosher [Tue, 22 Sep 2020 04:17:56 +0000 (14:17 +1000)]
helper_syscall x86_64: clear exception_is_int
The exception_is_int flag may be set on entry to helper_syscall,
e.g. after a prior interrupt that has returned, and processing
EXCP_SYSCALL as an interrupt causes it to fail so clear this flag.
Signed-off-by: Douglas Crosher <dtc-ubuntu@scieneer.com>
Message-Id: <
a7dab33e-eda6-f988-52e9-
f3d32db7538d@scieneer.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Dov Murik [Mon, 14 Sep 2020 17:26:23 +0000 (17:26 +0000)]
checkpatch: Detect '%#' or '%0#' in printf-style format strings
According to the coding style document, we should use literal '0x' prefix
instead of printf's '#' flag (which appears as '%#' or '%0#' in the format
string). Add a checkpatch rule to enforce that.
Note that checkpatch already had a similar rule for trace-events files.
Example usage:
$ scripts/checkpatch.pl --file chardev/baum.c
...
ERROR: Don't use '#' flag of printf format ('%#') in format strings, use '0x' prefix instead
#366: FILE: chardev/baum.c:366:
+ DPRINTF("Broken packet %#2x, tossing\n", req); \
...
ERROR: Don't use '#' flag of printf format ('%#') in format strings, use '0x' prefix instead
#472: FILE: chardev/baum.c:472:
+ DPRINTF("unrecognized request %0#2x\n", req);
...
Signed-off-by: Dov Murik <dovmurik@linux.vnet.ibm.com>
Message-Id: <
20200914172623.72955-1-dovmurik@linux.vnet.ibm.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Philippe Mathieu-Daudé [Tue, 8 Sep 2020 15:55:30 +0000 (17:55 +0200)]
typedefs: Restrict PCMachineState to 'hw/i386/pc.h'
The PCMachineState type is only used under hw/i386/.
We don't need to forward-declare it for all architectures,
restrict it to the X86 one.
Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Message-Id: <
20200908155530.249806-7-philmd@redhat.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Philippe Mathieu-Daudé [Tue, 8 Sep 2020 15:55:29 +0000 (17:55 +0200)]
hw/xen: Split x86-specific declaration from generic hardware ones
xen_hvm_init() is restricted to the X86 architecture.
Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Message-Id: <
20200908155530.249806-6-philmd@redhat.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Philippe Mathieu-Daudé [Tue, 8 Sep 2020 15:55:28 +0000 (17:55 +0200)]
stubs: Split accelerator / hardware related stubs
Move hardware stubs unrelated from the accelerator to xen-hw-stub.c.
Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Message-Id: <
20200908155530.249806-5-philmd@redhat.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Philippe Mathieu-Daudé [Tue, 8 Sep 2020 15:55:27 +0000 (17:55 +0200)]
sysemu/xen: Add missing 'exec/cpu-common.h' header for ram_addr_t type
As this header use the ram_addr_t type, it has to include
"exec/cpu-common.h" to avoid odd errors such:
include/sysemu/xen.h:35:44: error: unknown type name 'ram_addr_t'; did you mean 'in_addr_t'?
35 | static inline void xen_hvm_modified_memory(ram_addr_t start, ram_addr_t length)
| ^~~~~~~~~~
| in_addr_t
Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Message-Id: <
20200908155530.249806-4-philmd@redhat.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Philippe Mathieu-Daudé [Tue, 8 Sep 2020 15:55:26 +0000 (17:55 +0200)]
hw/i386/xen: Rename X86/PC specific function as xen_hvm_init_pc()
xen_hvm_init() is only meanful to initialize a X86/PC machine,
rename it as xen_hvm_init_pc().
Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Message-Id: <
20200908155530.249806-3-philmd@redhat.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Paolo Bonzini [Wed, 23 Sep 2020 16:21:39 +0000 (12:21 -0400)]
docs: Move object.h overview doc comment to qom.rst
Move the whole contents of the overview doc comment from object.h
to qom.rst.
This makes the documentation source easier to read and edit, and
also solves the backslash escaping issue at the typecasting macro
examples.
Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
Message-Id: <
20200910221526.10041-10-ehabkost@redhat.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Eduardo Habkost [Thu, 10 Sep 2020 22:15:25 +0000 (18:15 -0400)]
docs: Create docs/devel/qom.rst
Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
Message-Id: <
20200910221526.10041-9-ehabkost@redhat.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Eduardo Habkost [Thu, 10 Sep 2020 22:15:24 +0000 (18:15 -0400)]
qom: Add code block markup to all code blocks
Convert all example/codelisting markup to Sphinx code-block.
There are a few sections where backslashes at the end of lines
break code formatting. A comment was added noting that this is
an issue.
Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
Message-Id: <
20200910221526.10041-8-ehabkost@redhat.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Eduardo Habkost [Thu, 10 Sep 2020 22:15:23 +0000 (18:15 -0400)]
qom: Indent existing code examples
This indents existing code examples that are not indented yet,
just to make future conversion to Sphinx markup easier to review.
Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
Message-Id: <
20200910221526.10041-7-ehabkost@redhat.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Eduardo Habkost [Thu, 10 Sep 2020 22:15:22 +0000 (18:15 -0400)]
qom: Reformat section titles using Sphinx syntax
Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
Message-Id: <
20200910221526.10041-6-ehabkost@redhat.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Eduardo Habkost [Thu, 10 Sep 2020 22:15:21 +0000 (18:15 -0400)]
qom: Add kernel-doc markup to introduction doc comment
Add DOC: section keyword to introduction doc comment, so it will
be rendered by kernel-doc.
Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
Message-Id: <
20200910221526.10041-5-ehabkost@redhat.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Eduardo Habkost [Thu, 10 Sep 2020 22:15:20 +0000 (18:15 -0400)]
qom: Use ``code`` Sphinx syntax where appropriate
Replace gtkdoc markup with Sphinx ``code`` syntax.
Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
Message-Id: <
20200910221526.10041-4-ehabkost@redhat.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Eduardo Habkost [Thu, 10 Sep 2020 22:15:19 +0000 (18:15 -0400)]
qom: Use kernel-doc private/public tags in structs
Use kernel-doc syntax for indicating private and public struct
fields.
Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
Message-Id: <
20200910221526.10041-3-ehabkost@redhat.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Eduardo Habkost [Thu, 10 Sep 2020 22:15:18 +0000 (18:15 -0400)]
qom: Document all function parameters in doc comments
kernel-doc requires all function parameters to be documented, so
document them all.
Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
Message-Id: <
20200910221526.10041-2-ehabkost@redhat.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Daniel P. Berrangé [Mon, 14 Sep 2020 10:31:09 +0000 (12:31 +0200)]
char: fix logging when chardev write fails
The qemu_chr_write_buffer() method sends data to the chardev backend for
writing, and then also writes to the log file. In case the chardev
backend only writes part of the data buffer, we need to make sure we
only log the same subset. qemu_chr_write_buffer() will be invoked again
later to write the rest of the buffer.
In the case the chardev backend returns an error though, no further
attempts to likely to be made to write the data. We must therefore write
the entire buffer to the log immediately.
An example where this is important is with the socket backend. This will
return -1 for all writes if no client is currently connected. We still
wish to write data to the log file when no client is present though.
This used to work because the chardev would return "len" to pretend it
had written all data when no client is connected, but this changed to
return an error in
commit
271094474b65de1ad7aaf729938de3d9b9d0d36f
Author: Dima Stepanov <dimastep@yandex-team.ru>
Date: Thu May 28 12:11:18 2020 +0300
char-socket: return -1 in case of disconnect during tcp_chr_write
and this broke the logging, resulting in all data being discarded when
no client is present.
Fixes: https://bugs.launchpad.net/qemu/+bug/1893691
Signed-off-by: Daniel P. Berrangé <berrange@redhat.com>
Reviewed-by: Marc-André Lureau <marcandre.lureau@redhat.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Igor Mammedov [Fri, 11 Sep 2020 13:32:02 +0000 (09:32 -0400)]
smp: drop support for deprecated (invalid topologies)
it's was deprecated since 3.1
Support for invalid topologies is removed, the user must ensure
that topologies described with -smp include all possible cpus,
i.e. (sockets * cores * threads) == maxcpus or QEMU will
exit with error.
Signed-off-by: Igor Mammedov <imammedo@redhat.com>
Acked-by:
Message-Id: <
20200911133202.938754-1-imammedo@redhat.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Paolo Bonzini [Mon, 21 Sep 2020 14:34:47 +0000 (10:34 -0400)]
tests/tcg: reinstate or replace desired parts of rules.mak
Commit
660f79309303d696531ffb394719dfab3e0c42c0 was a bit overzealous
with respect to tests/tcg, which needed quiet-command and $(BUILD_DIR).
Reinstate quiet-command, and replace $(BUILD_DIR) with just the
current directory.
Reported-by: Alex Bennée <alex.bennee@linaro.org>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Alexander Bulekov [Wed, 9 Sep 2020 22:05:16 +0000 (18:05 -0400)]
oss-fuzz: move linker arg to fix coverage-build
The order of the add_project_link_arguments calls impacts which
arguments are placed between --start-group and --end-group.
OSS-Fuzz coverage builds seem to just add these to CFLAGS:
-fprofile-instr-generate -fcoverage-mapping pthread -Wl,--no-as-needed
-Wl,-ldl -Wl,-lm Wno-unused-command-line-argument
The -Wl,-ldl flag that is enough to shift the fork_fuzz.ld linker-script
back into the linker group. Move the linker-script meson call before the
other calls to make sure the flag is placed correctly.
Signed-off-by: Alexander Bulekov <alxndr@bu.edu>
Message-Id: <
20200909220516.614222-1-alxndr@bu.edu>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Anthony PERARD [Fri, 18 Sep 2020 13:03:54 +0000 (14:03 +0100)]
meson: fix installation of keymaps
Signed-off-by: Anthony PERARD <anthony.perard@citrix.com>
Message-Id: <
20200918130354.
1879275-1-anthony.perard@citrix.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Stefano Garzarella [Thu, 17 Sep 2020 17:02:12 +0000 (19:02 +0200)]
checkpatch: avoid error on cover letter files
Running checkpatch on a directory that contains a cover letter reports
this error:
Checking /tmp/tmpbnngauy3/0000-cover-letter.patch...
ERROR: Does not appear to be a unified-diff format patch
total: 1 errors, 0 warnings, 0 lines checked
Let's skip cover letter as it is already done in the Linux kernel
commits
06330fc40e3f ("checkpatch: avoid NOT_UNIFIED_DIFF errors
on cover-letter.patch files") and
a08ffbef4ab7 ("checkpatch: fix
ignoring cover-letter logic").
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Signed-off-by: Stefano Garzarella <sgarzare@redhat.com>
Message-Id: <
20200917170212.92672-1-sgarzare@redhat.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Philippe Mathieu-Daudé [Thu, 6 Aug 2020 15:07:26 +0000 (17:07 +0200)]
exec: Remove MemoryRegion::global_locking field
Last uses of memory_region_clear_global_locking() have been
removed in commit
7070e085d4 ("acpi: mark PMTIMER as unlocked")
and commit
08565552f7 ("cputlb: Move NOTDIRTY handling from I/O
path to TLB path").
Remove memory_region_clear_global_locking() and the now unused
'global_locking' field in MemoryRegion.
Reported-by: Alexander Bulekov <alxndr@bu.edu>
Suggested-by: Stefan Hajnoczi <stefanha@redhat.com>
Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Reviewed-by: Stefan Hajnoczi <stefanha@redhat.com>
Message-Id: <
20200806150726.962-1-philmd@redhat.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Philippe Mathieu-Daudé [Wed, 22 Jul 2020 08:25:17 +0000 (10:25 +0200)]
hw/i386/q35: Remove unreachable Xen code on Q35 machine
Xen accelerator requires specific changes to a machine to be able
to use it. See for example the 'Xen PC' machine configure its PCI
bus calling pc_xen_hvm_init_pci(). There is no 'Xen Q35' machine
declared. This code was probably added while introducing the Q35
machine, based on the existing PC machine (see commit
df2d8b3ed4
"Introduce q35 pc based chipset emulator"). Remove the unreachable
code to simplify this file.
Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Acked-by: Anthony PERARD <anthony.perard@citrix.com>
Message-Id: <
20200722082517.18708-1-philmd@redhat.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Paolo Bonzini [Tue, 18 Aug 2020 10:17:01 +0000 (12:17 +0200)]
configure: use a platform-neutral prefix
Now that the installation is relocatable, there is no need to compile a
Windows-format prefix into Win32 binaries. Instead, the prefix will
only be used to compute installation-relative paths, and it can be
any string.
Drop the "Program Files" path completely: it is only usable on English
versions of Windows; therefore, using the NSIS installer to get the
"correct" path to the Program Files folder is recommended, and NSIS
works just as well with any prefix.
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Paolo Bonzini [Tue, 18 Aug 2020 09:59:27 +0000 (11:59 +0200)]
ui: relocate paths to icons and translations
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Paolo Bonzini [Tue, 18 Aug 2020 09:59:00 +0000 (11:59 +0200)]
qga: relocate path to default configuration and hook
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Paolo Bonzini [Tue, 18 Aug 2020 09:58:34 +0000 (11:58 +0200)]
qemu-bridge-helper: relocate path to default ACL
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Paolo Bonzini [Tue, 18 Aug 2020 09:59:50 +0000 (11:59 +0200)]
vl: relocate path to configuration file
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Paolo Bonzini [Tue, 18 Aug 2020 09:57:56 +0000 (11:57 +0200)]
vl: relocate paths to data directories
As an additional advantage, the logic is now unified between
POSIX and Win32 systems.
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Paolo Bonzini [Tue, 18 Aug 2020 09:56:16 +0000 (11:56 +0200)]
net: relocate paths to helpers and scripts
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Paolo Bonzini [Tue, 18 Aug 2020 10:00:18 +0000 (12:00 +0200)]
module: relocate path to modules
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Paolo Bonzini [Tue, 18 Aug 2020 10:00:41 +0000 (12:00 +0200)]
oslib-posix: relocate path to /var
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Paolo Bonzini [Tue, 18 Aug 2020 09:55:47 +0000 (11:55 +0200)]
cutils: introduce get_relocated_path
Add the function that will compute a relocated version of the
directories in CONFIG_QEMU_*DIR and CONFIG_QEMU_*PATH.
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Paolo Bonzini [Tue, 18 Aug 2020 10:00:59 +0000 (12:00 +0200)]
oslib-posix: default exec_dir to bindir
If the exec_dir cannot be retrieved, just assume it's the installation
directory that was specified at configure time. This makes it simpler
to reason about what the callers will do if they get back an empty
path.
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Paolo Bonzini [Mon, 31 Aug 2020 11:58:10 +0000 (07:58 -0400)]
fuzz: use qemu_get_exec_dir
Make things consistent with how softmmu/vl.c uses os_find_datadir.
Initializing the path to the executables will also be needed for
get_relocatable_path to work.
Reviewed-by: Thomas Huth <thuth@redhat.com>
Reviewed-by: Alexander Bulekov <alxndr@bu.edu>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Paolo Bonzini [Tue, 18 Aug 2020 10:11:02 +0000 (12:11 +0200)]
oslib: do not call g_strdup from qemu_get_exec_dir
Just return the directory without requiring the caller to free it.
This also removes a bogus check for NULL in os_find_datadir and
module_load_one; g_strdup of a static variable cannot return NULL.
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Paolo Bonzini [Wed, 16 Sep 2020 19:31:11 +0000 (15:31 -0400)]
meson: report accelerator support
Note that the "real" support is reported. A configuration like
--disable-system --enable-kvm will report "no" for "KVM support" because
no KVM-supported target is being compiled.
Reported-by: Andrew Jones <drjones@redhat.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Paolo Bonzini [Fri, 4 Sep 2020 14:06:06 +0000 (10:06 -0400)]
mtest2make: add support for introspected test dependencies
Right now all "make check" targets depend blindly on "all". If Meson
is 0.56.0 or newer, we can use the correct dependencies using the new
"depends" entry in "meson introspect --tests".
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Paolo Bonzini [Wed, 16 Sep 2020 09:00:53 +0000 (05:00 -0400)]
meson: qtest: set "depends" correctly
This does not have any effect on Meson's behavior itself, since "meson test"
always rebuilds everything (that is one reason why we are not using it...).
However, mtest2make can use this information to do a selective rebuild
for the requested suite.
Cc: Thomas Huth <thuth@redhat.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Paolo Bonzini [Tue, 1 Sep 2020 15:34:18 +0000 (11:34 -0400)]
configure: do not limit Hypervisor.framework test to Darwin
Because the target/i386/hvf/meson.build rule culls hvf support
on non-Darwin systems, a --enable-hvf build is succeeding.
To fix this, just try the compilation test every time someone
passes --enable-hvf.
Reported-by: Christophe de Dinechin <dinechin@redhat.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Paolo Bonzini [Tue, 1 Sep 2020 15:28:59 +0000 (11:28 -0400)]
configure: move cocoa option to Meson
While detection of the framework was already there, moving
the option allows for better error reporting.
Reported-by: Christophe de Dinechin <dinechin@redhat.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Paolo Bonzini [Fri, 4 Sep 2020 14:00:26 +0000 (10:00 -0400)]
configure: fix --meson=/path/to/meson
Due to a cut-and-paste error, the path to a user-specified meson
was ignored and replaced by whatever was in the path.
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Paolo Bonzini [Tue, 1 Sep 2020 15:15:30 +0000 (11:15 -0400)]
configure: move malloc_trim/tcmalloc/jemalloc to meson
Because LIBS is not used anymore, tcmalloc/jemalloc does
not work with binaries whose description is in Meson.
The fix is simply to move them to Meson too.
For consistency with other configure options, specifying
--enable-malloc-trim together with --enable-{tc,je}malloc
becomes a fatal error.
Reported-by: Stefan Hajnoczi <stefanha@redhat.com>
Reviewed-by: Stefan Hajnoczi <stefanha@redhat.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Paolo Bonzini [Thu, 17 Sep 2020 10:25:09 +0000 (12:25 +0200)]
meson: extend libmpathpersist test for static linking
libmultipath has a dependency on libdevmapper, so
include it as well when static linking. It seems that
the rabbit hole ends there.
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Paolo Bonzini [Wed, 16 Sep 2020 16:07:29 +0000 (18:07 +0200)]
meson: move libmpathpersist test
This is the first compiler/linker test that has been moved to Meson.
Add more section headings to keep things clearer.
This also fixes static linking to libmpathpersist, which has a
dependency on libmultipath but no pkg-config file to describe it.
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Paolo Bonzini [Wed, 16 Sep 2020 15:54:14 +0000 (17:54 +0200)]
meson: move libudev test
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Xiaoyao Li [Thu, 16 Jul 2020 08:20:18 +0000 (16:20 +0800)]
i386/cpu: Clear FEAT_XSAVE_COMP_{LO,HI} when XSAVE is not available
Per Intel SDM vol 1, 13.2, if CPUID.1:ECX.XSAVE[bit 26] is 0, the
processor provides no further enumeration through CPUID function 0DH.
QEMU does not do this for "-cpu host,-xsave".
Signed-off-by: Xiaoyao Li <xiaoyao.li@intel.com>
Message-Id: <
20200716082019.215316-2-xiaoyao.li@intel.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Li Qiang [Sat, 15 Aug 2020 14:19:40 +0000 (07:19 -0700)]
hw: megasas: consider 'iov_count=0' is an error in megasas_map_sgl
Currently in 'megasas_map_sgl' when 'iov_count=0' will just return
success however the 'cmd' doens't contain any iov. This will cause
the assert in 'scsi_dma_complete' failed. This is because in
'dma_blk_cb' the 'dbs->sg_cur_index == dbs->sg->nsg' will be true
and just call 'dma_complete'. However now there is no aiocb returned.
This fixes the LP#
1878263:
-->https://bugs.launchpad.net/qemu/+bug/
1878263
Reported-by: Alexander Bulekov <alxndr@bu.edu>
Signed-off-by: Li Qiang <liq3ea@163.com>
Message-Id: <
20200815141940.44025-3-liq3ea@163.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Li Qiang [Sat, 15 Aug 2020 14:19:39 +0000 (07:19 -0700)]
hw: megasas: return -1 when 'megasas_map_sgl' fails
The caller of 'megasas_map_sgl' will only check if the return
is zero or not. If it return 0 it means success, as in the next
patch we will consider 'iov_count=0' is an error, so let's
return -1 to indicate a failure.
Signed-off-by: Li Qiang <liq3ea@163.com>
Message-Id: <
20200815141940.44025-2-liq3ea@163.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Dmitry Fomichev [Tue, 11 Aug 2020 22:51:22 +0000 (07:51 +0900)]
scsi-generic: Fix HM-zoned device scan
Several important steps during device scan depend on SCSI type of the
device. For example, max_transfer property is only determined and
assigned if the device has the type of TYPE_DISK.
Host-managed ZBC disks retain most of the properties of regular SCSI
drives, but they have their own SCSI device type, 0x14. This prevents
the proper assignment of max_transfer property for HM-zoned devices in
scsi-generic driver leading to I/O errors if the maximum i/o size
calculated at the guest exceeds the host value.
To fix this, define TYPE_ZBC to have the standard value from SCSI ZBC
standard spec. Several scan steps that were previously done only for
TYPE_DISK devices, are now performed for the SCSI devices having
TYPE_ZBC too.
Reported-by: Johannes Thumshirn <johannes.thumshirn@wdc.com>
Signed-off-by: Dmitry Fomichev <dmitry.fomichev@wdc.com>
Message-Id: <
20200811225122.17342-3-dmitry.fomichev@wdc.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Philippe Mathieu-Daudé [Mon, 7 Sep 2020 01:55:34 +0000 (03:55 +0200)]
hw/char/serial-{isa, pci}: Alias QDEV properties from generic serial object
Instead of overwritting the properties of the generic 'state'
object, alias them.
Note we can now propagate the "baudbase" property.
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <
20200907015535.827885-7-f4bug@amsat.org>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>