Peter Maydell [Wed, 12 May 2021 15:07:50 +0000 (16:07 +0100)]
Merge remote-tracking branch 'remotes/bonzini-gitlab/tags/for-upstream' into staging
* AccelCPUClass and sysemu/user split for i386 (Claudio)
* i386 page walk unification
* Fix detection of gdbus-codegen
* Misc refactoring
# gpg: Signature made Wed 12 May 2021 09:39:29 BST
# gpg: using RSA key
F13338574B662389866C7682BFFBD25F78C7AE83
# gpg: issuer "pbonzini@redhat.com"
# gpg: Good signature from "Paolo Bonzini <bonzini@gnu.org>" [full]
# gpg: aka "Paolo Bonzini <pbonzini@redhat.com>" [full]
# Primary key fingerprint: 46F5 9FBD 57D6 12E7 BFD4 E2F7 7E15 100C CD36 69B1
# Subkey fingerprint: F133 3857 4B66 2389 866C 7682 BFFB D25F 78C7 AE83
* remotes/bonzini-gitlab/tags/for-upstream: (32 commits)
coverity-scan: list components, move model to scripts/coverity-scan
configure: fix detection of gdbus-codegen
qemu-option: support accept-any QemuOptsList in qemu_opts_absorb_qdict
main-loop: remove dead code
target/i386: use mmu_translate for NPT walk
target/i386: allow customizing the next phase of the translation
target/i386: extend pg_mode to more CR0 and CR4 bits
target/i386: pass cr3 to mmu_translate
target/i386: extract mmu_translate
target/i386: move paging mode constants from SVM to cpu.h
target/i386: merge SVM_NPTEXIT_* with PF_ERROR_* constants
accel: add init_accel_cpu for adapting accel behavior to CPU type
accel: move call to accel_init_interfaces
i386: make cpu_load_efer sysemu-only
target/i386: gdbstub: only write CR0/CR2/CR3/EFER for sysemu
target/i386: gdbstub: introduce aux functions to read/write CS64 regs
i386: split off sysemu part of cpu.c
i386: split seg_helper into user-only and sysemu parts
i386: split svm_helper into sysemu and stub-only user
i386: separate fpu_helper sysemu-only parts
...
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Peter Maydell [Wed, 12 May 2021 13:45:21 +0000 (14:45 +0100)]
Merge remote-tracking branch 'remotes/kraxel/tags/vga-
20210510-pull-request' into staging
edid: display id support (for 5k+), bugfixes.
virtio-gpu: iommu fix, device split.
# gpg: Signature made Mon 10 May 2021 14:20:36 BST
# gpg: using RSA key
A0328CFFB93A17A79901FE7D4CB6D8EED3E87138
# gpg: Good signature from "Gerd Hoffmann (work) <kraxel@redhat.com>" [full]
# gpg: aka "Gerd Hoffmann <gerd@kraxel.org>" [full]
# gpg: aka "Gerd Hoffmann (private) <kraxel@gmail.com>" [full]
# Primary key fingerprint: A032 8CFF B93A 17A7 9901 FE7D 4CB6 D8EE D3E8 7138
* remotes/kraxel/tags/vga-
20210510-pull-request: (25 commits)
virtio-gpu: add virtio-vga-gl
modules: add have_vga
virtio-gpu: add virtio-gpu-gl-pci
virtio-gpu: move fields to struct VirtIOGPUGL
virtio-gpu: drop use_virgl_renderer
virtio-gpu: move virtio-gpu-gl-device to separate module
virtio-gpu: drop VIRGL() macro
virtio-gpu: move update_cursor_data
virtio-gpu: move virgl process_cmd
virtio-gpu: move virgl gl_flushed
virtio-gpu: move virgl handle_ctrl
virtio-gpu: use class function for ctrl queue handlers
virtio-gpu: move virgl reset
virtio-gpu: move virgl realize + properties
virtio-gpu: add virtio-gpu-gl-device
virtio-gpu: rename virgl source file.
virtio-gpu: handle partial maps properly
edid: add support for DisplayID extension (5k resolution)
edid: allow arbitrary-length checksums
edid: move timing generation into a separate function
...
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Paolo Bonzini [Fri, 30 Apr 2021 14:45:51 +0000 (10:45 -0400)]
coverity-scan: list components, move model to scripts/coverity-scan
Place all files that can be useful to rebuild the Coverity
configuration in scripts/coverity-scan: the existing model
file, and the components setup.
The Markdown syntax was tested with Pandoc (but in any case
is meant more as a human-readable reference than as a part
of documentation).
Suggested-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Paolo Bonzini [Wed, 5 May 2021 14:15:34 +0000 (10:15 -0400)]
configure: fix detection of gdbus-codegen
"pkg-config --variable=gdbus_codegen gio-2.0" returns "gdbus-codegen",
and it does not pass test -x (which does not walk the path).
Meson 0.58.0 notices that something is iffy, as the dbus_vmstate1
assignment in tests/qtest/meson.build uses an empty string as the
command, and fails very eloquently:
../tests/qtest/meson.build:92:2: ERROR: No program name specified.
Use the "has" function instead of test -x, and fix the generation
of config-host.mak since meson.build expects that GDBUS_CODEGEN
is absent, rather than empty, if the tool is unavailable.
Reported-by: Sebastian Mitterle <smitterl@redhat.com>
Fixes: #178
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Paolo Bonzini [Wed, 11 Nov 2020 13:42:27 +0000 (08:42 -0500)]
qemu-option: support accept-any QemuOptsList in qemu_opts_absorb_qdict
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Peter Maydell [Wed, 12 May 2021 07:54:49 +0000 (08:54 +0100)]
Merge remote-tracking branch 'remotes/aperard/tags/pull-xen-
20210510' into staging
Xen patches
- Avoid mmap race involving Xen's mapcache
- Fix xenforeignmemory_resource leak at exit
- Fix xen-block to choose a driver for the disk image when created via
xenstore.
# gpg: Signature made Mon 10 May 2021 13:49:40 BST
# gpg: using RSA key
F80C006308E22CFD8A92E7980CF5572FD7FB55AF
# gpg: Good signature from "Anthony PERARD <anthony.perard@gmail.com>" [unknown]
# gpg: aka "Anthony PERARD <anthony.perard@citrix.com>" [unknown]
# gpg: WARNING: This key is not certified with a trusted signature!
# gpg: There is no indication that the signature belongs to the owner.
# Primary key fingerprint: 5379 2F71 024C 600F 778A 7161 D8D5 7199 DF83 42C8
# Subkey fingerprint: F80C 0063 08E2 2CFD 8A92 E798 0CF5 572F D7FB 55AF
* remotes/aperard/tags/pull-xen-
20210510:
xen-block: Use specific blockdev driver
xen: Free xenforeignmemory_resource at exit
xen-mapcache: avoid a race on memory map while using MAP_FIXED
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Peter Maydell [Tue, 11 May 2021 20:21:33 +0000 (21:21 +0100)]
Merge remote-tracking branch 'remotes/thuth-gitlab/tags/s390-ccw-bios-2021-05-10' into staging
* Make the s390-ccw bios compilable with Clang
* Fix ECKD booting with null block numbers in the chain
# gpg: Signature made Mon 10 May 2021 08:27:34 BST
# gpg: using RSA key
27B88847EEE0250118F3EAB92ED9D774FE702DB5
# gpg: issuer "thuth@redhat.com"
# gpg: Good signature from "Thomas Huth <th.huth@gmx.de>" [full]
# gpg: aka "Thomas Huth <thuth@redhat.com>" [full]
# gpg: aka "Thomas Huth <huth@tuxfamily.org>" [full]
# gpg: aka "Thomas Huth <th.huth@posteo.de>" [unknown]
# Primary key fingerprint: 27B8 8847 EEE0 2501 18F3 EAB9 2ED9 D774 FE70 2DB5
* remotes/thuth-gitlab/tags/s390-ccw-bios-2021-05-10:
pc-bios/s390: Update the s390-ccw bios binaries with the Clang and other fixes
pc-bios/s390-ccw: Allow building with Clang, too
pc-bios/s390-ccw: Silence GCC 11 stringop-overflow warning
pc-bios/s390-ccw: Fix the cc-option macro in the Makefile
pc-bios/s390-ccw: Silence warning from Clang by marking panic() as noreturn
pc-bios/s390-ccw/netboot: Use "-Wl," prefix to pass parameter to the linker
pc-bios/s390-ccw: Use reset_psw pointer instead of hard-coded null pointer
pc-bios/s390-ccw/bootmap: Silence compiler warning from Clang
pc-bios/s390-ccw: don't try to read the next block if end of chunk is reached
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Peter Maydell [Tue, 11 May 2021 12:03:44 +0000 (13:03 +0100)]
Merge remote-tracking branch 'remotes/dgilbert-gitlab/tags/pull-virtiofs-
20210506' into staging
virtiofsd pull 2021-05-06
A pile of cleanups:
Use of glib allocators from Mahmoud
Virtio spec compliance and printf cleanup from me.
Sugar to turn on xattr when defining xattr mapping from Carlos
an assert cleanup from Greg
Signed-off-by: Dr. David Alan Gilbert <dgilbert@redhat.com>
# gpg: Signature made Thu 06 May 2021 19:54:18 BST
# gpg: using RSA key
45F5C71B4A0CB7FB977A9FA90516331EBC5BFDE7
# gpg: Good signature from "Dr. David Alan Gilbert (RH2) <dgilbert@redhat.com>" [full]
# Primary key fingerprint: 45F5 C71B 4A0C B7FB 977A 9FA9 0516 331E BC5B FDE7
* remotes/dgilbert-gitlab/tags/pull-virtiofs-
20210506:
virtiofsd/fuse_virtio.c: Changed allocations of locals to GLib
virtiofsd/passthrough_ll.c: Changed local allocations to GLib functions
virtiofsd: Changed allocations of fv_VuDev & its internals to GLib functions
virtiofsd: Changed allocation of lo_map_elems to GLib's functions
virtiofsd: Changed allocations of fuse_session to GLib's functions
virtiofsd: Changed allocations of iovec to GLib's functions
virtiofsd: Changed allocations of fuse_req to GLib functions
virtiofsd: Don't assume header layout
virtiofs: Fixup printf args
virtiofsd: Add help for -o xattr-mapping
virtiofsd: Allow use "-o xattrmap" without "-o xattr"
virtiofsd: Fix side-effect in assert()
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Paolo Bonzini [Tue, 16 Mar 2021 09:20:44 +0000 (05:20 -0400)]
main-loop: remove dead code
qemu_add_child_watch is not called anywhere since commit
2bdb920ece
("slirp: simplify fork_exec()", 2019-01-14), remove it.
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Paolo Bonzini [Thu, 18 Mar 2021 14:31:47 +0000 (10:31 -0400)]
target/i386: use mmu_translate for NPT walk
Unify the duplicate code between get_hphys and mmu_translate, by simply
making get_hphys call mmu_translate. This also fixes the support for
5-level nested page tables.
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Paolo Bonzini [Fri, 26 Feb 2021 15:31:06 +0000 (10:31 -0500)]
target/i386: allow customizing the next phase of the translation
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Paolo Bonzini [Fri, 26 Feb 2021 15:24:35 +0000 (10:24 -0500)]
target/i386: extend pg_mode to more CR0 and CR4 bits
In order to unify the two stages of page table lookup, we need
mmu_translate to use either the host CR0/EFER/CR4 or the guest's.
To do so, make mmu_translate use the same pg_mode constants that
were used for the NPT lookup.
This also prepares for adding 5-level NPT support, which however does
not work yet.
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Paolo Bonzini [Fri, 26 Feb 2021 16:31:56 +0000 (11:31 -0500)]
target/i386: pass cr3 to mmu_translate
First step in unifying the nested and regular page table walk.
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Paolo Bonzini [Thu, 18 Mar 2021 14:16:35 +0000 (10:16 -0400)]
target/i386: extract mmu_translate
Extract the page table lookup out of handle_mmu_fault, which only has
to invoke mmu_translate and either fill the TLB or deliver the page
fault.
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Paolo Bonzini [Fri, 26 Feb 2021 14:45:05 +0000 (09:45 -0500)]
target/i386: move paging mode constants from SVM to cpu.h
We will reuse the page walker for both SVM and regular accesses. To do
so we will build a function that receives the currently active paging
mode; start by including in cpu.h the constants and the function to go
from cr4/hflags/efer to the paging mode.
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Paolo Bonzini [Fri, 26 Feb 2021 15:04:11 +0000 (10:04 -0500)]
target/i386: merge SVM_NPTEXIT_* with PF_ERROR_* constants
They are the same value, and are so by design.
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Claudio Fontana [Mon, 22 Mar 2021 13:27:59 +0000 (14:27 +0100)]
accel: add init_accel_cpu for adapting accel behavior to CPU type
while on x86 all CPU classes can use the same set of TCGCPUOps,
on ARM the right accel behavior depends on the type of the CPU.
So we need a way to specialize the accel behavior according to
the CPU. Therefore, add a second initialization, after the
accel_cpu->cpu_class_init, that allows to do this.
Signed-off-by: Claudio Fontana <cfontana@suse.de>
Cc: Paolo Bonzini <pbonzini@redhat.com>
Message-Id: <
20210322132800.7470-24-cfontana@suse.de>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Claudio Fontana [Mon, 22 Mar 2021 13:27:58 +0000 (14:27 +0100)]
accel: move call to accel_init_interfaces
move the call for sysemu specifically in machine_run_board_init,
mirror the calling sequence for user mode too.
Suggested-by: Paolo Bonzini <pbonzini@redhat.com>
Signed-off-by: Claudio Fontana <cfontana@suse.de>
Message-Id: <
20210322132800.7470-23-cfontana@suse.de>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Claudio Fontana [Mon, 22 Mar 2021 13:27:57 +0000 (14:27 +0100)]
i386: make cpu_load_efer sysemu-only
cpu_load_efer is now used only for sysemu code.
Therefore, move this function implementation to
sysemu-only section of helper.c
Signed-off-by: Claudio Fontana <cfontana@suse.de>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <
20210322132800.7470-22-cfontana@suse.de>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Claudio Fontana [Mon, 22 Mar 2021 13:27:56 +0000 (14:27 +0100)]
target/i386: gdbstub: only write CR0/CR2/CR3/EFER for sysemu
Signed-off-by: Claudio Fontana <cfontana@suse.de>
Cc: Paolo Bonzini <pbonzini@redhat.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <
20210322132800.7470-21-cfontana@suse.de>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Claudio Fontana [Mon, 22 Mar 2021 13:27:55 +0000 (14:27 +0100)]
target/i386: gdbstub: introduce aux functions to read/write CS64 regs
a number of registers are read as 64bit under the condition that
(hflags & HF_CS64_MASK) || TARGET_X86_64)
and a number of registers are written as 64bit under the condition that
(hflags & HF_CS64_MASK).
Provide some auxiliary functions that do that.
Signed-off-by: Claudio Fontana <cfontana@suse.de>
Cc: Paolo Bonzini <pbonzini@redhat.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <
20210322132800.7470-20-cfontana@suse.de>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Claudio Fontana [Mon, 22 Mar 2021 13:27:54 +0000 (14:27 +0100)]
i386: split off sysemu part of cpu.c
Signed-off-by: Claudio Fontana <cfontana@suse.de>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <
20210322132800.7470-19-cfontana@suse.de>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Claudio Fontana [Mon, 22 Mar 2021 13:27:53 +0000 (14:27 +0100)]
i386: split seg_helper into user-only and sysemu parts
Signed-off-by: Claudio Fontana <cfontana@suse.de>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
[claudio]:
Rebased on commit
68775856 ("target/i386: svm: do not discard high 32 bits")
Signed-off-by: Claudio Fontana <cfontana@suse.de>
Message-Id: <
20210322132800.7470-18-cfontana@suse.de>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Claudio Fontana [Mon, 22 Mar 2021 13:27:52 +0000 (14:27 +0100)]
i386: split svm_helper into sysemu and stub-only user
For now we just copy over the previous user stubs, but really,
everything that requires s->cpl == 0 should be impossible
to trigger from user-mode emulation.
Later on we should add a check that asserts this easily f.e.:
static bool check_cpl0(DisasContext *s)
{
int cpl = s->cpl;
#ifdef CONFIG_USER_ONLY
assert(cpl == 3);
#endif
if (cpl != 0) {
gen_exception(s, EXCP0D_GPF, s->pc_start - s->cs_base);
return false;
}
return true;
}
Signed-off-by: Claudio Fontana <cfontana@suse.de>
Cc: Paolo Bonzini <pbonzini@redhat.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <
20210322132800.7470-17-cfontana@suse.de>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Claudio Fontana [Mon, 22 Mar 2021 13:27:51 +0000 (14:27 +0100)]
i386: separate fpu_helper sysemu-only parts
create a separate tcg/sysemu/fpu_helper.c for the sysemu-only parts.
For user mode, some small #ifdefs remain in tcg/fpu_helper.c
which do not seem worth splitting into their own user-mode module.
Signed-off-by: Claudio Fontana <cfontana@suse.de>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <
20210322132800.7470-16-cfontana@suse.de>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Claudio Fontana [Mon, 22 Mar 2021 13:27:50 +0000 (14:27 +0100)]
i386: split misc helper user stubs and sysemu part
Signed-off-by: Claudio Fontana <cfontana@suse.de>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
[claudio]:
Rebased on
da3f3b02("target/i386: fail if toggling LA57 in 64-bitmode")
Signed-off-by: Claudio Fontana <cfontana@suse.de>
Message-Id: <
20210322132800.7470-15-cfontana@suse.de>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Claudio Fontana [Mon, 22 Mar 2021 13:27:49 +0000 (14:27 +0100)]
i386: move TCG bpt_helper into sysemu/
for user-mode, assert that the hidden IOBPT flags are not set
while attempting to generate io_bpt helpers.
Signed-off-by: Claudio Fontana <cfontana@suse.de>
Cc: Paolo Bonzini <pbonzini@redhat.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <
20210322132800.7470-14-cfontana@suse.de>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Claudio Fontana [Mon, 22 Mar 2021 13:27:48 +0000 (14:27 +0100)]
i386: split tcg excp_helper into sysemu and user parts
Signed-off-by: Claudio Fontana <cfontana@suse.de>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
[claudio]:
Rebased on commit
b8184135 ("target/i386: allow modifying TCG phys-addr-bits")
Signed-off-by: Claudio Fontana <cfontana@suse.de>
Message-Id: <
20210322132800.7470-13-cfontana@suse.de>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Claudio Fontana [Mon, 22 Mar 2021 13:27:47 +0000 (14:27 +0100)]
i386: split smm helper (sysemu)
smm is only really useful for sysemu, split in two modules
around the CONFIG_USER_ONLY, in order to remove the ifdef
and use the build system instead.
add cpu_abort() when detecting attempts to enter SMM mode via
SMI interrupt in user-mode, and assert that the cpu is not
in SMM mode while translating RSM instructions.
Signed-off-by: Claudio Fontana <cfontana@suse.de>
Cc: Paolo Bonzini <pbonzini@redhat.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <
20210322132800.7470-12-cfontana@suse.de>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Paolo Bonzini [Thu, 6 May 2021 15:20:23 +0000 (11:20 -0400)]
i386: split off sysemu-only functionality in tcg-cpu
Signed-off-by: Claudio Fontana <cfontana@suse.de>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <
20210322132800.7470-11-cfontana@suse.de>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Claudio Fontana [Mon, 22 Mar 2021 13:27:44 +0000 (14:27 +0100)]
accel-cpu: make cpu_realizefn return a bool
overall, all devices' realize functions take an Error **errp, but return void.
hw/core/qdev.c code, which realizes devices, therefore does:
local_err = NULL;
dc->realize(dev, &local_err);
if (local_err != NULL) {
goto fail;
}
However, we can improve at least accel_cpu to return a meaningful bool value.
Signed-off-by: Claudio Fontana <cfontana@suse.de>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <
20210322132800.7470-9-cfontana@suse.de>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Claudio Fontana [Mon, 22 Mar 2021 13:27:43 +0000 (14:27 +0100)]
target/i386: fix host_cpu_adjust_phys_bits error handling
move the check for phys_bits outside of host_cpu_adjust_phys_bits,
because otherwise it is impossible to return an error condition
explicitly.
Signed-off-by: Claudio Fontana <cfontana@suse.de>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <
20210322132800.7470-8-cfontana@suse.de>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Claudio Fontana [Mon, 22 Mar 2021 13:27:42 +0000 (14:27 +0100)]
accel: introduce new accessor functions
avoid open coding the accesses to cpu->accel_cpu interfaces,
and instead introduce:
accel_cpu_instance_init,
accel_cpu_realizefn
to be used by the targets/ initfn code,
and by cpu_exec_realizefn respectively.
Signed-off-by: Claudio Fontana <cfontana@suse.de>
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <
20210322132800.7470-7-cfontana@suse.de>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Claudio Fontana [Mon, 22 Mar 2021 13:27:41 +0000 (14:27 +0100)]
cpu: call AccelCPUClass::cpu_realizefn in cpu_exec_realizefn
move the call to accel_cpu->cpu_realizefn to the general
cpu_exec_realizefn from target/i386, so it does not need to be
called for every target explicitly as we enable more targets.
Signed-off-by: Claudio Fontana <cfontana@suse.de>
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <
20210322132800.7470-6-cfontana@suse.de>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Claudio Fontana [Mon, 22 Mar 2021 13:27:40 +0000 (14:27 +0100)]
i386: split cpu accelerators from cpu.c, using AccelCPUClass
i386 is the first user of AccelCPUClass, allowing to split
cpu.c into:
cpu.c cpuid and common x86 cpu functionality
host-cpu.c host x86 cpu functions and "host" cpu type
kvm/kvm-cpu.c KVM x86 AccelCPUClass
hvf/hvf-cpu.c HVF x86 AccelCPUClass
tcg/tcg-cpu.c TCG x86 AccelCPUClass
Signed-off-by: Claudio Fontana <cfontana@suse.de>
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
[claudio]:
Rebased on commit
b8184135 ("target/i386: allow modifying TCG phys-addr-bits")
Signed-off-by: Claudio Fontana <cfontana@suse.de>
Message-Id: <
20210322132800.7470-5-cfontana@suse.de>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Richard Henderson [Mon, 22 Mar 2021 13:27:39 +0000 (14:27 +0100)]
target/i386: Split out do_fsave, do_frstor, do_fxsave, do_fxrstor
The helper_* functions must use GETPC() to unwind from TCG.
The cpu_x86_* functions cannot, and directly calling the
helper_* functions is a bug. Split out new functions that
perform the work and can be used by both.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Claudio Fontana <cfontana@suse.de>
Tested-by: Claudio Fontana <cfontana@suse.de>
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Message-Id: <
20210322132800.7470-4-cfontana@suse.de>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Richard Henderson [Mon, 22 Mar 2021 13:27:38 +0000 (14:27 +0100)]
target/i386: Rename helper_fldt, helper_fstt
Change the prefix from "helper" to "do". The former should be
reserved for those functions that are called from TCG; the latter
is in use within the file already for those functions that are
called from the helper functions, adding a "retaddr" argument.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Claudio Fontana <cfontana@suse.de>
Tested-by: Claudio Fontana <cfontana@suse.de>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Message-Id: <
20210322132800.7470-3-cfontana@suse.de>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Peter Maydell [Mon, 10 May 2021 18:55:06 +0000 (19:55 +0100)]
Merge remote-tracking branch 'remotes/kraxel/tags/usb-
20210505-pull-request' into staging
usb: fix some memory allocation issues (CVE-2021-3527).
usb: add stubs, allow building without usb subsystem.
# gpg: Signature made Wed 05 May 2021 14:07:02 BST
# gpg: using RSA key
A0328CFFB93A17A79901FE7D4CB6D8EED3E87138
# gpg: Good signature from "Gerd Hoffmann (work) <kraxel@redhat.com>" [full]
# gpg: aka "Gerd Hoffmann <gerd@kraxel.org>" [full]
# gpg: aka "Gerd Hoffmann (private) <kraxel@gmail.com>" [full]
# Primary key fingerprint: A032 8CFF B93A 17A7 9901 FE7D 4CB6 D8EE D3E8 7138
* remotes/kraxel/tags/usb-
20210505-pull-request:
usb: limit combined packets to 1 MiB (CVE-2021-3527)
usb/mtp: avoid dynamic stack allocation
usb/redir: avoid dynamic stack allocation (CVE-2021-3527)
usb/hid: avoid dynamic stack allocation
hw/usb: Do not build USB subsystem if not required
hw/usb/host-stub: Remove unused header
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Peter Maydell [Mon, 10 May 2021 16:28:11 +0000 (17:28 +0100)]
Merge remote-tracking branch 'remotes/pmaydell/tags/pull-target-arm-
20210510-1' into staging
target-arm queue:
* docs: fix link in sbsa description
* linux-user/aarch64: Enable hwcap for RND, BTI, and MTE
* target/arm: Fix tlbbits calculation in tlbi_aa64_vae2is_write()
* target/arm: Split neon and vfp translation to their own
compilation units
* target/arm: Make WFI a NOP for userspace emulators
* hw/sd/omap_mmc: Use device_cold_reset() instead of
device_legacy_reset()
* include: More fixes for 'extern "C"' block use
* hw/arm/imx25_pdk: Fix error message for invalid RAM size
* hw/arm/mps2-tz: Implement AN524 memory remapping via machine property
* hw/arm/xlnx: Fix PHY address for xilinx-zynq-a9
# gpg: Signature made Mon 10 May 2021 17:26:55 BST
# gpg: using RSA key
E1A5C593CD419DE28E8315CF3C2525ED14360CDE
# gpg: issuer "peter.maydell@linaro.org"
# gpg: Good signature from "Peter Maydell <peter.maydell@linaro.org>" [ultimate]
# gpg: aka "Peter Maydell <pmaydell@gmail.com>" [ultimate]
# gpg: aka "Peter Maydell <pmaydell@chiark.greenend.org.uk>" [ultimate]
# Primary key fingerprint: E1A5 C593 CD41 9DE2 8E83 15CF 3C25 25ED 1436 0CDE
* remotes/pmaydell/tags/pull-target-arm-
20210510-1: (26 commits)
hw/arm/xlnx: Fix PHY address for xilinx-zynq-a9
hw/arm/mps2-tz: Implement AN524 memory remapping via machine property
hw/misc/mps2-scc: Support using CFG0 bit 0 for remapping
hw/misc/mps2-scc: Add "QEMU interface" comment
hw/arm/imx25_pdk: Fix error message for invalid RAM size
include/disas/dis-asm.h: Handle being included outside 'extern "C"'
include/qemu/bswap.h: Handle being included outside extern "C" block
osdep: Make os-win32.h and os-posix.h handle 'extern "C"' themselves
hw/sd/omap_mmc: Use device_cold_reset() instead of device_legacy_reset()
target/arm: Make WFI a NOP for userspace emulators
target/arm: Make translate-neon.c.inc its own compilation unit
target/arm: Make functions used by translate-neon global
target/arm: Move NeonGenThreeOpEnvFn typedef to translate.h
target/arm: Delete unused typedef
target/arm: Move vfp_reg_ptr() to translate-neon.c.inc
target/arm: Make translate-vfp.c.inc its own compilation unit
target/arm: Make functions used by translate-vfp global
target/arm: Move vfp_{load, store}_reg{32, 64} to translate-vfp.c.inc
target/arm: Move gen_aa32 functions to translate-a32.h
target/arm: Split m-nocp trans functions into their own file
...
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Guenter Roeck [Tue, 4 May 2021 12:41:40 +0000 (05:41 -0700)]
hw/arm/xlnx: Fix PHY address for xilinx-zynq-a9
Commit
dfc388797cc4 ("hw/arm: xlnx: Set all boards' GEM 'phy-addr'
property value to 23") configured the PHY address for xilinx-zynq-a9
to 23. When trying to boot xilinx-zynq-a9 with zynq-zc702.dtb or
zynq-zc706.dtb, this results in the following error message when
trying to use the Ethernet interface.
macb
e000b000.ethernet eth0: Could not attach PHY (-19)
The devicetree files for ZC702 and ZC706 configure PHY address 7. The
documentation for the ZC702 and ZC706 evaluation boards suggest that the
PHY address is 7, not 23. Other boards use PHY address 0, 1, 3, or 7.
I was unable to find a documentation or a devicetree file suggesting
or using PHY address 23. The Ethernet interface starts working with
zynq-zc702.dtb and zynq-zc706.dtb when setting the PHY address to 7,
so let's use it.
Cc: Bin Meng <bin.meng@windriver.com>
Signed-off-by: Guenter Roeck <linux@roeck-us.net>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Message-id:
20210504124140.
1100346-1-linux@roeck-us.net
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Peter Maydell [Tue, 4 May 2021 12:09:12 +0000 (13:09 +0100)]
hw/arm/mps2-tz: Implement AN524 memory remapping via machine property
The AN524 FPGA image supports two memory maps, which differ in where
the QSPI and BRAM are. In the default map, the BRAM is at
0x0000_0000, and the QSPI at 0x2800_0000. In the second map, they
are the other way around.
In hardware, the initial mapping can be selected by the user by
writing either "REMAP: BRAM" (the default) or "REMAP: QSPI" in the
board configuration file. The board config file is acted on by the
"Motherboard Configuration Controller", which is an entirely separate
microcontroller on the dev board but outside the FPGA.
The guest can also dynamically change the mapping via the SCC
CFG_REG0 register.
Implement this functionality for QEMU, using a machine property
"remap" with valid values "BRAM" and "QSPI" to allow the user to set
the initial mapping, in the same way they can on the FPGA, and
wiring up the bit from the SCC register to also switch the mapping.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-id:
20210504120912.23094-4-peter.maydell@linaro.org
Peter Maydell [Tue, 4 May 2021 12:09:11 +0000 (13:09 +0100)]
hw/misc/mps2-scc: Support using CFG0 bit 0 for remapping
On some boards, SCC config register CFG0 bit 0 controls whether
parts of the board memory map are remapped. Support this with:
* a device property scc-cfg0 so the board can specify the
initial value of the CFG0 register
* an outbound GPIO line which tracks bit 0 and which the board
can wire up to provide the remapping
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-id:
20210504120912.23094-3-peter.maydell@linaro.org
Peter Maydell [Tue, 4 May 2021 12:09:10 +0000 (13:09 +0100)]
hw/misc/mps2-scc: Add "QEMU interface" comment
The MPS2 SCC device doesn't have any documentation of its properties;
add a "QEMU interface" format comment describing them.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-id:
20210504120912.23094-2-peter.maydell@linaro.org
Philippe Mathieu-Daudé [Wed, 7 Apr 2021 22:56:08 +0000 (00:56 +0200)]
hw/arm/imx25_pdk: Fix error message for invalid RAM size
The i.MX25 PDK board has 2 banks for SDRAM, each can
address up to 256 MiB. So the total RAM usable for this
board is 512M. When we ask for more we get a misleading
error message:
$ qemu-system-arm -M imx25-pdk -m 513M
qemu-system-arm: Invalid RAM size, should be 128 MiB
Update the error message to better match the reality:
$ qemu-system-arm -M imx25-pdk -m 513M
qemu-system-arm: RAM size more than 512 MiB is not supported
Fixes: bf350daae02 ("arm/imx25_pdk: drop RAM size fixup")
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Igor Mammedov <imammedo@redhat.com>
Message-id:
20210407225608.
1882855-1-f4bug@amsat.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Peter Maydell [Fri, 16 Apr 2021 13:55:43 +0000 (14:55 +0100)]
include/disas/dis-asm.h: Handle being included outside 'extern "C"'
Make dis-asm.h handle being included outside an 'extern "C"' block;
this allows us to remove the 'extern "C"' blocks that our two C++
files that include it are using.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Peter Maydell [Fri, 16 Apr 2021 13:55:42 +0000 (14:55 +0100)]
include/qemu/bswap.h: Handle being included outside extern "C" block
Make bswap.h handle being included outside an 'extern "C"' block:
all system headers are included first, then all declarations are
put inside an 'extern "C"' block.
This requires a little rearrangement as currently we have an ifdef
ladder that has some system includes and some local declarations
or definitions, and we need to separate those out.
We want to do this because dis-asm.h includes bswap.h, dis-asm.h
may need to be included from C++ files, and system headers should
not be included within 'extern "C"' blocks.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Peter Maydell [Fri, 16 Apr 2021 13:55:41 +0000 (14:55 +0100)]
osdep: Make os-win32.h and os-posix.h handle 'extern "C"' themselves
Both os-win32.h and os-posix.h include system header files. Instead
of having osdep.h include them inside its 'extern "C"' block, make
these headers handle that themselves, so that we don't include the
system headers inside 'extern "C"'.
This doesn't fix any current problems, but it's conceptually the
right way to handle system headers.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Peter Maydell [Fri, 30 Apr 2021 22:23:48 +0000 (23:23 +0100)]
hw/sd/omap_mmc: Use device_cold_reset() instead of device_legacy_reset()
The omap_mmc_reset() function resets its SD card via
device_legacy_reset(). We know that the SD card does not have a qbus
of its own, so the new device_cold_reset() function (which resets
both the device and its child buses) is equivalent here to
device_legacy_reset() and we can just switch to the new API.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-id:
20210430222348.8514-1-peter.maydell@linaro.org
Anthony PERARD [Fri, 30 Apr 2021 16:34:32 +0000 (17:34 +0100)]
xen-block: Use specific blockdev driver
... when a xen-block backend instance is created via xenstore.
Following
8d17adf34f50 ("block: remove support for using "file" driver
with block/char devices"), using the "file" blockdev driver for
everything doesn't work anymore, we need to use the "host_device"
driver when the disk image is a block device and "file" driver when it
is a regular file.
Signed-off-by: Anthony PERARD <anthony.perard@citrix.com>
Acked-by: Paul Durrant <paul@xen.org>
Message-Id: <
20210430163432.468894-1-anthony.perard@citrix.com>
Signed-off-by: Anthony PERARD <anthony.perard@citrix.com>
Anthony PERARD [Fri, 30 Apr 2021 16:37:42 +0000 (17:37 +0100)]
xen: Free xenforeignmemory_resource at exit
Because Coverity complains about it and this is one leak that Valgrind
reports.
Signed-off-by: Anthony PERARD <anthony.perard@citrix.com>
Acked-by: Paul Durrant <paul@xen.org>
Message-Id: <
20210430163742.469739-1-anthony.perard@citrix.com>
Signed-off-by: Anthony PERARD <anthony.perard@citrix.com>
Igor Druzhinin [Tue, 20 Apr 2021 03:35:02 +0000 (04:35 +0100)]
xen-mapcache: avoid a race on memory map while using MAP_FIXED
When we're replacing the existing mapping there is possibility of a race
on memory map with other threads doing mmap operations - the address being
unmapped/re-mapped could be occupied by another thread in between.
Linux mmap man page recommends keeping the existing mappings in place to
reserve the place and instead utilize the fact that the next mmap operation
with MAP_FIXED flag passed will implicitly destroy the existing mappings
behind the chosen address. This behavior is guaranteed by POSIX / BSD and
therefore is portable.
Note that it wouldn't make the replacement atomic for parallel accesses to
the replaced region - those might still fail with SIGBUS due to
xenforeignmemory_map not being atomic. So we're still not expecting those.
Tested-by: Anthony PERARD <anthony.perard@citrix.com>
Signed-off-by: Igor Druzhinin <igor.druzhinin@citrix.com>
Reviewed-by: Paul Durrant <paul@xen.org>
Message-Id: <
1618889702-13104-1-git-send-email-igor.druzhinin@citrix.com>
Signed-off-by: Anthony PERARD <anthony.perard@citrix.com>
Peter Maydell [Fri, 30 Apr 2021 16:22:12 +0000 (17:22 +0100)]
target/arm: Make WFI a NOP for userspace emulators
The WFI insn is not system-mode only, though it doesn't usually make
a huge amount of sense for userspace code to execute it. Currently
if you try it in qemu-arm then the helper function will raise an
EXCP_HLT exception, which is not covered by the switch in cpu_loop()
and results in an abort:
qemu: unhandled CPU exception 0x10001 - aborting
R00=
00000001 R01=
408003e4 R02=
408003ec R03=
000102ec
R04=
00010a28 R05=
00010158 R06=
00087460 R07=
00010158
R08=
00000000 R09=
00000000 R10=
00085b7c R11=
408002a4
R12=
408002b8 R13=
408002a0 R14=
0001057c R15=
000102f8
PSR=
60000010 -ZC- A usr32
qemu:handle_cpu_signal received signal outside vCPU context @ pc=0x7fcbfa4f0a12
Make the WFI helper function return immediately in the usermode
emulator. This turns WFI into a NOP, which is OK because:
* architecturally "WFI is a NOP" is a permitted implementation
* aarch64 Linux kernels use the SCTLR_EL1.nTWI bit to trap
userspace WFI and NOP it (though aarch32 kernels currently
just let WFI do whatever it would do)
We could in theory make the translate.c code special case user-mode
emulation and NOP the insn entirely rather than making the helper
do nothing, but because no real world code will be trying to
execute WFI we don't care about efficiency and the helper provides
a single place where we can make the change rather than having
to touch multiple places in translate.c and translate-a64.c.
Fixes: https://bugs.launchpad.net/qemu/+bug/1926759
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-id:
20210430162212.825-1-peter.maydell@linaro.org
Peter Maydell [Fri, 30 Apr 2021 13:27:40 +0000 (14:27 +0100)]
target/arm: Make translate-neon.c.inc its own compilation unit
Switch translate-neon.c.inc from being #included into translate.c
to being its own compilation unit.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-id:
20210430132740.10391-14-peter.maydell@linaro.org
Peter Maydell [Fri, 30 Apr 2021 13:27:39 +0000 (14:27 +0100)]
target/arm: Make functions used by translate-neon global
Make the remaining functions needed by the translate-neon code
global.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-id:
20210430132740.10391-13-peter.maydell@linaro.org
Peter Maydell [Fri, 30 Apr 2021 13:27:38 +0000 (14:27 +0100)]
target/arm: Move NeonGenThreeOpEnvFn typedef to translate.h
Move the NeonGenThreeOpEnvFn typedef to translate.h together
with the other similar typedefs.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-id:
20210430132740.10391-12-peter.maydell@linaro.org
Peter Maydell [Fri, 30 Apr 2021 13:27:37 +0000 (14:27 +0100)]
target/arm: Delete unused typedef
The VFPGenFixPointFn typedef is unused; delete it.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-id:
20210430132740.10391-11-peter.maydell@linaro.org
Peter Maydell [Fri, 30 Apr 2021 13:27:36 +0000 (14:27 +0100)]
target/arm: Move vfp_reg_ptr() to translate-neon.c.inc
The function vfp_reg_ptr() is used only in translate-neon.c.inc;
move it there.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-id:
20210430132740.10391-10-peter.maydell@linaro.org
Peter Maydell [Fri, 30 Apr 2021 13:27:35 +0000 (14:27 +0100)]
target/arm: Make translate-vfp.c.inc its own compilation unit
Switch translate-vfp.c.inc from being #included into translate.c
to being its own compilation unit.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-id:
20210430132740.10391-9-peter.maydell@linaro.org
Peter Maydell [Fri, 30 Apr 2021 13:27:34 +0000 (14:27 +0100)]
target/arm: Make functions used by translate-vfp global
Make the remaining functions which are needed by translate-vfp.c.inc
global.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-id:
20210430132740.10391-8-peter.maydell@linaro.org
Peter Maydell [Fri, 30 Apr 2021 13:27:33 +0000 (14:27 +0100)]
target/arm: Move vfp_{load, store}_reg{32, 64} to translate-vfp.c.inc
The functions vfp_load_reg32(), vfp_load_reg64(), vfp_store_reg32()
and vfp_store_reg64() are used only in translate-vfp.c.inc. Move
them to that file.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-id:
20210430132740.10391-7-peter.maydell@linaro.org
Peter Maydell [Fri, 30 Apr 2021 13:27:32 +0000 (14:27 +0100)]
target/arm: Move gen_aa32 functions to translate-a32.h
Move the various gen_aa32* functions and macros out of translate.c
and into translate-a32.h.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-id:
20210430132740.10391-6-peter.maydell@linaro.org
Peter Maydell [Fri, 30 Apr 2021 13:27:31 +0000 (14:27 +0100)]
target/arm: Split m-nocp trans functions into their own file
Currently the trans functions for m-nocp.decode all live in
translate-vfp.inc.c; move them out into their own translation unit,
translate-m-nocp.c.
The trans_* functions here are pure code motion with no changes.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-id:
20210430132740.10391-5-peter.maydell@linaro.org
Peter Maydell [Fri, 30 Apr 2021 13:27:30 +0000 (14:27 +0100)]
target/arm: Make functions used by m-nocp global
We want to split out the .c.inc files which are currently included
into translate.c so they are separate compilation units. To do this
we need to make some functions which are currently file-local to
translate.c have global scope; create a translate-a32.h paralleling
the existing translate-a64.h as a place for these declarations to
live, so that code moved into the new compilation units can call
them.
The functions made global here are those required by the
m-nocp.decode functions, except that I have converted the whole
family of {read,write}_neon_element* and also both the load_cpu and
store_cpu functions for consistency, even though m-nocp only wants a
few functions from each.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-id:
20210430132740.10391-4-peter.maydell@linaro.org
Peter Maydell [Fri, 30 Apr 2021 13:27:29 +0000 (14:27 +0100)]
target/arm: Share unallocated_encoding() and gen_exception_insn()
The unallocated_encoding() function is the same in both
translate-a64.c and translate.c; make the translate.c function global
and drop the translate-a64.c version. To do this we need to also
share gen_exception_insn(), which currently exists in two slightly
different versions for A32 and A64: merge those into a single
function that can work for both.
This will be useful for splitting up translate.c, which will require
unallocated_encoding() to no longer be file-local. It's also
hopefully less confusing to have only one version of the function
rather than two.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-id:
20210430132740.10391-3-peter.maydell@linaro.org
Peter Maydell [Fri, 30 Apr 2021 13:27:28 +0000 (14:27 +0100)]
target/arm: Move constant expanders to translate.h
Some of the constant expanders defined in translate.c are generically
useful and will be used by the separate C files for VFP and Neon once
they are created; move the expander definitions to translate.h.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-id:
20210430132740.10391-2-peter.maydell@linaro.org
Peter Maydell [Tue, 20 Apr 2021 12:31:06 +0000 (13:31 +0100)]
target/arm: Fix tlbbits calculation in tlbi_aa64_vae2is_write()
In tlbi_aa64_vae2is_write() the calculation
bits = tlbbits_for_regime(env, secure ? ARMMMUIdx_E2 : ARMMMUIdx_SE2,
pageaddr)
has the two arms of the ?: expression reversed. Fix the bug.
Fixes: b6ad6062f1e5
Reported-by: Rebecca Cran <rebecca@nuviainc.com>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Rémi Denis-Courmont <remi.denis.courmont@huawei.com>
Reviewed-by: Rebecca Cran <rebecca@nuviainc.com>
Message-id:
20210420123106.10861-1-peter.maydell@linaro.org
Richard Henderson [Tue, 27 Apr 2021 21:41:08 +0000 (14:41 -0700)]
linux-user/aarch64: Enable hwcap for RND, BTI, and MTE
These three features are already enabled by TCG, but are missing
their hwcap bits. Update HWCAP2 from linux v5.12.
Cc: qemu-stable@nongnu.org (for 6.0.1)
Buglink: https://bugs.launchpad.net/bugs/1926044
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id:
20210427214108.88503-1-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Alex Bennée [Wed, 28 Apr 2021 13:13:16 +0000 (14:13 +0100)]
docs: fix link in sbsa description
A trailing _ makes all the difference to the rendered link.
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Message-id:
20210428131316.31390-1-alex.bennee@linaro.org
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Gerd Hoffmann [Fri, 30 Apr 2021 11:35:47 +0000 (13:35 +0200)]
virtio-gpu: add virtio-vga-gl
Add pci proxy for virtio-gpu-gl-device, with vga compatibility.
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
Message-id:
20210430113547.
1816178-1-kraxel@redhat.com
Message-Id: <
20210430113547.
1816178-17-kraxel@redhat.com>
Gerd Hoffmann [Fri, 30 Apr 2021 11:35:46 +0000 (13:35 +0200)]
modules: add have_vga
Introduce a symbol which can be used to prevent display modules which
need vga support being loaded into system emulators with CONFIG_VGA=n.
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
Message-id:
20210430113547.
1816178-1-kraxel@redhat.com
Message-Id: <
20210430113547.
1816178-16-kraxel@redhat.com>
Gerd Hoffmann [Fri, 30 Apr 2021 11:35:45 +0000 (13:35 +0200)]
virtio-gpu: add virtio-gpu-gl-pci
Add pci proxy for virtio-gpu-gl-device.
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
Message-id:
20210430113547.
1816178-1-kraxel@redhat.com
Message-Id: <
20210430113547.
1816178-15-kraxel@redhat.com>
Gerd Hoffmann [Fri, 30 Apr 2021 11:35:44 +0000 (13:35 +0200)]
virtio-gpu: move fields to struct VirtIOGPUGL
Move two virglrenderer state variables to struct VirtIOGPUGL.
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
Message-id:
20210430113547.
1816178-1-kraxel@redhat.com
Message-Id: <
20210430113547.
1816178-14-kraxel@redhat.com>
Gerd Hoffmann [Fri, 30 Apr 2021 11:35:43 +0000 (13:35 +0200)]
virtio-gpu: drop use_virgl_renderer
Now that we have separated the gl and non-gl code flows to two different
devices there is little reason turn on and off virglrenderer usage at
runtime. The gl code can simply use virglrenderer unconditionally.
So drop use_virgl_renderer field and just do that.
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
Message-id:
20210430113547.
1816178-1-kraxel@redhat.com
Message-Id: <
20210430113547.
1816178-13-kraxel@redhat.com>
Gerd Hoffmann [Fri, 30 Apr 2021 11:35:42 +0000 (13:35 +0200)]
virtio-gpu: move virtio-gpu-gl-device to separate module
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
Message-id:
20210430113547.
1816178-1-kraxel@redhat.com
Message-Id: <
20210430113547.
1816178-12-kraxel@redhat.com>
Gerd Hoffmann [Fri, 30 Apr 2021 11:35:41 +0000 (13:35 +0200)]
virtio-gpu: drop VIRGL() macro
Drops last virgl/opengl dependency from virtio-gpu-device.
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
Message-id:
20210430113547.
1816178-1-kraxel@redhat.com
Message-Id: <
20210430113547.
1816178-11-kraxel@redhat.com>
Gerd Hoffmann [Fri, 30 Apr 2021 11:35:40 +0000 (13:35 +0200)]
virtio-gpu: move update_cursor_data
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
Message-id:
20210430113547.
1816178-1-kraxel@redhat.com
Message-Id: <
20210430113547.
1816178-10-kraxel@redhat.com>
Gerd Hoffmann [Fri, 30 Apr 2021 11:35:39 +0000 (13:35 +0200)]
virtio-gpu: move virgl process_cmd
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
Message-id:
20210430113547.
1816178-1-kraxel@redhat.com
Message-Id: <
20210430113547.
1816178-9-kraxel@redhat.com>
Gerd Hoffmann [Fri, 30 Apr 2021 11:35:38 +0000 (13:35 +0200)]
virtio-gpu: move virgl gl_flushed
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
Message-id:
20210430113547.
1816178-1-kraxel@redhat.com
Message-Id: <
20210430113547.
1816178-8-kraxel@redhat.com>
Gerd Hoffmann [Fri, 30 Apr 2021 11:35:37 +0000 (13:35 +0200)]
virtio-gpu: move virgl handle_ctrl
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
Message-id:
20210430113547.
1816178-1-kraxel@redhat.com
Message-Id: <
20210430113547.
1816178-7-kraxel@redhat.com>
Gerd Hoffmann [Fri, 30 Apr 2021 11:35:36 +0000 (13:35 +0200)]
virtio-gpu: use class function for ctrl queue handlers
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
Message-id:
20210430113547.
1816178-1-kraxel@redhat.com
Message-Id: <
20210430113547.
1816178-6-kraxel@redhat.com>
Gerd Hoffmann [Fri, 30 Apr 2021 11:35:35 +0000 (13:35 +0200)]
virtio-gpu: move virgl reset
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
Message-id:
20210430113547.
1816178-1-kraxel@redhat.com
Message-Id: <
20210430113547.
1816178-5-kraxel@redhat.com>
Gerd Hoffmann [Fri, 30 Apr 2021 11:35:34 +0000 (13:35 +0200)]
virtio-gpu: move virgl realize + properties
Move device init (realize) and properties.
Drop the virgl property, the virtio-gpu-gl-device has virgl enabled no
matter what. Just use virtio-gpu-device instead if you don't want
enable virgl and opengl. This simplifies the logic and reduces the test
matrix.
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
Message-id:
20210430113547.
1816178-1-kraxel@redhat.com
Message-Id: <
20210430113547.
1816178-4-kraxel@redhat.com>
Gerd Hoffmann [Fri, 30 Apr 2021 11:35:33 +0000 (13:35 +0200)]
virtio-gpu: add virtio-gpu-gl-device
Just a skeleton for starters, following patches will add more code.
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
Message-id:
20210430113547.
1816178-1-kraxel@redhat.com
Message-Id: <
20210430113547.
1816178-3-kraxel@redhat.com>
Gerd Hoffmann [Fri, 30 Apr 2021 11:35:32 +0000 (13:35 +0200)]
virtio-gpu: rename virgl source file.
"3d" -> "virgl" as 3d is a rather broad term.
Hopefully a bit less confusing.
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
Message-id:
20210430113547.
1816178-1-kraxel@redhat.com
Message-Id: <
20210430113547.
1816178-2-kraxel@redhat.com>
Gerd Hoffmann [Thu, 6 May 2021 09:10:01 +0000 (11:10 +0200)]
virtio-gpu: handle partial maps properly
dma_memory_map() may map only a part of the request. Happens if the
request can't be mapped in one go, for example due to a iommu creating
a linear dma mapping for scattered physical pages. Should that be the
case virtio-gpu must call dma_memory_map() again with the remaining
range instead of simply throwing an error.
Note that this change implies the number of iov entries may differ from
the number of mapping entries sent by the guest. Therefore the iov_len
bookkeeping needs some updates too, we have to explicitly pass around
the iov length now.
Reported-by: Auger Eric <eric.auger@redhat.com>
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
Message-id:
20210506091001.
1301250-1-kraxel@redhat.com
Reviewed-by: Eric Auger <eric.auger@redhat.com>
Tested-by: Eric Auger <eric.auger@redhat.com>
Message-Id: <
20210506091001.
1301250-1-kraxel@redhat.com>
Peter Maydell [Mon, 10 May 2021 11:34:05 +0000 (12:34 +0100)]
Merge remote-tracking branch 'remotes/mcayland/tags/qemu-sparc-
20210505' into staging
qemu-sparc queue
# gpg: Signature made Wed 05 May 2021 08:29:13 BST
# gpg: using RSA key
CC621AB98E82200D915CC9C45BC2C56FAE0F321F
# gpg: issuer "mark.cave-ayland@ilande.co.uk"
# gpg: Good signature from "Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>" [full]
# Primary key fingerprint: CC62 1AB9 8E82 200D 915C C9C4 5BC2 C56F AE0F 321F
* remotes/mcayland/tags/qemu-sparc-
20210505:
hw/sparc*: Move cpu_check_irqs() to target/sparc/
hw/sparc64: Fix code style for checkpatch.pl
hw/sparc64: Remove unused "hw/char/serial.h" header
hw/sparc: Allow building without the leon3 machine
hw/sparc/sun4m: Move each sun4m_hwdef definition in its class_init
hw/sparc/sun4m: Fix code style for checkpatch.pl
hw/sparc/sun4m: Register machine types in sun4m_machine_types[]
hw/sparc/sun4m: Factor out sun4m_machine_class_init()
hw/sparc/sun4m: Introduce Sun4mMachineClass
hw/sparc/sun4m: Have sun4m machines inherit new TYPE_SUN4M_MACHINE
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Konstantin Nazarov [Tue, 27 Apr 2021 15:08:24 +0000 (17:08 +0200)]
edid: add support for DisplayID extension (5k resolution)
The Detailed Timing Descriptor has only 12 bits to store the
resolution. This limits the guest to 4095 pixels.
This patch adds support for the DisplayID extension, that has 2 full
bytes for that purpose, thus allowing 5k resolutions and above.
Based-on: <
20210303152948.59943-2-akihiko.odaki@gmail.com>
Signed-off-by: Konstantin Nazarov <mail@knazarov.com>
Message-Id: <
20210315114639.91953-3-mail@knazarov.com>
[ kraxel: minor workflow tweaks ]
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
Message-id:
20210427150824.638359-1-kraxel@redhat.com
Message-Id: <
20210427150824.638359-9-kraxel@redhat.com>
Konstantin Nazarov [Tue, 27 Apr 2021 15:08:23 +0000 (17:08 +0200)]
edid: allow arbitrary-length checksums
Some of the EDID extensions like DisplayID do checksums of their
subsections. Currently checksums can be only applied to the whole
extension blocks which are 128 bytes.
This patch allows to checksum arbitrary parts of EDID, and not only
whole extension blocks.
Based-on: <
20210303152948.59943-2-akihiko.odaki@gmail.com>
Signed-off-by: Konstantin Nazarov <mail@knazarov.com>
Message-Id: <
20210315114639.91953-2-mail@knazarov.com>
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
Message-id:
20210427150824.638359-1-kraxel@redhat.com
Message-Id: <
20210427150824.638359-8-kraxel@redhat.com>
Konstantin Nazarov [Tue, 27 Apr 2021 15:08:22 +0000 (17:08 +0200)]
edid: move timing generation into a separate function
The timing generation is currently performed inside the function that
fills in the DTD. The DisplayID generation needs it as well, so moving
it out to a separate function.
Based-on: <
20210303152948.59943-2-akihiko.odaki@gmail.com>
Signed-off-by: Konstantin Nazarov <mail@knazarov.com>
Message-Id: <
20210315114639.91953-1-mail@knazarov.com>
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
Message-id:
20210427150824.638359-1-kraxel@redhat.com
Message-Id: <
20210427150824.638359-7-kraxel@redhat.com>
Akihiko Odaki [Tue, 27 Apr 2021 15:08:21 +0000 (17:08 +0200)]
edid: Make refresh rate configurable
Signed-off-by: Akihiko Odaki <akihiko.odaki@gmail.com>
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
Message-id:
20210427150824.638359-1-kraxel@redhat.com
Message-Id: <
20210427150824.638359-6-kraxel@redhat.com>
Gerd Hoffmann [Tue, 27 Apr 2021 15:08:20 +0000 (17:08 +0200)]
edid: use dta extension block descriptors
When the 4 descriptors in the base edid block are filled, jump to the
dta extension block. This allows for more than four descriptors.
Happens for example when generating an edid blob with a serial number
(qemu-edid -s $serial).
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
Reviewed-by: Marc-André Lureau <marcandre.lureau@redhat.com>
Message-id:
20210427150824.638359-1-kraxel@redhat.com
Message-Id: <
20210427150824.638359-5-kraxel@redhat.com>
Gerd Hoffmann [Tue, 27 Apr 2021 15:08:19 +0000 (17:08 +0200)]
edid: move xtra3 descriptor
Initialize the "Established timings III" block earlier. Also move up
edid_fill_modes(). That'll make sure the offset for the additional
descriptors in the dta block don't move any more, which in turn makes it
easier to actually use them.
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
Reviewed-by: Marc-André Lureau <marcandre.lureau@redhat.com>
Message-id:
20210427150824.638359-1-kraxel@redhat.com
Message-Id: <
20210427150824.638359-4-kraxel@redhat.com>
Gerd Hoffmann [Tue, 27 Apr 2021 15:08:18 +0000 (17:08 +0200)]
edid: edid_desc_next
Add helper function to find the next free desc block.
Needed when we start to use the dta descriptor entries.
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
Reviewed-by: Marc-André Lureau <marcandre.lureau@redhat.com>
Message-id:
20210427150824.638359-1-kraxel@redhat.com
Message-Id: <
20210427150824.638359-3-kraxel@redhat.com>
Gerd Hoffmann [Tue, 27 Apr 2021 15:08:17 +0000 (17:08 +0200)]
qemu-edid: use qemu_edid_size()
So we only write out that part of the edid blob
which has been filled with data.
Also use a larger buffer for the blob.
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
Reviewed-by: Marc-André Lureau <marcandre.lureau@redhat.com>
Message-id:
20210427150824.638359-1-kraxel@redhat.com
Message-Id: <
20210427150824.638359-2-kraxel@redhat.com>
Thomas Huth [Mon, 10 May 2021 06:08:40 +0000 (08:08 +0200)]
pc-bios/s390: Update the s390-ccw bios binaries with the Clang and other fixes
Rebuild the s390-ccw firmware with my Clang fixes and the ECKD null
block number fix from Marc.
Signed-off-by: Thomas Huth <thuth@redhat.com>
Thomas Huth [Sun, 2 May 2021 11:22:21 +0000 (13:22 +0200)]
pc-bios/s390-ccw: Allow building with Clang, too
Clang unfortunately does not support generating code for the z900
architecture level and starts with the z10 instead. Thus to be able
to support compiling with Clang, we have to check for the supported
compiler flags. The disadvantage is of course that the bios image
will only run with z10 guest CPUs upwards (which is what most people
use anyway), so just in case let's also emit a warning in that case
(we will continue to ship firmware images that have been pre-built
with GCC in future releases, so this should not impact normal users,
too).
Message-Id: <
20210502174836.838816-5-thuth@redhat.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Reviewed-by: Cornelia Huck <cohuck@redhat.com>
Signed-off-by: Thomas Huth <thuth@redhat.com>
Philippe Mathieu-Daudé [Thu, 22 Apr 2021 14:59:11 +0000 (16:59 +0200)]
pc-bios/s390-ccw: Silence GCC 11 stringop-overflow warning
When building on Fedora 34 (gcc version 11.0.0
20210210) we get:
In file included from pc-bios/s390-ccw/main.c:11:
In function ‘memset’,
inlined from ‘boot_setup’ at pc-bios/s390-ccw/main.c:185:5,
inlined from ‘main’ at pc-bios/s390-ccw/main.c:288:5:
pc-bios/s390-ccw/libc.h:28:14: warning: writing 1 byte into a region of size 0 [-Wstringop-overflow=]
28 | p[i] = c;
| ~~~~~^~~
The offending code is:
memset((char *)S390EP, 0, 6);
where S390EP is a const address:
#define S390EP 0x10008
The compiler doesn't know how big that pointed area is, so it assume that
its length is zero. This has been reported as BZ#99578 to GCC:
"gcc-11 -Warray-bounds or -Wstringop-overread warning when accessing a
pointer from integer literal"
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=99578
As this warning does us more harm than good in the BIOS code (where
lot of direct accesses to low memory are done), silence this warning
for all BIOS objects.
Suggested-by: Thomas Huth <thuth@redhat.com>
Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Message-Id: <
20210422145911.
2513980-1-philmd@redhat.com>
Acked-by: Christian Borntraeger <borntraeger@de.ibm.com>
Message-Id: <
20210502174836.838816-4-thuth@redhat.com>
[thuth: Use the pre-existing cc-option macro instead of adding a new one]
Reviewed-by: Cornelia Huck <cohuck@redhat.com>
Signed-off-by: Thomas Huth <thuth@redhat.com>
Thomas Huth [Sun, 2 May 2021 11:07:46 +0000 (13:07 +0200)]
pc-bios/s390-ccw: Fix the cc-option macro in the Makefile
The cc-option macro is not doing what it should - compared with the
original from the rules.mak file that got removed with commit
660f793093 ("Makefile: inline the relevant parts of rules.mak"),
the arguments got changed and thus the macro is rather doubling
the QEMU_CFLAGS than adding the flag that should be tested.
Message-Id: <
20210502174836.838816-3-thuth@redhat.com>
Fixes: 22fb2ab096 ("pc-bios/s390-ccw: do not use rules.mak")
Signed-off-by: Thomas Huth <thuth@redhat.com>
Thomas Huth [Sun, 2 May 2021 11:49:20 +0000 (13:49 +0200)]
pc-bios/s390-ccw: Silence warning from Clang by marking panic() as noreturn
When compiling the s390-ccw bios with Clang, the compiler emits a warning:
pc-bios/s390-ccw/main.c:210:5: warning: variable 'found' is used uninitialized
whenever switch default is taken [-Wsometimes-uninitialized]
default:
^~~~~~~
pc-bios/s390-ccw/main.c:214:16: note: uninitialized use occurs here
IPL_assert(found, "Boot device not found\n");
^~~~~
It's a false positive, it only happens because Clang is not smart enough
to see that the panic() function in the "default:" case can never return.
Anyway, let's explicitely mark panic() with "noreturn" to shut up the
warning.
Message-Id: <
20210502174836.838816-2-thuth@redhat.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Reviewed-by: Cornelia Huck <cohuck@redhat.com>
Signed-off-by: Thomas Huth <thuth@redhat.com>
Thomas Huth [Fri, 23 Apr 2021 15:20:46 +0000 (17:20 +0200)]
pc-bios/s390-ccw/netboot: Use "-Wl," prefix to pass parameter to the linker
We are using the compiler to do the linking of the bios files. GCC still
accepts the "-Ttext=..." linker flag directly and is smart enough to
pass it to the linker, but in case we are compiling with Clang, we have
to use the official way with the "-Wl," prefix instead.
Message-Id: <
20210423153646.593153-1-thuth@redhat.com>
Signed-off-by: Thomas Huth <thuth@redhat.com>