Arnd Bergmann [Fri, 17 Jul 2020 18:03:49 +0000 (20:03 +0200)]
Merge tag 'tegra-for-5.9-arm-dt' of git://git./linux/kernel/git/tegra/linux into arm/dt
ARM: tegra: Device tree changes for v5.9-rc1
This adds device trees for the ASUS Google Nexus 7 and Acer Iconia Tab
A500. In addition there are a slew of fixes to existing device trees in
preparation for validating the DTBs against json-schema.
* tag 'tegra-for-5.9-arm-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux: (38 commits)
ARM: tegra: Add device-tree for ASUS Google Nexus 7
ARM: tegra: Add device-tree for Acer Iconia Tab A500
ARM: tegra: Add HDMI supplies on Nyan boards
ARM: tegra: Add missing DSI controller on Tegra30
ARM: tegra: Add i2c-bus subnode for DPAUX controllers
ARM: tegra: The Tegra30 SDHCI is not backwards-compatible
ARM: tegra: The Tegra30 DC is not backwards-compatible
ARM: tegra: Remove spurious comma from node name
ARM: tegra: Add parent clock to DSI output
ARM: tegra: Use standard names for SRAM nodes
ARM: tegra: seaboard: Use standard battery bindings
ARM: tegra: Use standard names for LED nodes
ARM: tegra: Use numeric unit-addresses
ARM: tegra: medcom-wide: Remove extra panel power supply
ARM: tegra: Use proper unit-addresses for OPPs
ARM: tegra: Add missing clock-names for SDHCI controllers
ARM: tegra: Fix order of XUSB controller clocks
ARM: tegra: Add #reset-cells to Tegra124 memory controller
ARM: tegra: Add missing panel power supplies
ARM: tegra: Add micro-USB A/B port on Jetson TK1
...
Link: https://lore.kernel.org/r/20200717161300.1661002-5-thierry.reding@gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Arnd Bergmann [Fri, 17 Jul 2020 18:00:45 +0000 (20:00 +0200)]
Merge tag 'tegra-for-5.9-dt-bindings' of git://git./linux/kernel/git/tegra/linux into arm/dt
dt-bindings: Changes for v5.9-rc1
This adds compatible strings for some new devices as well as updates and
fixes existing bindings.
* tag 'tegra-for-5.9-dt-bindings' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
dt-bindings: fuse: tegra: Add missing compatible strings
dt-bindings: i2c: tegra: Document Tegra210 VI I2C clocks and power-domains
dt-bindings: Add documentation for GV11B GPU
dt-bindings: ARM: tegra: Add ASUS Google Nexus 7
dt-bindings: ARM: tegra: Add Acer Iconia Tab A500
dt-bindings: Add vendor prefix for Acer Inc.
dt-bindings: tegra: Document Jetson Xavier NX (and devkit)
Link: https://lore.kernel.org/r/20200717161300.1661002-1-thierry.reding@gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Arnd Bergmann [Fri, 17 Jul 2020 17:59:03 +0000 (19:59 +0200)]
Merge tag 'amlogic-dt64' of git://git./linux/kernel/git/khilman/linux-amlogic into arm/dt
arm64: dts: amlogic updates for v5.9
- meson-gx: Switch to the meson-ee-pwrc bindings
- add Khadas MCU nodes
* tag 'amlogic-dt64' of git://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-amlogic:
arm64: dts: amlogic: Add the Ethernet "timing-adjustment" clock
arm64: dts: meson-gx: Switch to the meson-ee-pwrc bindings
arm64: dts: meson-khadas-vim3: add Khadas MCU nodes
Link: https://lore.kernel.org/r/7h8sfif2na.fsf@baylibre.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Arnd Bergmann [Fri, 17 Jul 2020 17:57:03 +0000 (19:57 +0200)]
Merge tag 'amlogic-dt' of git://git./linux/kernel/git/khilman/linux-amlogic into arm/dt
ARM: dts: amlogic updates for v5.9
- power-domain and MMC updates
* tag 'amlogic-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-amlogic:
ARM: dts: meson8b: odroidc1: enable the SDHC controller
ARM: dts: meson8b: ec100: enable the SDHC controller
ARM: dts: meson: add the SDHC MMC controller
ARM: dts: meson8b: add power domain controller
ARM: dts: meson8m2: add resets for the power domain controller
ARM: dts: meson8: add power domain controller
Link: https://lore.kernel.org/r/7hd04uf2o8.fsf@baylibre.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Thierry Reding [Mon, 25 May 2020 14:50:04 +0000 (16:50 +0200)]
dt-bindings: fuse: tegra: Add missing compatible strings
The Tegra FUSE device tree bindings haven't been updated in a while. Add
compatible strings for the SoC generations that were released since the
last update.
Signed-off-by: Thierry Reding <treding@nvidia.com>
Sowjanya Komatineni [Wed, 15 Jul 2020 04:20:38 +0000 (21:20 -0700)]
dt-bindings: i2c: tegra: Document Tegra210 VI I2C clocks and power-domains
This patch documents missing clocks and power-domains of Tegra210 VI I2C.
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Sowjanya Komatineni <skomatineni@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Thierry Reding [Thu, 16 Jul 2020 13:18:45 +0000 (15:18 +0200)]
dt-bindings: Add documentation for GV11B GPU
The GV11B's device tree bindings are the same as for GP10B, though the
GPU is not completely compatible, so all that is needed is a different
compatible string.
Reviewed-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Arnd Bergmann [Fri, 17 Jul 2020 14:04:56 +0000 (16:04 +0200)]
Merge tag 'renesas-dt-bindings-for-v5.9-tag1' of git://git./linux/kernel/git/geert/renesas-devel into arm/dt
Renesas DT binding updates for v5.9
- Document core support for the RZ/G2H SoC,
- Document support for the HopeRun HiHope RZ/G2H, and Beacon
EmbeddedWorks RZ/G2M boards.
* tag 'renesas-dt-bindings-for-v5.9-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel:
dt-bindings: arm: renesas: Document beacon-rzg2m
dt-bindings: reset: renesas,rst: Document r8a774e1 reset module
dt-bindings: power: renesas,rcar-sysc: Document r8a774e1 SYSC binding
dt-bindings: arm: renesas: Add HopeRun RZ/G2H boards
dt-bindings: arm: renesas: Document RZ/G2H SoC DT bindings
Link: https://lore.kernel.org/r/20200717112427.26032-4-geert+renesas@glider.be
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Arnd Bergmann [Fri, 17 Jul 2020 13:36:23 +0000 (15:36 +0200)]
Merge tag 'renesas-arm-dt-for-v5.9-tag2' of git://git./linux/kernel/git/geert/renesas-devel into arm/dt
Renesas ARM DT updates for v5.9 (take two)
- SPI Multi I/O Bus Controller (RPC-IF) support for R-Car V3H and V3M,
including QSPI support for the Condor, Eagle, V3HSK, and V3MSK
boards,
- Initial support for the RZ/G2H SoC on the HopeRun HiHope RZ/G2H
board,
- Initial support for the Beacon EmbeddedWorks RZ/G2M board,
- Minor fixes and improvements.
* tag 'renesas-arm-dt-for-v5.9-tag2' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel: (34 commits)
ARM: dts: sh73a0: Add missing clocks to sound node
arm64: dts: renesas: r8a774e1: Add CAN[FD] support
arm64: dts: renesas: r8a774e1: Add RWDT node
arm64: dts: renesas: r8a774e1: Add MSIOF nodes
arm64: dts: renesas: r8a774e1: Add I2C and IIC-DVFS support
arm64: dts: renesas: r8a774e1: Add SDHI nodes
arm64: dts: renesas: r8a774e1: Add SCIF and HSCIF nodes
arm64: dts: renesas: r8a774e1: Add TMU device nodes
arm64: dts: renesas: r8a774e1: Add CMT device nodes
arm64: dts: renesas: r8a774e1: Add RZ/G2H thermal support
arm64: dts: renesas: r8a774e1: Add operating points
arm64: dts: renesas: Introduce r8a774a1-beacon-rzg2m-kit
arm64: dts: renesas: r8a774e1: Add Ethernet AVB node
arm64: dts: renesas: r8a774e1: Add GPIO device nodes
arm64: dts: renesas: r8a774e1: Add SYS-DMAC device nodes
arm64: dts: renesas: r8a774e1: Add IPMMU device nodes
ARM: dts: gose: Fix ports node name for adv7612
ARM: dts: renesas: Fix SD Card/eMMC interface device node names
arm64: dts: renesas: Fix SD Card/eMMC interface device node names
arm64: dts: renesas: add full-pwr-cycle-in-suspend into eMMC nodes
...
Link: https://lore.kernel.org/r/20200717112427.26032-2-geert+renesas@glider.be
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Geert Uytterhoeven [Tue, 19 May 2020 07:55:25 +0000 (09:55 +0200)]
ARM: dts: sh73a0: Add missing clocks to sound node
The device node for the FIFO-buffered Serial Interface sound node lacks
the "clocks" property, as the DTS file didn't describe any clocks yet at
its introduction.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/20200519075525.24742-1-geert+renesas@glider.be
Lad Prabhakar [Wed, 15 Jul 2020 11:09:10 +0000 (12:09 +0100)]
arm64: dts: renesas: r8a774e1: Add CAN[FD] support
Add CAN[01] and CANFD support to RZ/G2H (R8A774E1) SoC specific dtsi.
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Marian-Cristian Rotariu <marian-cristian.rotariu.rb@bp.renesas.com>
Link: https://lore.kernel.org/r/1594811350-14066-21-git-send-email-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Lad Prabhakar [Wed, 15 Jul 2020 11:09:07 +0000 (12:09 +0100)]
arm64: dts: renesas: r8a774e1: Add RWDT node
Add a device node for the Watchdog Timer (RWDT) controller on the Renesas
RZ/G2H (r8a774e1) SoC.
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Marian-Cristian Rotariu <marian-cristian.rotariu.rb@bp.renesas.com>
Link: https://lore.kernel.org/r/1594811350-14066-18-git-send-email-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Lad Prabhakar [Wed, 15 Jul 2020 11:09:05 +0000 (12:09 +0100)]
arm64: dts: renesas: r8a774e1: Add MSIOF nodes
Add the DT nodes needed by MSIOF[0123] interfaces to the SoC dtsi.
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Marian-Cristian Rotariu <marian-cristian.rotariu.rb@bp.renesas.com>
Link: https://lore.kernel.org/r/1594811350-14066-16-git-send-email-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Lad Prabhakar [Wed, 15 Jul 2020 11:09:03 +0000 (12:09 +0100)]
arm64: dts: renesas: r8a774e1: Add I2C and IIC-DVFS support
Add the I2C[0-6] and IIC Bus Interface for DVFS (IIC for DVFS)
devices nodes to the r8a774e1 device tree.
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Marian-Cristian Rotariu <marian-cristian.rotariu.rb@bp.renesas.com>
Link: https://lore.kernel.org/r/1594811350-14066-14-git-send-email-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Lad Prabhakar [Wed, 15 Jul 2020 11:09:00 +0000 (12:09 +0100)]
arm64: dts: renesas: r8a774e1: Add SDHI nodes
Add SDHI[0-2] device nodes to R8A774E1 SoC.
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Marian-Cristian Rotariu <marian-cristian.rotariu.rb@bp.renesas.com>
Link: https://lore.kernel.org/r/1594811350-14066-11-git-send-email-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Lad Prabhakar [Wed, 15 Jul 2020 11:08:59 +0000 (12:08 +0100)]
arm64: dts: renesas: r8a774e1: Add SCIF and HSCIF nodes
Add the device nodes for RZ/G2H SCIF and HSCIF serial ports,
including clocks, power domains and DMAs.
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Marian-Cristian Rotariu <marian-cristian.rotariu.rb@bp.renesas.com>
Link: https://lore.kernel.org/r/1594811350-14066-10-git-send-email-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Marian-Cristian Rotariu [Wed, 15 Jul 2020 11:08:58 +0000 (12:08 +0100)]
arm64: dts: renesas: r8a774e1: Add TMU device nodes
This patch adds TMU[01234] device tree nodes to the r8a774e1
SoC specific DT.
Signed-off-by: Marian-Cristian Rotariu <marian-cristian.rotariu.rb@bp.renesas.com>
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Link: https://lore.kernel.org/r/1594811350-14066-9-git-send-email-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Marian-Cristian Rotariu [Wed, 15 Jul 2020 11:08:56 +0000 (12:08 +0100)]
arm64: dts: renesas: r8a774e1: Add CMT device nodes
This patch adds the CMT[0123] device tree nodes to the
r8a774e1 SoC specific DT.
Signed-off-by: Marian-Cristian Rotariu <marian-cristian.rotariu.rb@bp.renesas.com>
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Link: https://lore.kernel.org/r/1594811350-14066-7-git-send-email-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Marian-Cristian Rotariu [Wed, 15 Jul 2020 11:08:54 +0000 (12:08 +0100)]
arm64: dts: renesas: r8a774e1: Add RZ/G2H thermal support
Add thermal support for R8A774E1 (RZ/G2H) SoC.
Based on the work done for r8a774a1 SoC.
Signed-off-by: Marian-Cristian Rotariu <marian-cristian.rotariu.rb@bp.renesas.com>
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Link: https://lore.kernel.org/r/1594811350-14066-5-git-send-email-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Marian-Cristian Rotariu [Wed, 15 Jul 2020 11:08:51 +0000 (12:08 +0100)]
arm64: dts: renesas: r8a774e1: Add operating points
The RZ/G2H (r8a774e1) comes with two clusters of processors, similarly to
the r8a774a1. The first cluster is made of A57s, the second cluster is made
of A53s.
The operating points for the cluster with the A57s are:
Frequency | Voltage
----------|---------
500 MHz | 0.82V
1.0 GHz | 0.82V
1.5 GHz | 0.82V
The operating points for the cluster with the A53s are:
Frequency | Voltage
----------|---------
800 MHz | 0.82V
1.0 GHz | 0.82V
1.2 GHz | 0.82V
This patch adds the definitions for the operating points to the SoC
specific DT.
Signed-off-by: Marian-Cristian Rotariu <marian-cristian.rotariu.rb@bp.renesas.com>
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Link: https://lore.kernel.org/r/1594811350-14066-2-git-send-email-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Adam Ford [Wed, 15 Jul 2020 14:06:21 +0000 (09:06 -0500)]
arm64: dts: renesas: Introduce r8a774a1-beacon-rzg2m-kit
Beacon EmebeddedWorks, formerly Logic PD is introducing a new
SOM and development kit based on the RZ/G2M SoC from Renesas.
The SOM supports eMMC, WiFi and Bluetooth, along with a Cat-M1
cellular radio.
The Baseboard has Ethernet, USB, HDMI, stereo audio in and out,
along with a variety of push buttons and LED's, and support for
a parallel RGB and an LVDS display.
Signed-off-by: Adam Ford <aford173@gmail.com>
Link: https://lore.kernel.org/r/20200715140622.1295370-1-aford173@gmail.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Marian-Cristian Rotariu [Mon, 13 Jul 2020 21:35:20 +0000 (22:35 +0100)]
arm64: dts: renesas: r8a774e1: Add Ethernet AVB node
This patch adds the SoC specific part of the Ethernet AVB
device tree node.
Signed-off-by: Marian-Cristian Rotariu <marian-cristian.rotariu.rb@bp.renesas.com>
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Link: https://lore.kernel.org/r/1594676120-5862-10-git-send-email-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Marian-Cristian Rotariu [Mon, 13 Jul 2020 21:35:18 +0000 (22:35 +0100)]
arm64: dts: renesas: r8a774e1: Add GPIO device nodes
Add GPIO device nodes to the DT of the r8a774e1 SoC.
Signed-off-by: Marian-Cristian Rotariu <marian-cristian.rotariu.rb@bp.renesas.com>
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Link: https://lore.kernel.org/r/1594676120-5862-8-git-send-email-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Marian-Cristian Rotariu [Mon, 13 Jul 2020 21:35:16 +0000 (22:35 +0100)]
arm64: dts: renesas: r8a774e1: Add SYS-DMAC device nodes
Add sys-dmac[0-2] device nodes for RZ/G2H (R8A774E1) SoC.
Signed-off-by: Marian-Cristian Rotariu <marian-cristian.rotariu.rb@bp.renesas.com>
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Link: https://lore.kernel.org/r/1594676120-5862-6-git-send-email-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Marian-Cristian Rotariu [Mon, 13 Jul 2020 21:35:14 +0000 (22:35 +0100)]
arm64: dts: renesas: r8a774e1: Add IPMMU device nodes
Add RZ/G2H (R8A774E1) IPMMU nodes.
Signed-off-by: Marian-Cristian Rotariu <marian-cristian.rotariu.rb@bp.renesas.com>
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Link: https://lore.kernel.org/r/1594676120-5862-4-git-send-email-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Niklas Söderlund [Mon, 13 Jul 2020 11:10:16 +0000 (13:10 +0200)]
ARM: dts: gose: Fix ports node name for adv7612
When adding the adv7612 device node the ports node was misspelled as
port, fix this.
Fixes: bc63cd87f3ce924f ("ARM: dts: gose: add HDMI input")
Signed-off-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
Link: https://lore.kernel.org/r/20200713111016.523189-1-niklas.soderlund+renesas@ragnatech.se
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Yoshihiro Shimoda [Fri, 10 Jul 2020 12:08:56 +0000 (21:08 +0900)]
ARM: dts: renesas: Fix SD Card/eMMC interface device node names
Fix the device node names as "mmc@".
Fixes: 66474697923c ("ARM: dts: r7s72100: add sdhi to device tree")
Fixes: a49f76cddaee ("ARM: dts: r7s9210: Add SDHI support")
Fixes: 43304a5f5106 ("ARM: shmobile: r8a73a4: tidyup DT node naming")
Fixes: 7d907894bfe3 ("ARM: shmobile: r8a7740: tidyup DT node naming")
Fixes: 3ab2ea5fd1ce ("ARM: dts: r8a7742: Add SDHI nodes")
Fixes: 63ce8a617b51 ("ARM: dts: r8a7743: Add SDHI controllers")
Fixes: b591e323b271 ("ARM: dts: r8a7744: Add SDHI nodes")
Fixes: d83010f87ab3 ("ARM: dts: r8a7744: Initial SoC device tree")
Fixes: 7079131ef9b9 ("ARM: dts: r8a7745: Add SDHI controllers")
Fixes: 0485da788028 ("ARM: dts: r8a77470: Add SDHI1 support")
Fixes: 15aa5a95e820 ("ARM: dts: r8a77470: Add SDHI0 support")
Fixes: f068cc816015 ("ARM: dts: r8a77470: Add SDHI2 support")
Fixes: 14e1d9147d96 ("ARM: shmobile: r8a7778: tidyup DT node naming")
Fixes: 2624705ceb7b ("ARM: shmobile: r8a7779: tidyup DT node naming")
Fixes: b718aa448378 ("ARM: shmobile: r8a7790: tidyup DT node naming")
Fixes: b7ed8a0dd4f1 ("ARM: shmobile: Add SDHI devices to r8a7791 DTSI")
Fixes: ce01b14ecf19 ("ARM: dts: r8a7792: add SDHI support")
Fixes: fc9ee228f500 ("ARM: dts: r8a7793: Add SDHI controllers")
Fixes: b8e8ea127d00 ("ARM: shmobile: r8a7794: add SDHI DT support")
Fixes: 33f6be3bf6b7 ("ARM: shmobile: sh73a0: tidyup DT node naming")
Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Link: https://lore.kernel.org/r/1594382936-14114-1-git-send-email-yoshihiro.shimoda.uh@renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Yoshihiro Shimoda [Fri, 10 Jul 2020 12:03:54 +0000 (21:03 +0900)]
arm64: dts: renesas: Fix SD Card/eMMC interface device node names
Fix the device node names as "mmc@".
Fixes: 663386c3e1aa ("arm64: dts: renesas: r8a774a1: Add SDHI nodes")
Fixes: 9b33e3001b67 ("arm64: dts: renesas: Initial r8a774b1 SoC device tree")
Fixes: 77223211f44d ("arm64: dts: renesas: r8a774c0: Add SDHI nodes")
Fixes: d9d67010e0c6 ("arm64: dts: r8a7795: Add SDHI support to dtsi")
Fixes: a513cf1e6457 ("arm64: dts: r8a7796: add SDHI nodes")
Fixes: 111cc9ace2b5 ("arm64: dts: renesas: r8a77961: Add SDHI nodes")
Fixes: f51746ad7d1f ("arm64: dts: renesas: Add Renesas R8A77961 SoC support")
Fixes: df863d6f95f5 ("arm64: dts: renesas: initial R8A77965 SoC device tree")
Fixes: 9aa3558a02f0 ("arm64: dts: renesas: ebisu: Add and enable SDHI device nodes")
Fixes: 83f18749c2f6 ("arm64: dts: renesas: r8a77995: Add SDHI (MMC) support")
Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Link: https://lore.kernel.org/r/1594382634-13714-1-git-send-email-yoshihiro.shimoda.uh@renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Yoshihiro Shimoda [Fri, 10 Jul 2020 12:03:32 +0000 (21:03 +0900)]
arm64: dts: renesas: add full-pwr-cycle-in-suspend into eMMC nodes
Add full-pwr-cycle-in-suspend property to do a graceful shutdown of
the eMMC device in system suspend.
Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Link: https://lore.kernel.org/r/1594382612-13664-1-git-send-email-yoshihiro.shimoda.uh@renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Marian-Cristian Rotariu [Wed, 8 Jul 2020 17:48:31 +0000 (18:48 +0100)]
arm64: dts: renesas: Add HiHope RZ/G2H sub board support
The HiHope RZ/G2H sub board sits below the HiHope RZ/G2H main board.
These boards are identical with the ones for RZ/G2M[N].
Signed-off-by: Marian-Cristian Rotariu <marian-cristian.rotariu.rb@bp.renesas.com>
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Link: https://lore.kernel.org/r/1594230511-24790-9-git-send-email-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Marian-Cristian Rotariu [Wed, 8 Jul 2020 17:48:30 +0000 (18:48 +0100)]
arm64: dts: renesas: Add HiHope RZ/G2H main board support
Basic support for the HiHope RZ/G2H main board:
- Memory,
- Main crystal,
- Serial console
- eMMC
Signed-off-by: Marian-Cristian Rotariu <marian-cristian.rotariu.rb@bp.renesas.com>
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Link: https://lore.kernel.org/r/1594230511-24790-8-git-send-email-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Marian-Cristian Rotariu [Wed, 8 Jul 2020 17:48:29 +0000 (18:48 +0100)]
arm64: dts: renesas: Initial r8a774e1 SoC device tree
Basic support for the RZ/G2H SoC.
Signed-off-by: Marian-Cristian Rotariu <marian-cristian.rotariu.rb@bp.renesas.com>
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Link: https://lore.kernel.org/r/1594230511-24790-7-git-send-email-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Marian-Cristian Rotariu [Wed, 8 Jul 2020 17:48:28 +0000 (18:48 +0100)]
arm64: defconfig: Enable R8A774E1 SoC
Enable the Renesas RZ/G2H (R8A774E1) SoC in the ARM64 defconfig.
Signed-off-by: Marian-Cristian Rotariu <marian-cristian.rotariu.rb@bp.renesas.com>
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Link: https://lore.kernel.org/r/1594230511-24790-6-git-send-email-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Geert Uytterhoeven [Fri, 17 Jul 2020 08:57:49 +0000 (10:57 +0200)]
Merge tag 'renesas-r8a774e1-dt-binding-defs-tag' into renesas-arm-dt-for-v5.9
Renesas RZ/G2H DT Binding Definitions
Clock and Power Domain definitions for the Renesas RZ/G2H (R8A774E1)
SoC, shared by driver and DT source files.
Arnd Bergmann [Thu, 16 Jul 2020 20:37:43 +0000 (22:37 +0200)]
Merge tag 'v5.8-next-dts64' of git://git./linux/kernel/git/matthias.bgg/linux into arm/dt
mt8173:
- update dmips for Cortex A53
mt8183:
- add pericfg
- fix unit names
- add nodes for USB support
- add basic support for Lenovo IdeaPad Duet 10.1" Chromebook
* tag 'v5.8-next-dts64' of git://git.kernel.org/pub/scm/linux/kernel/git/matthias.bgg/linux:
arm64: dts: mt8183: Add krane-sku176 board
arm64: dts: mt8183: Add USB3.0 support
arm64: dts: mt8183-evb: Fix unit name warnings
arm64: dts: mt8183: Fix unit name warnings
arm64: dts: mt8183: Add MediaTek's peripheral configuration controller
arm64: dts: mt6358: Add the compatible for the regulators
dt-bindings: arm64: dts: mediatek: Add mt8183-kukui-krane-sku176
arm64: dts: mt8173: Re-measure capacity-dmips-mhz
Link: https://lore.kernel.org/r/0b7109c7-7bd2-7373-6032-e9a452d2ebc9@gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Arnd Bergmann [Thu, 16 Jul 2020 20:36:35 +0000 (22:36 +0200)]
Merge tag 'omap-for-v5.9/dt-pt2-signed' of git://git./linux/kernel/git/tmlind/linux-omap into arm/dt
More dts changes for omaps for v5.9
A series of changes to configure IPU and DSP remoteproc for omap4 & 5.
And a change to configure the default mux for am335x-pocketbeagle, and
a change to use https for external links.
* tag 'omap-for-v5.9/dt-pt2-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
Replace HTTP links with HTTPS ones: OMAP DEVICE TREE SUPPORT
ARM: dts: omap5-uevm: Add watchdog timers for IPU and DSP
ARM: dts: omap4-panda-common: Add watchdog timers for IPU and DSP
ARM: dts: omap5-uevm: Add system timers to DSP and IPU
ARM: dts: omap5-uevm: Add CMA pools and enable IPU & DSP
ARM: dts: omap5: Add aliases for rproc nodes
ARM: dts: omap5: Add DSP and IPU nodes
ARM: dts: omap4-panda-common:: Add system timers to DSP and IPU
ARM: dts: omap4-panda-common: Add CMA pools and enable IPU & DSP
ARM: dts: omap4: Add aliases for rproc nodes
ARM: dts: omap4: Add IPU DT node
ARM: dts: omap4: Update the DSP node
ARM: dts: omap5: Add timer_sys_ck clocks for timers
ARM: dts: omap4: Add timer_sys_ck clocks for timers
ARM: dts: am335x-pocketbeagle: set default mux for gpio pins
Link: https://lore.kernel.org/r/pull-1594838111-649880@atomide.com-3
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Arnd Bergmann [Thu, 16 Jul 2020 20:13:53 +0000 (22:13 +0200)]
Merge tag 'omap-for-v5.9/ti-sysc-drop-pdata-take2-signed' of git://git./linux/kernel/git/tmlind/linux-omap into arm/dt
Drop more legacy platform data for omaps for v5.9
A series of changes to drop remaining USB platform data for omap4/5,
and am4, and dra7.
And a patch to drop AES platform data for omap3.
* tag 'omap-for-v5.9/ti-sysc-drop-pdata-take2-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
ARM: OMAP2+: Drop legacy platform data for omap5 usb host
ARM: OMAP2+: Drop legacy platform data for omap4 usb
ARM: OMAP2+: Drop legacy platform data for dra7 dwc3
ARM: OMAP2+: Drop legacy platform data for omap5 dwc3
ARM: OMAP2+: Drop legacy platform data for am4 dwc3
bus: ti-sysc: Add missing quirk flags for usb_host_hs
ARM: dts: omap3: Migrate AES from hwmods to sysc-omap2
Link: https://lore.kernel.org/r/pull-1594838111-649880@atomide.com-2
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Dmitry Osipenko [Mon, 29 Jun 2020 02:54:55 +0000 (05:54 +0300)]
dt-bindings: ARM: tegra: Add ASUS Google Nexus 7
Add a binding for the Tegra30-based ASUS Google Nexus 7 tablet device.
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Dmitry Osipenko [Mon, 29 Jun 2020 02:54:54 +0000 (05:54 +0300)]
dt-bindings: ARM: tegra: Add Acer Iconia Tab A500
Add a binding for the Tegra20-based Acer Iconia Tab A500 tablet device.
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Dmitry Osipenko [Mon, 29 Jun 2020 02:54:53 +0000 (05:54 +0300)]
dt-bindings: Add vendor prefix for Acer Inc.
Acer is a hardware and electronics corporation, specializing in advanced
electronics technology. Acer's products include desktop PCs, laptop PCs,
tablets, servers, displays, storage devices, virtual reality devices,
smartphones and peripherals. Their web site is http://www.acer.com/.
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Dmitry Osipenko [Mon, 29 Jun 2020 02:54:52 +0000 (05:54 +0300)]
ARM: tegra: Add device-tree for ASUS Google Nexus 7
There are few hardware variants of NVIDIA Tegra30-based Nexus 7 device:
1. WiFi-only (named Grouper)
2. GSM (named Tilapia)
3. Using Maxim PMIC (E1565 board ID)
4. Using Ti PMIC (PM269 board ID)
This patch adds device-trees for known and tested variants.
Link: https://wiki.postmarketos.org/wiki/Google_Nexus_7_2012_(asus-grouper)
Tested-by: Pedro Ângelo <pangelo@void.io>
Tested-by: Matt Merhar <mattmerhar@protonmail.com>
Tested-by: Zack Pearsall <zpearsall@yahoo.com>
Signed-off-by: David Heidelberg <david@ixit.cz>
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Dmitry Osipenko [Mon, 29 Jun 2020 02:54:51 +0000 (05:54 +0300)]
ARM: tegra: Add device-tree for Acer Iconia Tab A500
Add device-tree for Acer Iconia Tab A500, which is NVIDIA Tegra20-based
tablet device.
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Adam Ford [Tue, 14 Jul 2020 12:34:19 +0000 (07:34 -0500)]
dt-bindings: arm: renesas: Document beacon-rzg2m
Beacon EmbeddedWorks is introducing a development kit based on the
Renesas RZ/G2M platform. This patch adds the entry to the bindings
list.
Signed-off-by: Adam Ford <aford173@gmail.com>
Link: https://lore.kernel.org/r/20200714123419.3390-2-aford173@gmail.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Geert Uytterhoeven [Mon, 6 Jul 2020 15:40:15 +0000 (17:40 +0200)]
arm64: dts: renesas: Restructure Makefile
Make the Makefile for building Renesas DTB files easier to read and
maintain:
- Get rid of line continuations,
- Use a single entry per line,
- Sort SoCs and boards alphabetically,
- Separate SoCs by blank lines.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
Link: https://lore.kernel.org/r/20200706154015.29257-1-geert+renesas@glider.be
Geert Uytterhoeven [Mon, 6 Jul 2020 15:14:00 +0000 (17:14 +0200)]
arm64: dts: renesas: cat875: Drop superfluous phy-mode
The PHY mode already defaults to RGMII in the RZ/G2E base SoC DTS file,
so there is no need to specify the same value in board files.
Fixes: 6b170cd3ed02949f ("arm64: dts: renesas: cat875: Add ethernet support")
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Link: https://lore.kernel.org/r/20200706151400.23105-1-geert+renesas@glider.be
Niklas Söderlund [Sat, 4 Jul 2020 15:58:56 +0000 (17:58 +0200)]
ARM: dts: renesas: Remove unused remote property from adv7180 nodes
The remote property is never read by the driver, remove it.
Signed-off-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
Link: https://lore.kernel.org/r/20200704155856.3037010-3-niklas.soderlund+renesas@ragnatech.se
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Niklas Söderlund [Sat, 4 Jul 2020 15:58:55 +0000 (17:58 +0200)]
ARM: dts: gose: Fix ports node name for adv7180
When adding the adv7180 device node the ports node was misspelled as
port, fix this.
Fixes: 8cae359049a88b75 ("ARM: dts: gose: add composite video input")
Signed-off-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
Link: https://lore.kernel.org/r/20200704155856.3037010-2-niklas.soderlund+renesas@ragnatech.se
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Thierry Reding [Thu, 25 Jun 2020 11:38:59 +0000 (13:38 +0200)]
ARM: tegra: Add HDMI supplies on Nyan boards
The SOR controller needs the AVDD I/O and VDD HDMI PLL supplies in order
to operate correctly. Make sure to specify them for Nyan boards.
Signed-off-by: Thierry Reding <treding@nvidia.com>
Thierry Reding [Wed, 15 Jul 2020 09:47:43 +0000 (11:47 +0200)]
ARM: tegra: Add missing DSI controller on Tegra30
Tegra30 has a DSI controller, although it is never used on any of the
devices supported by the upstream Linux kernel.
Signed-off-by: Thierry Reding <treding@nvidia.com>
Thierry Reding [Wed, 15 Jul 2020 09:46:05 +0000 (11:46 +0200)]
ARM: tegra: Add i2c-bus subnode for DPAUX controllers
The DPAUX controller device tree bindings require the bus to have an
i2c-bus subnode to distinguish between I2C clients and pinmux groups.
Signed-off-by: Thierry Reding <treding@nvidia.com>
Tony Lindgren [Mon, 13 Jul 2020 16:59:49 +0000 (09:59 -0700)]
ARM: OMAP2+: Drop legacy platform data for omap5 usb host
We can now probe devices with ti-sysc interconnect driver and dts
data. Let's drop the related platform data and custom ti,hwmods
dts property.
As we're just dropping data, and the early platform data init
is based on the custom ti,hwmods property, we want to drop both
the platform data and ti,hwmods property in a single patch.
Signed-off-by: Tony Lindgren <tony@atomide.com>
Tony Lindgren [Mon, 13 Jul 2020 16:59:49 +0000 (09:59 -0700)]
ARM: OMAP2+: Drop legacy platform data for omap4 usb
We can now probe devices with ti-sysc interconnect driver and dts
data. Let's drop the related platform data and custom ti,hwmods
dts property.
As we're just dropping data, and the early platform data init
is based on the custom ti,hwmods property, we want to drop both
the platform data and ti,hwmods property in a single patch.
Signed-off-by: Tony Lindgren <tony@atomide.com>
Tony Lindgren [Mon, 13 Jul 2020 16:59:48 +0000 (09:59 -0700)]
ARM: OMAP2+: Drop legacy platform data for dra7 dwc3
We can now probe devices with ti-sysc interconnect driver and dts
data. Let's drop the related platform data and custom ti,hwmods
dts property.
As we're just dropping data, and the early platform data init
is based on the custom ti,hwmods property, we want to drop both
the platform data and ti,hwmods property in a single patch.
Signed-off-by: Tony Lindgren <tony@atomide.com>
Tony Lindgren [Mon, 13 Jul 2020 16:59:48 +0000 (09:59 -0700)]
ARM: OMAP2+: Drop legacy platform data for omap5 dwc3
We can now probe devices with ti-sysc interconnect driver and dts
data. Let's drop the related platform data and custom ti,hwmods
dts property.
As we're just dropping data, and the early platform data init
is based on the custom ti,hwmods property, we want to drop both
the platform data and ti,hwmods property in a single patch.
Signed-off-by: Tony Lindgren <tony@atomide.com>
Thierry Reding [Tue, 14 Jul 2020 09:37:30 +0000 (11:37 +0200)]
dt-bindings: tegra: Document Jetson Xavier NX (and devkit)
Add the compatible strings for the Jetson Xavier NX and the
corresponding developer kit.
Signed-off-by: Thierry Reding <treding@nvidia.com>
Martin Blumenstingl [Sat, 20 Jun 2020 16:36:54 +0000 (18:36 +0200)]
ARM: dts: meson8b: odroidc1: enable the SDHC controller
Odroid-C1 has an eMMC connector where users can optionally install an
eMMC module. The eMMC modules run off a 1.8V VQMMC supply which means
that HS-200 mode can be used (this is the highest mode that the SDHC
controller supports). Enable the SDHC controller so eMMC modules can be
accessed.
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Link: https://lore.kernel.org/r/20200620163654.37207-4-martin.blumenstingl@googlemail.com
Martin Blumenstingl [Sat, 20 Jun 2020 16:36:53 +0000 (18:36 +0200)]
ARM: dts: meson8b: ec100: enable the SDHC controller
EC-100 has built-in eMMC flash which is hard-wired to 3.3V VCC (which
means it's limited to high-speed MMC modes). Enable the SDHC controller
to access the contents of the eMMC flash.
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Link: https://lore.kernel.org/r/20200620163654.37207-3-martin.blumenstingl@googlemail.com
Martin Blumenstingl [Sat, 20 Jun 2020 16:36:52 +0000 (18:36 +0200)]
ARM: dts: meson: add the SDHC MMC controller
Meson6, Meson8, Meson8b and Meson8m2 are using a similar SDHC controller
IP which typically connects to an eMMC chip (because unlike the SDIO
controller the SDHC controller has an 8-bit bus interface).
On Meson8, Meson8b and Meson8m2 the clock inputs are all the same.
However, Meson8m2 seems to have an improved version of the SHDC
controller IP which doesn't require the driver to wait manually for a
flush of a DMA transfer. Thus every SoC has it's own compatible string
so if more difference are discovered they can be implemented.
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Link: https://lore.kernel.org/r/20200620163654.37207-2-martin.blumenstingl@googlemail.com
Martin Blumenstingl [Sat, 20 Jun 2020 16:23:47 +0000 (18:23 +0200)]
arm64: dts: amlogic: Add the Ethernet "timing-adjustment" clock
Add the "timing-adjustment" clock now that we know how it is connected
to the PRG_ETHERNET registers. It is used internally to generate the
RGMII RX delay on the MAC side (if needed).
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Reviewed-by: Neil Armstrong <narmstrong@baylibre.com>
Link: https://lore.kernel.org/r/20200620162347.26159-1-martin.blumenstingl@googlemail.com
Martin Blumenstingl [Sat, 20 Jun 2020 16:12:11 +0000 (18:12 +0200)]
arm64: dts: meson-gx: Switch to the meson-ee-pwrc bindings
The "amlogic,meson-gx-pwrc-vpu" binding only supports the VPU power
domain, while actually there are more power domains behind that set of
registers. Switch to the new bindings so we can add more power domains
as needed.
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Reviewed-by: Neil Armstrong <narmstrong@baylibre.com>
Link: https://lore.kernel.org/r/20200620161211.23685-1-martin.blumenstingl@googlemail.com
Martin Blumenstingl [Sat, 20 Jun 2020 16:10:10 +0000 (18:10 +0200)]
ARM: dts: meson8b: add power domain controller
The Meson8b SoCs have a power domain controller which can turn on/off
various register areas (such as: Ethernet, VPU, etc.).
Add the main "pwrc" controller and configure the Ethernet power domain.
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Reviewed-by: Neil Armstrong <narmstrong@baylibre.com>
Link: https://lore.kernel.org/r/20200620161010.23171-4-martin.blumenstingl@googlemail.com
Martin Blumenstingl [Sat, 20 Jun 2020 16:10:09 +0000 (18:10 +0200)]
ARM: dts: meson8m2: add resets for the power domain controller
The Meson8m2 SoCs has introduced additional reset lines for the VPU
compared to Meson8. Also it uses a slightly different VPU clock
frequency compared to Meson8 since it can now achieve 364MHz thanks to
the addition of the GP_PLL.
Add the reset lines, VPU clock configuration and update the compatible
string so the implementation differences can be managed.
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Reviewed-by: Neil Armstrong <narmstrong@baylibre.com>
Link: https://lore.kernel.org/r/20200620161010.23171-3-martin.blumenstingl@googlemail.com
Martin Blumenstingl [Sat, 20 Jun 2020 16:10:08 +0000 (18:10 +0200)]
ARM: dts: meson8: add power domain controller
The Meson8 SoCs have a power domain controller which can turn on/off
various register areas (such as: Ethernet, VPU, etc.).
Add the main "pwrc" controller and configure the Ethernet power domain.
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Reviewed-by: Neil Armstrong <narmstrong@baylibre.com>
Link: https://lore.kernel.org/r/20200620161010.23171-2-martin.blumenstingl@googlemail.com
Neil Armstrong [Mon, 13 Jul 2020 06:59:31 +0000 (08:59 +0200)]
arm64: dts: meson-khadas-vim3: add Khadas MCU nodes
Add the Khadas MCU node with active FAN thermal nodes for all the
Khadas VIM3 variants.
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Reviewed-by: Amit Kucheria <amit.kucheria@linaro.org>
Link: https://lore.kernel.org/r/20200713065931.19845-1-narmstrong@baylibre.com
Alexander A. Klimov [Wed, 8 Jul 2020 09:34:51 +0000 (11:34 +0200)]
Replace HTTP links with HTTPS ones: OMAP DEVICE TREE SUPPORT
Rationale:
Reduces attack surface on kernel devs opening the links for MITM
as HTTPS traffic is much harder to manipulate.
Deterministic algorithm:
For each file:
If not .svg:
For each line:
If doesn't contain `\bxmlns\b`:
For each link, `\bhttp://[^# \t\r\n]*(?:\w|/)`:
If neither `\bgnu\.org/license`, nor `\bmozilla\.org/MPL\b`:
If both the HTTP and HTTPS versions
return 200 OK and serve the same content:
Replace HTTP with HTTPS.
Signed-off-by: Alexander A. Klimov <grandmaster@al2klimov.de>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Suman Anna [Thu, 9 Jul 2020 23:19:54 +0000 (18:19 -0500)]
ARM: dts: omap5-uevm: Add watchdog timers for IPU and DSP
The watchdog timers have been added for the IPU and DSP remoteproc
devices for the OMAP5 uEVM board. The following timers (same as the
timers on OMAP4 Panda boards) are used as the watchdog timers,
DSP : GPT6
IPU : GPT9 & GPT11 (one for each Cortex-M4 core)
The MPU-side drivers will use this data to initialize the watchdog
timers, and listen for any watchdog triggers. The BIOS-side code
needs to configure and refresh these timers properly to not throw
a watchdog error.
These timers can be changed or removed as per the system integration
needs, alongside appropriate equivalent changes on the firmware side.
Signed-off-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Suman Anna [Thu, 9 Jul 2020 23:19:53 +0000 (18:19 -0500)]
ARM: dts: omap4-panda-common: Add watchdog timers for IPU and DSP
The watchdog timers have been added for the IPU and DSP remoteproc
devices on all the OMAP4-based Panda boards. The following timers
are used as the watchdog timers,
DSP : GPT6
IPU : GPT9 & GPT11 (one for each Cortex-M3 core)
The MPU-side drivers will use this data to initialize the watchdog
timers, and listen for any watchdog triggers. The BIOS-side code
needs to configure and refresh these timers properly to not throw
a watchdog error.
These timers can be changed or removed as per the system integration
needs, alongside appropriate equivalent changes on the firmware side.
Signed-off-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Suman Anna [Thu, 9 Jul 2020 23:19:52 +0000 (18:19 -0500)]
ARM: dts: omap5-uevm: Add system timers to DSP and IPU
The BIOS System Tick timers have been added for the IPU and DSP
remoteproc devices for the OMAP5 uEVM boards. The following timers
(same as the timers on OMAP4 Panda boards) are chosen:
IPU : GPT3 (SMP-mode)
DSP : GPT5
IPU has two Cortex-M4 processors, and is currently expected to be
running in SMP-mode, so only a single timer suffices to provide
the BIOS tick timer. An additional timer should be added for the
second processor in IPU if it were to be run in non-SMP mode. The
timer value also needs to be unique from the ones used by other
processors so that they can be run simultaneously.
The timers are optional, but are mandatory to support device
management features such as power management and watchdog support.
The above are added to successfully boot and execute firmware images
configured with the respective timers, images that use internal
processor subsystem timers are not affected. The timers can be
changed or removed as per the system integration needs, alongside
equivalent changes on the firmware side.
Signed-off-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Suman Anna [Thu, 9 Jul 2020 23:19:51 +0000 (18:19 -0500)]
ARM: dts: omap5-uevm: Add CMA pools and enable IPU & DSP
The CMA reserved memory nodes have been added for the IPU and DSP
remoteproc devices on the OMAP5 uEVM board. These nodes are assigned
to the respective rproc device nodes, and both the IPU and DSP remote
processors are enabled for this board.
The current CMA pools and sizes are defined statically for each device.
The starting addresses are fixed to meet current dependencies on the
remote processor firmwares, and will go away when the remote-side
code has been improved to gather this information runtime during
its initialization.
An associated pair of the rproc node and its CMA node can be disabled
later on if there is no use-case defined to use that remote processor.
Signed-off-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Suman Anna [Thu, 9 Jul 2020 23:19:50 +0000 (18:19 -0500)]
ARM: dts: omap5: Add aliases for rproc nodes
Add aliases for the DSP and IPU remoteproc processor
nodes common to all OMAP5 boards. The aliases uses
the stem "rproc", and are identical to the values
chosen on OMAP4 boards.
The aliases can be overridden, if needed, in the
respective board files.
Signed-off-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Suman Anna [Thu, 9 Jul 2020 23:19:49 +0000 (18:19 -0500)]
ARM: dts: omap5: Add DSP and IPU nodes
OMAP5, like OMAP4, also has two remote processor subsystems,
DSP and IPU. The IPU subsystem though has dual Cortex-M4
processors instead of the dual Cortex-M3 processors in OMAP4,
but otherwise has almost the same set of features. Add the
DT nodes for these two processor sub-systems for all OMAP5
SoCs.
The nodes have the 'iommus', 'clocks', 'resets', 'firmware' and
'mboxes' properties added, and are disabled for now. The IPU node
has its L2 RAM memory specified through the 'reg' and 'reg-names'
properties. The DSP node doesn't have these since it doesn't have
any L2 RAM memories, but has an additional 'ti,bootreg' property
instead as it has a specific boot register that needs to be
programmed for booting.
These nodes should be enabled as per the individual product
configuration in the corresponding board dts files.
Signed-off-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Suman Anna [Thu, 9 Jul 2020 23:19:48 +0000 (18:19 -0500)]
ARM: dts: omap4-panda-common:: Add system timers to DSP and IPU
The BIOS System Tick timers have been added for the IPU and DSP
remoteproc devices on all the OMAP4-based Panda boards. The
following DMTimers are chosen:
IPU : GPT3 (SMP-mode)
DSP : GPT5
IPU has two Cortex-M3 processors, and is currently expected to be
running in SMP-mode, so only a single timer suffices to provide
the BIOS tick timer. An additional timer should be added for the
second processor in IPU if it were to be run in non-SMP mode. The
timer value also needs to be unique from the ones used by other
processors so that they can be run simultaneously.
The timers are optional, but are mandatory to support device
management features such as power management and watchdog support.
The above are added to successfully boot and execute firmware images
configured with the respective timers, images that use internal
processor subsystem timers are not affected. The timers can be
changed or removed as per the system integration needs, alongside
equivalent changes on the firmware side.
Signed-off-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Suman Anna [Thu, 9 Jul 2020 23:19:47 +0000 (18:19 -0500)]
ARM: dts: omap4-panda-common: Add CMA pools and enable IPU & DSP
The CMA reserved memory nodes have been added for the IPU and DSP
remoteproc devices on all the OMAP4-based Panda boards. These nodes
are assigned to the respective rproc device nodes, and both the
IPU and DSP remote processors are enabled for all these boards.
The current CMA pools and sizes are defined statically for each device.
The starting addresses are fixed to meet current dependencies on the
remote processor firmwares, and will go away when the remote-side
code has been improved to gather this information runtime during
its initialization.
An associated pair of the rproc node and its CMA node can be disabled
later on if there is no use-case defined to use that remote processor.
Signed-off-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Suman Anna [Thu, 9 Jul 2020 23:19:46 +0000 (18:19 -0500)]
ARM: dts: omap4: Add aliases for rproc nodes
Add aliases for the DSP and IPU remoteproc processor
nodes common to all OMAP4 boards. The aliases uses
the stem "rproc".
The aliases can be overridden, if needed, in the
respective board files.
Signed-off-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Suman Anna [Thu, 9 Jul 2020 23:19:45 +0000 (18:19 -0500)]
ARM: dts: omap4: Add IPU DT node
The DT node for the Dual-Cortex M3 IPU processor sub-system has
been added for OMAP4 SoCs. The L2RAM memory region information
has been added to the node through the 'reg' and 'reg-names'
properties. The node has the 'iommus', 'clocks', 'resets',
'mboxes' and 'firmware' properties also added, and is disabled
for now. It should be enabled as per the individual product
configuration in the corresponding board dts files.
Signed-off-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Suman Anna [Thu, 9 Jul 2020 23:19:44 +0000 (18:19 -0500)]
ARM: dts: omap4: Update the DSP node
The compatible property for the DSP node is updated to match
the OMAP remoteproc bindings. The node is moved from the soc
node to the ocp node to better reflect the connectivity from
MPU side.
The node is updated with the 'ti,bootreg', 'clocks', 'resets',
'iommus', 'mboxes' and 'firmware' properties. Note that the
node does not have any 'reg' or 'reg-names' properties since
it doesn't have any L2 RAM memory, but only Unicaches.
The node is disabled for now, and should be enabled as per
the individual product configuration in the corresponding
board dts files.
Signed-off-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Suman Anna [Thu, 9 Jul 2020 23:19:43 +0000 (18:19 -0500)]
ARM: dts: omap5: Add timer_sys_ck clocks for timers
The commit
d41e53040926 ("clk: ti: omap5: cleanup unnecessary clock
aliases") has cleaned up all timer_sys_ck clock aliases and retained
only the timer_32k_ck clock alias. The OMAP clocksource timer driver
though still uses this clock alias when reconfiguring the parent
clock source for the timer functional clocks, so add these clocks
to all the timer nodes except for the always-on timers 1 and 12.
This is required by the OMAP remoteproc driver to successfully
acquire a timer and configure the source clock to be driven from
timer_sys_ck clock.
Signed-off-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Suman Anna [Thu, 9 Jul 2020 23:19:42 +0000 (18:19 -0500)]
ARM: dts: omap4: Add timer_sys_ck clocks for timers
The commit
1c7de9f27a65 ("clk: ti: omap4: cleanup unnecessary clock
aliases") has cleaned up all timer_sys_ck clock aliases and retained
only the timer_32k_ck clock alias. The OMAP clocksource timer driver
though still uses this clock alias when reconfiguring the parent
clock source for the timer functional clocks, so add these clocks
to all the timer nodes.
This is required by the OMAP remoteproc driver to successfully
acquire a timer and configure the source clock to be driven from
timer_sys_ck clock.
Signed-off-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Drew Fustini [Sun, 12 Jul 2020 10:37:19 +0000 (12:37 +0200)]
ARM: dts: am335x-pocketbeagle: set default mux for gpio pins
These pins on the PocketBeagle P1 and P2 headers are connected to AM3358
balls with gpio lines, and these pins are not used for any other
peripherals by default. These GPIO lines are unclaimed and could be used
by userspace program through the gpiod ABI.
This patch adds a "default" state in the am33xx_pinmux node and sets the
mux for those pins to gpio (mode 7) and input enable.
The "pinctrl-single,bias-pullup" and "pinctrl-single,bias-pulldown"
pinconf properties are also set for each pin per the ball reset state in
section 4.2 of the datasheet [0].
This is the AM335x pin control register format in Table 9-60 [1]:
bit attribute value
----------------------------------
31-7 reserved 0 on reset
6 slew { 0: fast, 1: slow }
5 rx_active { 0: rx disable, 1: rx enabled }
4 pu_typesel { 0: pulldown select, 1: pullup select }
3 puden { 0: pud enable, 1: disabled }
2 mode 3 bits to selec mode 0 to 7
1 mode
0 mode
The values for the bias pinconf properties are derived as follows:
pinctrl-single,bias-pullup = <[input] [enabled] [disable] [mask]>;
pinctrl-single,bias-pullup = < 0x10 0x10 0x10 0x18 >;
2^5 2^4 2^3 2^2 2^1 2^0 |
0x20 0x10 0x08 0x04 0x02 0x01 |
--------------------------------------------------|
input x 1 0 x x x | 0x10
enabled x 1 0 x x x | 0x10
disabled x 0 0 x x x | 0x00
mask x 1 1 x x x | 0x18
pinctrl-single,bias-pulldown = <[input] [enabled] [disable] [mask]>;
pinctrl-single,bias-pulldown = < 0x0 0x0 0x10 0x18 >;
2^5 2^4 2^3 2^2 2^1 2^0 |
0x20 0x10 0x08 0x04 0x02 0x01 |
--------------------------------------------------|
input x 0 0 x x x | 0x00
enabled x 0 0 x x x | 0x00
disabled x 1 0 x x x | 0x10
mask x 1 1 x x x | 0x18
[0] http://www.ti.com/lit/ds/symlink/am3358.pdf
[1] https://www.ti.com/lit/ug/spruh73q/spruh73q.pdf
Signed-off-by: Drew Fustini <drew@beagleboard.org>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Tony Lindgren [Mon, 13 Jul 2020 16:59:48 +0000 (09:59 -0700)]
ARM: OMAP2+: Drop legacy platform data for am4 dwc3
We can now probe devices with ti-sysc interconnect driver and dts
data. Let's drop the related platform data and custom ti,hwmods
dts property.
As we're just dropping data, and the early platform data init
is based on the custom ti,hwmods property, we want to drop both
the platform data and ti,hwmods property in a single patch.
[tony@atomide.com: fixed typo for am3 vs am4]
Signed-off-by: Tony Lindgren <tony@atomide.com>
Tony Lindgren [Mon, 13 Jul 2020 16:59:47 +0000 (09:59 -0700)]
bus: ti-sysc: Add missing quirk flags for usb_host_hs
Similar to what we have for the legacy platform data, we need to
configure SWSUP_SIDLE and SWSUP_MSTANDBY quirks for usb_host_hs.
These are needed to drop the legacy platform data for usb_host_hs.
Signed-off-by: Tony Lindgren <tony@atomide.com>
Arnd Bergmann [Mon, 13 Jul 2020 13:23:07 +0000 (15:23 +0200)]
Merge tag 'arm-soc/for-5.9/devicetree' of https://github.com/Broadcom/stblinux into arm/dt
This pull request contains Broadcom ARM-based SoCs Device Tree changes
for 5.9 please pull the following:
- Rafal specifies the switch ports for various Luxul devices (XAP-1410,
XAP-1510, XAP-1610, XWC-1000, XWC-2000, XWR-1200, XWR-3100, XWR-3150)
- Krzysztof fixes the L2 cache controller node name to conform to
dtschema
- Maxime introduces two new clock providers for Raspberry Pi 4, one to
support firmware based clocks and another one for the DVP block
feeding into the two HDMI blocks.
* tag 'arm-soc/for-5.9/devicetree' of https://github.com/Broadcom/stblinux:
ARM: dts: bcm: Align L2 cache-controller nodename with dtschema
ARM: dts: BCM5301X: Specify switch ports for Luxul devices
ARM: dts: bcm2711: Add HDMI DVP
ARM: dts: bcm2711: Add firmware clocks node
Link: https://lore.kernel.org/r/20200707045759.17562-1-f.fainelli@gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Arnd Bergmann [Mon, 13 Jul 2020 13:08:42 +0000 (15:08 +0200)]
Merge tag 'omap-for-v5.9/dt-signed' of git://git./linux/kernel/git/tmlind/linux-omap into arm/dt
Device tree changes for omaps for v5.9 merge window
This series of changes configures the GPIO line names for am335x beaglebone
black and pocketbeagle to make it easier to configure the pins. To make use
of the pins, we also add the gpio-ranges for am335x.
We also enable IPU and DSP repmoteproc for am5729-beaglebone-ai, and then
there are two non-urgent dtschema validator warning fixes.
* tag 'omap-for-v5.9/dt-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
ARM: dts: am335x-pocketbeagle: add gpio-line-names
ARM: dts: am335x-boneblack: add gpio-line-names
ARM: dts: am33xx-l4: add gpio-ranges
ARM: dts: am5729-beaglebone-ai: Disable ununsed mailboxes
ARM: dts: am5729-beaglebone-ai: Enable IPU & DSP rprocs
ARM: dts: am: Align L2 cache-controller nodename with dtschema
ARM: dts: omap: Align L2 cache-controller nodename with dtschema
Link: https://lore.kernel.org/r/pull-1594402929-762188@atomide.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Arnd Bergmann [Mon, 13 Jul 2020 13:07:44 +0000 (15:07 +0200)]
Merge tag 'uniphier-dt64-v5.9' of git://git./linux/kernel/git/masahiroy/linux-uniphier into arm/dt
UniPhier ARM64 SoC DT updates for v5.9
- add missing interrupts property to support card serial
- fix node names to follow the DT schema
- add clock-names and reset-names to pcie-phy
* tag 'uniphier-dt64-v5.9' of git://git.kernel.org/pub/scm/linux/kernel/git/masahiroy/linux-uniphier:
arm64: dts: uniphier: Add missing clock-names and reset-names to pcie-phy
arm64: dts: uniphier: Rename ethphy node to ethernet-phy
arm64: dts: uniphier: give fixed port number to support card serial
arm64: dts: uniphier: add interrupts to support card serial
Link: https://lore.kernel.org/r/CAK7LNARK4SKhSW-xwgc3vq7FO7N864jPgzm8NtsGOv8wVFVyBQ@mail.gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Arnd Bergmann [Mon, 13 Jul 2020 13:00:36 +0000 (15:00 +0200)]
Merge tag 'uniphier-dt-v5.9' of git://git./linux/kernel/git/masahiroy/linux-uniphier into arm/dt
UniPhier ARM SoC DT updates for v5.9
- add missing interrupts property to support card serial
- fix node names to follow the DT schema
- add PCIe endpoint and PHY nodes for Pro5 SoC
- simplify device hierarchy of support-card.dtsi
* tag 'uniphier-dt-v5.9' of git://git.kernel.org/pub/scm/linux/kernel/git/masahiroy/linux-uniphier:
ARM: dts: uniphier: simplify support-card node structure
ARM: dts: uniphier: Add PCIe endpoint and PHY node for Pro5
ARM: dts: uniphier: Rename ethphy node to ethernet-phy
ARM: dts: uniphier: give fixed port number to support card serial
ARM: dts: uniphier: rename support card serial node to fix schema warning
ARM: dts: uniphier: add interrupts to support card serial
Link: https://lore.kernel.org/r/CAK7LNARGDcCKxV3-H7WmuZAVe49n0QF+672-KN0tsP0och0a_A@mail.gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Sergei Shtylyov [Fri, 19 Jun 2020 20:22:32 +0000 (23:22 +0300)]
arm64: dts: renesas: r8a77970: eagle/v3msk: Add QSPI flash support
Define the Eagle/V3MSK board dependent parts of the RPC-IF device node.
Add device nodes for Spansion S25FS512S SPI flash and MTD partitions on it.
Based on the original patches by Dmitry Shifrin.
Signed-off-by: Dmitry Shifrin <dmitry.shifrin@cogentembedded.com>
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Link: https://lore.kernel.org/r/fca1d012-29bf-eead-1c0d-4dd837c0bc68@cogentembedded.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Sergei Shtylyov [Fri, 19 Jun 2020 20:21:37 +0000 (23:21 +0300)]
arm64: dts: renesas: r8a77970: Add RPC-IF support
Describe RPC-IF in the R8A77970 device tree.
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Link: https://lore.kernel.org/r/ba8bb326-7e77-6ab7-668f-fdc22010c8ef@cogentembedded.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Sergei Shtylyov [Tue, 19 May 2020 20:14:06 +0000 (23:14 +0300)]
arm64: dts: renesas: r8a77980: condor/v3hsk: Add QSPI flash support
Define the Condor/V3HSK board dependent parts of the RPC-IF device node.
Add device nodes for Spansion S25FS512S SPI flash and MTD partitions on it.
Based on the original patches by Dmitry Shifrin.
Signed-off-by: Dmitry Shifrin <dmitry.shifrin@cogentembedded.com>
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Link: https://lore.kernel.org/r/322ca212-a45f-cd2c-f1eb-737f0aa42d22@cogentembedded.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Sergei Shtylyov [Tue, 19 May 2020 20:13:19 +0000 (23:13 +0300)]
arm64: dts: renesas: r8a77980: Add RPC-IF support
Describe RPC-IF in the R8A77980 device tree.
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Link: https://lore.kernel.org/r/f18853d9-8ef9-717a-9039-2191b26e579f@cogentembedded.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Marian-Cristian Rotariu [Tue, 7 Jul 2020 16:18:09 +0000 (17:18 +0100)]
clk: renesas: Add r8a774e1 CPG Core Clock Definitions
Add all RZ/G2H Clock Pulse Generator Core Clock Outputs, as listed in
Table 11.2 ("List of Clocks [RZ/G2H]") of the RZ/G2H Hardware User's
Manual.
Signed-off-by: Marian-Cristian Rotariu <marian-cristian.rotariu.rb@bp.renesas.com>
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Link: https://lore.kernel.org/r/1594138692-16816-10-git-send-email-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Marian-Cristian Rotariu [Tue, 7 Jul 2020 16:18:04 +0000 (17:18 +0100)]
dt-bindings: power: Add r8a774e1 SYSC power domain definitions
This patch adds power domain indices for the RZ/G2H (r8a774e1) SoC.
Signed-off-by: Marian-Cristian Rotariu <marian-cristian.rotariu.rb@bp.renesas.com>
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Link: https://lore.kernel.org/r/1594138692-16816-5-git-send-email-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Marian-Cristian Rotariu [Tue, 7 Jul 2020 16:18:06 +0000 (17:18 +0100)]
dt-bindings: reset: renesas,rst: Document r8a774e1 reset module
Document bindings for the RZ/G2H (R8A774E1) reset module.
Signed-off-by: Marian-Cristian Rotariu <marian-cristian.rotariu.rb@bp.renesas.com>
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Link: https://lore.kernel.org/r/1594138692-16816-7-git-send-email-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Marian-Cristian Rotariu [Tue, 7 Jul 2020 16:18:03 +0000 (17:18 +0100)]
dt-bindings: power: renesas,rcar-sysc: Document r8a774e1 SYSC binding
Document bindings for the RZ/G2H (aka R8A774E1) SYSC block.
Signed-off-by: Marian-Cristian Rotariu <marian-cristian.rotariu.rb@bp.renesas.com>
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Link: https://lore.kernel.org/r/1594138692-16816-4-git-send-email-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Marian-Cristian Rotariu [Tue, 7 Jul 2020 16:18:00 +0000 (17:18 +0100)]
dt-bindings: arm: renesas: Add HopeRun RZ/G2H boards
This patch adds board HiHope RZ/G2H (the main board, powered by the
R8A774E1) and board HiHope RZ/G2 EX (the expansion board that sits on top
of the HiHope RZ/G2H). Both boards are made by Jiangsu HopeRun Software
Co., Ltd. (a.k.a. HopeRun).
Signed-off-by: Marian-Cristian Rotariu <marian-cristian.rotariu.rb@bp.renesas.com>
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Link: https://lore.kernel.org/r/1594138692-16816-1-git-send-email-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Marian-Cristian Rotariu [Tue, 7 Jul 2020 16:12:35 +0000 (17:12 +0100)]
dt-bindings: arm: renesas: Document RZ/G2H SoC DT bindings
Add device tree binding documentation for the Renesas RZ/G2H (r8a774e1)
SoC.
Signed-off-by: Marian-Cristian Rotariu <marian-cristian.rotariu.rb@bp.renesas.com>
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Link: https://lore.kernel.org/r/1594138368-16449-2-git-send-email-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Enric Balletbo i Serra [Thu, 25 Jun 2020 10:17:57 +0000 (12:17 +0200)]
arm64: dts: mt8183: Add krane-sku176 board
Also known as the Lenovo IdeaPad Duet Chromebook.
There are different krane boards with shared resources, hence a
mt8183-kukui-krane.dtsi was created for easily introduce future new
boards. The same happens with the baseboard codenamed kukui where
different variants, apart from kukui variant can take advantage of the
shared resources.
Signed-off-by: Ben Ho <Ben.Ho@mediatek.com>
[originally created by Ben Ho but adapted and ported to mainline]
Signed-off-by: Enric Balletbo i Serra <enric.balletbo@collabora.com>
Tested-by: Hsin-Yi Wang <hsinyi@chromium.org>
Link: https://lore.kernel.org/r/20200625101757.101775-8-enric.balletbo@collabora.com
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
Enric Balletbo i Serra [Thu, 25 Jun 2020 10:17:56 +0000 (12:17 +0200)]
arm64: dts: mt8183: Add USB3.0 support
Add the USB3.0 phyter and controller for the MediaTek's MT8183 SoC.
Signed-off-by: Enric Balletbo i Serra <enric.balletbo@collabora.com>
Tested-by: Hsin-Yi Wang <hsinyi@chromium.org>
Link: https://lore.kernel.org/r/20200625101757.101775-7-enric.balletbo@collabora.com
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
Enric Balletbo i Serra [Thu, 25 Jun 2020 10:17:55 +0000 (12:17 +0200)]
arm64: dts: mt8183-evb: Fix unit name warnings
Remove the unit address from the DT nodes that doesn't have a reg
property. This fixes the following unit name warnings:
Warning (unit_address_vs_reg): /soc/pinctrl@
10005000/mmc0@0: node has a unit name, but no reg or ranges property
Warning (unit_address_vs_reg): /soc/pinctrl@
10005000/mmc1@0: node has a unit name, but no reg or ranges property
Signed-off-by: Enric Balletbo i Serra <enric.balletbo@collabora.com>
Tested-by: Hsin-Yi Wang <hsinyi@chromium.org>
Link: https://lore.kernel.org/r/20200625101757.101775-6-enric.balletbo@collabora.com
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
Enric Balletbo i Serra [Thu, 25 Jun 2020 10:17:54 +0000 (12:17 +0200)]
arm64: dts: mt8183: Fix unit name warnings
Remove the unit address from the DT nodes that doesn't have a reg
property. This fixes the following unit name warnings:
Warning (unit_address_vs_reg): /cpus/idle-states/cluster-sleep@0: node has a unit name, but no reg or ranges property
Warning (unit_address_vs_reg): /cpus/idle-states/cluster-sleep@1: node has a unit name, but no reg or ranges property
Signed-off-by: Enric Balletbo i Serra <enric.balletbo@collabora.com>
Tested-by: Hsin-Yi Wang <hsinyi@chromium.org>
Link: https://lore.kernel.org/r/20200625101757.101775-5-enric.balletbo@collabora.com
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
Enric Balletbo i Serra [Thu, 25 Jun 2020 10:17:53 +0000 (12:17 +0200)]
arm64: dts: mt8183: Add MediaTek's peripheral configuration controller
The MediaTek's peripheral configuration controller is present on the
MT8183 SoC. Add the node for that controller.
Signed-off-by: Enric Balletbo i Serra <enric.balletbo@collabora.com>
Tested-by: Hsin-Yi Wang <hsinyi@chromium.org>
Link: https://lore.kernel.org/r/20200625101757.101775-4-enric.balletbo@collabora.com
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
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