Arnd Bergmann [Thu, 16 Dec 2021 13:51:42 +0000 (14:51 +0100)]
Merge tag 'socfpga_dts_update_for_v5.17' of git://git./linux/kernel/git/dinguyen/linux into arm/dt
SoCFPGA dts updates for v5.17
- Update N5X to include qspi, usb and ethernet
- Adjust NAND partition size for Agilex and Stratix10
* tag 'socfpga_dts_update_for_v5.17' of git://git.kernel.org/pub/scm/linux/kernel/git/dinguyen/linux:
arm64: dts: Update NAND MTD partition for Agilex and Stratix 10
arm64: dts: n5x: add qspi, usb, and ethernet support
Link: https://lore.kernel.org/r/20211215164545.300273-1-dinguyen@kernel.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Arnd Bergmann [Wed, 15 Dec 2021 14:56:39 +0000 (15:56 +0100)]
Merge tag 'asahi-soc-dt-5.17-v2' of https://github.com/AsahiLinux/linux into arm/dt
Apple SoC DT updates for 5.17, round 2:
- Various cleanups (removing useless props, sorting nodes, renaming
things)
- Add PMGR min-state binding & props (see PMGR pull for driver change)
- Initial compatibles for t600x machines (M1 Pro/Max). This covers the
bindings that just need compatible bumps & minor tweaks, no driver
changes.
- Add watchdog node (driver not merged yet, hopefully will be; binding
went in the previous pull)
- Add missing power-domains property to the mailbox binding
* tag 'asahi-soc-dt-5.17-v2' of https://github.com/AsahiLinux/linux:
dt-bindings: mailbox: apple,mailbox: Add power-domains property
arm64: dts: apple: t8103: Sort nodes by address
arm64: dts: apple: t8103: Rename clk24 to clkref
arm64: dts: apple: t8103: Add watchdog node
dt-bindings: pinctrl: apple,pinctrl: Add apple,t6000-pinctrl compatible
dt-bindings: pci: apple,pcie: Add t6000 support
dt-bindings: i2c: apple,i2c: Add apple,t6000-i2c compatible
dt-bindings: arm: apple: Add t6000/t6001 MacBook Pro 14/16" compatibles
arm64: dts: apple: t8103: Add apple,min-state to DCP PMGR nodes
dt-bindings: power: apple,pmgr-pwrstate: Add apple,min-state prop
arm64: dts: apple: t8103: Remove PCIe max-link-speed properties
Link: https://lore.kernel.org/r/a24faafd-f2ae-c3a7-5327-b27da7d9e34b@marcan.st
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Arnd Bergmann [Wed, 15 Dec 2021 14:55:30 +0000 (15:55 +0100)]
Merge tag 'stm32-dt-for-v5.17-1' of git://git./linux/kernel/git/atorgue/stm32 into arm/dt
STM32 DT for v5.17, round 1
Highlights:
----------
-MCU:
- fix ili9341 for dtbs_check warnings on stm32f429 disco.
- MPU:
- ST boards:
- tune HS USB phys on stm32mp15 EV1 and DKx boards.
- add pull-up on USART3/UART7 RX pins on STM32MP15 DKx boards.
- use correct pinctrl setting for STUSB1600 on STM32MP15 DK boards.
- ENGICAM:
- enable LVDS pannel on i.Core STM32MP1 EDIMM2.2.
- add "i.Core STM32MP1 C.TOUCH 2.0 10.1" OF" support:
EDIMM compliant general purpose carrier board with ETH 10/100,
WIFI/BT, CAN, ...
* tag 'stm32-dt-for-v5.17-1' of git://git.kernel.org/pub/scm/linux/kernel/git/atorgue/stm32:
ARM: dts: stm32: Add Engicam i.Core STM32MP1 C.TOUCH 2.0 10.1" OF
dt-bindings: arm: stm32: Add Engicam i.Core STM32MP1 C.TOUCH 2.0 10.1" OF
ARM: dts: stm32: Enable LVDS panel on i.Core STM32MP1 EDIMM2.2
ARM: dts: stm32: fix stusb1600 pinctrl used on stm32mp157c-dk
ARM: dts: stm32: tune the HS USB PHYs on stm32mp157c-ev1
ARM: dts: stm32: tune the HS USB PHYs on stm32mp15xx-dkx
ARM: dts: stm32: clean uart4_idle_pins_a node for stm32mp15
ARM: dts: stm32: add pull-up to USART3 and UART7 RX pins on STM32MP15 DKx boards
ARM: dts: stm32: fix dtbs_check warning on ili9341 dts binding on stm32f429 disco
Link: https://lore.kernel.org/r/dfe942db-5af7-bb82-22b6-3bd866c9017d@foss.st.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Hector Martin [Thu, 9 Dec 2021 04:50:42 +0000 (13:50 +0900)]
dt-bindings: mailbox: apple,mailbox: Add power-domains property
This will bind to the PMGR pwrstate nodes that control power/clock
gating to SoC blocks. The mailbox driver doesn't do runtime-pm yet, so
initially this will just keep the domain on permanently.
Reviewed-by: Sven Peter <sven@svenpeter.dev>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Hector Martin <marcan@marcan.st>
Hector Martin [Sun, 12 Dec 2021 01:40:16 +0000 (10:40 +0900)]
arm64: dts: apple: t8103: Sort nodes by address
We decided to keep SoC nodes sorted by address for sanity; fix a couple
that slipped into the wrong place.
Reviewed-by: Sven Peter <sven@svenpeter.dev>
Signed-off-by: Hector Martin <marcan@marcan.st>
Hector Martin [Tue, 5 Oct 2021 14:24:21 +0000 (23:24 +0900)]
arm64: dts: apple: t8103: Rename clk24 to clkref
We now know that this frequency comes from the external reference
oscillator and is used for various SoC blocks, and isn't just a random
24MHz clock, so let's call it something more appropriate.
Reviewed-by: Mark Kettenis <kettenis@openbsd.org>
Reviewed-by: Sven Peter <sven@svenpeter.dev>
Signed-off-by: Hector Martin <marcan@marcan.st>
Arnd Bergmann [Tue, 14 Dec 2021 07:50:16 +0000 (08:50 +0100)]
Merge tag 'ixp4xx-dtx-v5.17' of git://git./linux/kernel/git/linusw/linux-nomadik into arm/dt
IXP4xx DTS changes for v5.17:
- Add the LEDs to the Freecom FSG-3 that were missing.
- Add a devicetree for the Gorami MultiLink Router
- Add a devicetree for the Gateway GW7001 Router
This completes the migration of all IXP4xx devices to
device tree files.
Next merge window we will delete the remaining board files,
it cannot be done now because of cross-tree dependencies.
* tag 'ixp4xx-dtx-v5.17' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-nomadik:
ARM: dts: ixp4xx: Add devicetree for Gateway 7001
ARM: dts: Add Goramo MultiLink device tree
ARM: dts: Add FSG3 system controller and LEDs
Link: https://lore.kernel.org/r/CACRpkdYiWK7TEbZrh4_0WT5obMk=ZSc7AQVUSPXL+-uZ_hsUEA@mail.gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Arnd Bergmann [Mon, 13 Dec 2021 23:16:48 +0000 (00:16 +0100)]
Merge tag 'at91-dt-5.17' of git://git./linux/kernel/git/at91/linux into arm/dt
AT91 DT #1 for 5.17:
- 2 low priority fixes about pin function for sama7g5 and better
tailored mmc interface on sama5d2 xplained
- Addition of the Microchip EVB-KSZ9477: a Gigabit Ethernet
managed Switch Evaluation Board
- QSPI: addition of sama5d2 clock name and nodes for new sama7g7 and its
associated Evaluation Kit
* tag 'at91-dt-5.17' of git://git.kernel.org/pub/scm/linux/kernel/git/at91/linux:
ARM: dts: at91: sama7g5ek: Add QSPI0 node
ARM: dts: at91: sama7g5: Add QSPI nodes
ARM: dts: at91: sama5d2: Name the qspi clock
ARM: dts: at91: add Microchip EVB-KSZ9477 board
ARM: dts: at91: sama5d2_xplained: remove PA11__SDMMC0_VDDSEL from pinctrl
ARM: dts: at91: update alternate function of signal PD20
Link: https://lore.kernel.org/r/20211213161451.90786-1-nicolas.ferre@microchip.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Arnd Bergmann [Mon, 13 Dec 2021 23:14:56 +0000 (00:14 +0100)]
Merge tag 'amlogic-arm64-dt-for-v5.17' of git://git./linux/kernel/git/amlogic/linux into arm/dt
Amlogic ARM64 DT changes for v5.17:
- Add missing cec nodes for Odroid-C4 & HC4
- Fix thermal-zones indent for G12/SM1 SoCs dtsi
- Fix GPU OPP table node name for G12/SM1 SoCs dtsi
- Fix SPI NOR Flash node name for Odroid-N2/N2+
- Fixes for GXBB Wetek boards:
- Fix HDMI supply
- Add missing gpio bindings include
- Switch to new LED bindings
- P241 additions:
- Add VCC 5v regulator
- Add sound nodes
* tag 'amlogic-arm64-dt-for-v5.17' of git://git.kernel.org/pub/scm/linux/kernel/git/amlogic/linux:
arm64: dts: meson: p241: add sound support
arm64: dts: meson: p241: add vcc_5v regulator
arm64: dts: meson-gxbb-wetek: use updated LED bindings
arm64: dts: meson-gxbb-wetek: fix missing GPIO binding
arm64: dts: meson-gxbb-wetek: fix HDMI in early boot
arm64: dts: amlogic: Fix SPI NOR flash node name for ODROID N2/N2+
arm64: dts: amlogic: meson-g12: Fix GPU operating point table node name
arm64: dts: amlogic: meson-g12: Fix thermal-zones indent
arm64: dts: meson-sm1-odroid: add cec nodes
Link: https://lore.kernel.org/r/f47b9b95-6cde-d2f8-eb36-78777d449920@baylibre.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Arnd Bergmann [Mon, 13 Dec 2021 23:04:48 +0000 (00:04 +0100)]
Merge tag 'v5.17-rockchip-dts64-1' of git://git./linux/kernel/git/mmind/linux-rockchip into arm/dt
Improvements on a number of boards:
- helios64: hdd-power, pcie, 2.5GbE nic
- spi for rk356x and on the Quartz-A board
- headphone, bluetooth support on Rock Pi4
And some misc soc improvements:
- missing dsi compatible on px30
- pwm pinctrl name on rk356x
* tag 'v5.17-rockchip-dts64-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip:
arm64: dts: rockchip: Fix Bluetooth on ROCK Pi 4 boards
arm64: dts: rockchip: Add missing secondary compatible for PX30 DSI
arm64: dts: rockchip: Add spi1 pins on Quartz64 A
arm64: dts: rockchip: Add spi nodes on rk356x
arm64: dts: rockchip: Change pwm pinctrl-name to "default" on rk356x
arm64: dts: rockchip: Enable HDD power on helios64
arm64: dts: rockchip: add variables for pcie completion to helios64
arm64: dts: rockchip: define usb hub and 2.5GbE nic on helios64
arm64: dts: rockchip: add interrupt and headphone-detection for Rock Pi4's audio codec
Link: https://lore.kernel.org/r/3637342.7akbv5NDAT@phil
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Arnd Bergmann [Mon, 13 Dec 2021 22:48:57 +0000 (23:48 +0100)]
Merge tag 'asahi-soc-dt-5.17' of https://github.com/AsahiLinux/linux into arm/dt
Apple SoC DT updates for 5.17:
- Separate DTs for all t8103 platforms
- Add i2c and cd321x nodes
- Bindings for apple,wdt
- PMGR bindings and DT updates to instantiate it
- WiFi MAC address DT handling
This also includes the MAINTAINERS change for the PMGR driver itself, to
avoid merge issues; the driver will be sent in a different pull.
Manual fixups: Added i2c power domain references to the PMGR DT commit,
since a prior commit added the i2c nodes.
* tag 'asahi-soc-dt-5.17' of https://github.com/AsahiLinux/linux:
arm64: dts: apple: t8103: Expose PCI node for the WiFi MAC address
arm64: dts: apple: t8103: Add UART2
arm64: dts: apple: t8103: Add PMGR nodes
dt-bindings: arm: apple: Add apple,pmgr binding
dt-bindings: power: Add apple,pmgr-pwrstate binding
MAINTAINERS: Add PMGR power state files to ARM/APPLE MACHINE
dt-bindings: watchdog: Add Apple Watchdog
dt-bindings: interrupt-controller: apple,aic: Add power-domains property
dt-bindings: pinctrl: apple,pinctrl: Add power-domains property
dt-bindings: iommu: apple,dart: Add power-domains property
dt-bindings: i2c: apple,i2c: Add power-domains property
arm64: dts: apple: t8103: Add cd321x nodes
arm64: dts: apple: t8103: Add i2c nodes
arm64: dts: apple: Add missing M1 (t8103) devices
dt-bindings: arm: apple: Add iMac (24-inch 2021) to Apple bindings
arm64: dts: apple: add #interrupt-cells property to pinctrl nodes
dt-bindings: i2c: apple,i2c: allow multiple compatibles
arm64: dts: apple: change ethernet0 device type to ethernet
Link: https://lore.kernel.org/r/e18b476c-7b1f-de73-53a2-0e21fb5cd283@marcan.st
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Christian Lamparter [Mon, 6 Dec 2021 00:43:34 +0000 (01:43 +0100)]
ARM: dts: gemini: NAS4220-B: fis-index-block with 128 KiB sectors
Steven Maddox reported in the OpenWrt bugzilla, that his
RaidSonic IB-NAS4220-B was no longer booting with the new
OpenWrt 21.02 (uses linux 5.10's device-tree). However, it was
working with the previous OpenWrt 19.07 series (uses 4.14).
|[ 5.548038] No RedBoot partition table detected in
30000000.flash
|[ 5.618553] Searching for RedBoot partition table in
30000000.flash at offset 0x0
|[ 5.739093] No RedBoot partition table detected in
30000000.flash
|...
|[ 7.039504] Waiting for root device /dev/mtdblock3...
The provided bootlog shows that the RedBoot partition parser was
looking for the partition table "at offset 0x0". Which is strange
since the comment in the device-tree says it should be at 0xfe0000.
Further digging on the internet led to a review site that took
some useful PCB pictures of their review unit back in February 2009.
Their picture shows a Spansion S29GL128N11TFI01 flash chip.
>From Spansion's Datasheet:
"S29GL128N: One hundred twenty-eight 64 Kword (128 Kbyte) sectors"
Steven also provided a "cat /sys/class/mtd/mtd0/erasesize" from his
unit: "131072".
With the 128 KiB Sector/Erasesize in mind. This patch changes the
fis-index-block property to (0xfe0000 / 0x20000) = 0x7f.
Fixes: b5a923f8c739 ("ARM: dts: gemini: Switch to redboot partition parsing")
Reported-by: Steven Maddox <s.maddox@lantizia.me.uk>
Signed-off-by: Christian Lamparter <chunkeey@gmail.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Tested-by: Steven Maddox <s.maddox@lantizia.me.uk>
Link: https://lore.kernel.org/r/20211206004334.4169408-1-linus.walleij@linaro.org'
Bugzilla: https://bugs.openwrt.org/index.php?do=details&task_id=4137
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Arnd Bergmann [Mon, 13 Dec 2021 20:00:04 +0000 (21:00 +0100)]
Merge tag 'ux500-dts-v5.17-1' of git://git./linux/kernel/git/linusw/linux-nomadik into arm/dt
Ux500 DTS updates for the v5.17 kernel series:
- Add reset lines to applicable IP blocks
- Fix the magnetometer in the Gavini device tree
* tag 'ux500-dts-v5.17-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-nomadik:
ARM: dts: ux500: Fixup Gavini magnetometer
ARM: dts: ux500: Add reset lines to IP blocks
Link: https://lore.kernel.org/r/CACRpkdZuDPLj5Tcxbyd+JGfvBGQ8RuMP9PAsGsZT7pY8KoyOKg@mail.gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Arnd Bergmann [Mon, 13 Dec 2021 19:58:14 +0000 (20:58 +0100)]
Merge tag 'renesas-dt-bindings-for-v5.17-tag1' of git://git./linux/kernel/git/geert/renesas-devel into arm/dt
Renesas DT binding updates for v5.17
- Document SDHI SDnH clocks on R-Car Gen2 and later,
- Document core support for the R-Car S4-8 (R8A779F0) SoC.
* tag 'renesas-dt-bindings-for-v5.17-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel:
dt-bindings: mmc: renesas,sdhi: Rename RZ/G2L clocks
dt-bindings: power: renesas,rcar-sysc: Document r8a779f0 SYSC bindings
dt-bindings: reset: renesas,rst: Document r8a779f0 reset module
dt-bindings: arm: renesas: Document R-Car S4-8 SoC DT bindings
dt-bindings: mmc: renesas,sdhi: Add optional SDnH clock
Link: https://lore.kernel.org/r/cover.1638530614.git.geert+renesas@glider.be
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Arnd Bergmann [Mon, 13 Dec 2021 19:55:56 +0000 (20:55 +0100)]
Merge tag 'renesas-arm-dt-for-v5.17-tag1' of git://git./linux/kernel/git/geert/renesas-devel into arm/dt
Renesas ARM DT updates for v5.17
- Serial, SPI, timer, watchdog, operating points, and QSPI FLASH
support for the RZ/G2L SoC and the RZ/G2L SMARC EVK development
board,
- SDHI SDnH clocks for the R-Car Gen3 and RZ/G2 SoCs,
- Display Unit support for the R-Car V3U SoC,
- Miscellaneous fixes and improvements.
* tag 'renesas-arm-dt-for-v5.17-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel: (21 commits)
arm64: dts: renesas: r8a779a0: Add DU support
arm64: dts: renesas: salvator-common: Merge hdmi0_con
arm64: dts: renesas: ulcb: Merge hdmi0_con
arm64: dts: renesas: r9a07g044: Add OPP table
arm64: dts: renesas: Fix operating point table node names
arm64: dts: renesas: rzg2l-smarc-som: Enable watchdog
arm64: dts: renesas: r9a07g044: Add WDT nodes
arm64: dts: renesas: r9a07g044: Rename SDHI clocks
arm64: dts: renesas: rzg2l-smarc-som: Enable serial NOR flash
arm64: dts: renesas: rzg2l-smarc-som: Enable OSTM
arm64: dts: renesas: r9a07g044: Add OSTM nodes
arm64: dts: renesas: r9a07g044: Sort psci node
arm64: dts: renesas: rzg2l-smarc: Enable RSPI1 on carrier board
arm64: dts: renesas: r9a07g044: Add RSPI{0,1,2} nodes
arm64: dts: renesas: cat875: Add rx/tx delays
arm64: dts: reneas: rcar-gen3: Add SDnH clocks
arm64: dts: reneas: rzg2: Add SDnH clocks
arm64: dts: renesas: r9a07g044: Add SCI[0-1] nodes
arm64: dts: renesas: rzg2l-smarc: Enable SCIF2 on carrier board
arm64: dts: renesas: r9a07g044: Add SCIF[1-4] nodes
...
Link: https://lore.kernel.org/r/cover.1638530606.git.geert+renesas@glider.be
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Herve Codina [Thu, 2 Dec 2021 09:52:55 +0000 (10:52 +0100)]
ARM: dts: spear3xx: Add spear320s dtsi
The SPEAr320s SOC is a SPEAr320 SOC variant.
Mostly identical to the SPEAr320 SOC variant, it has a
new interrupt routing for PL_PGIOs.
Add spear320s.dtsi to handle SPEAr320s SOC
Signed-off-by: Herve Codina <herve.codina@bootlin.com>
Link: https://lore.kernel.org/r/20211202095255.165797-7-herve.codina@bootlin.com'
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Herve Codina [Thu, 2 Dec 2021 09:52:53 +0000 (10:52 +0100)]
ARM: dts: spear3xx: Use plgpio regmap in SPEAr310 and SPEAr320
Resources used by plgpio and pinmux are conflicting on SPEAr310
and SPEAr320.
Use the newly introduced regmap property in plgpio node to use
pinmux resources from plgpio and so avoid the conflict.
Signed-off-by: Herve Codina <herve.codina@bootlin.com>
Link: https://lore.kernel.org/r/20211202095255.165797-5-herve.codina@bootlin.com'
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Tudor Ambarus [Thu, 9 Dec 2021 12:36:43 +0000 (14:36 +0200)]
ARM: dts: at91: sama7g5ek: Add QSPI0 node
QSPI0 comunicates with a MX66LM1G45G SPI NOR flash.
Enable the controller and describe the flash.
Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com>
Link: https://lore.kernel.org/r/20211209123643.341892-2-tudor.ambarus@microchip.com
Tudor Ambarus [Thu, 9 Dec 2021 12:36:42 +0000 (14:36 +0200)]
ARM: dts: at91: sama7g5: Add QSPI nodes
sama7g5 embedds 2 instances of QSPI controller:
1/ OSPI0 Supporting Up to 200 MHz DDR. Octal, TwinQuad, Hyperflash
and OctaFlash Protocols Supported.
2/ QSPI1 Supporting Up to 90 MHz DDR/133 MHz SDR.
Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com>
Link: https://lore.kernel.org/r/20211209123643.341892-1-tudor.ambarus@microchip.com
Tudor Ambarus [Thu, 9 Dec 2021 10:25:42 +0000 (12:25 +0200)]
ARM: dts: at91: sama5d2: Name the qspi clock
Naming clocks is a good practice. The atmel-quadspi driver supports
an unnamed clock for the peripheral clock in order to be backward
compatible with old DTs, but it is recommended to name the clocks
on new DTs. The driver's bindings file requires the clock-names
property, so name the clock.
Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com>
Link: https://lore.kernel.org/r/20211209102542.254153-1-tudor.ambarus@microchip.com
Zoltan HERPAI [Sun, 12 Dec 2021 17:49:40 +0000 (18:49 +0100)]
ARM: dts: ixp4xx: Add devicetree for Gateway 7001
This adds a device tree for the Gateway 7001 AP, based on
Intel IXP422.
Cc: Imre Kaloz <kaloz@openwrt.org>
Signed-off-by: Zoltan HERPAI <wigyori@uid0.hu>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Jagan Teki [Fri, 12 Nov 2021 14:23:59 +0000 (19:53 +0530)]
arm64: dts: rockchip: Fix Bluetooth on ROCK Pi 4 boards
This patch fixes the Bluetooth on ROCK Pi 4 boards.
ROCK Pi 4 boards has BCM4345C5 and now it is supported
on Mainline Linux, brcm,bcm43438-bt still working but
observed the BT Audio issues with latest test.
So, use the BCM4345C5 compatible and its associated
properties like clock-names as lpo and max-speed.
Attach vbat and vddio supply rails as well.
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Link: https://lore.kernel.org/r/20211112142359.320798-1-jagan@amarulasolutions.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
David Heidelberg [Sat, 11 Dec 2021 23:38:17 +0000 (00:38 +0100)]
arm64: dts: rockchip: Add missing secondary compatible for PX30 DSI
Add second DSI compatible to comply with DT schema validation
comming in the second patch.
Signed-off-by: David Heidelberg <david@ixit.cz>
Link: https://lore.kernel.org/r/20211211233818.88482-1-david@ixit.cz
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Sven Peter [Sat, 11 Dec 2021 12:40:44 +0000 (13:40 +0100)]
arm64: dts: apple: t8103: Add watchdog node
Add the watchdog node which also enables reboot support on the t8103.
Signed-off-by: Sven Peter <sven@svenpeter.dev>
Signed-off-by: Hector Martin <marcan@marcan.st>
Hector Martin [Thu, 9 Dec 2021 05:10:01 +0000 (14:10 +0900)]
dt-bindings: pinctrl: apple,pinctrl: Add apple,t6000-pinctrl compatible
This new SoC uses the same pinctrl hardware, so just add a new per-SoC
compatible.
Reviewed-by: Mark Kettenis <kettenis@openbsd.org>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Hector Martin <marcan@marcan.st>
Hector Martin [Thu, 9 Dec 2021 05:10:00 +0000 (14:10 +0900)]
dt-bindings: pci: apple,pcie: Add t6000 support
This new SoC is compatible with the existing driver, but the block
supports 4 downstream ports, so we need to adjust the binding to
allow that.
Reviewed-by: Mark Kettenis <kettenis@openbsd.org>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Hector Martin <marcan@marcan.st>
Hector Martin [Thu, 9 Dec 2021 05:09:59 +0000 (14:09 +0900)]
dt-bindings: i2c: apple,i2c: Add apple,t6000-i2c compatible
This block is compatible with t8103, so just add the new per-SoC
compatible under apple,i2c.
Reviewed-by: Mark Kettenis <kettenis@openbsd.org>
Reviewed-by: Sven Peter <sven@svenpeter.dev>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Hector Martin <marcan@marcan.st>
Hector Martin [Thu, 9 Dec 2021 05:09:58 +0000 (14:09 +0900)]
dt-bindings: arm: apple: Add t6000/t6001 MacBook Pro 14/16" compatibles
This adds the initial apple,t6000 platforms:
- apple,j314s - MacBook Pro (14-inch, M1 Pro, 2021)
- apple,j316s - MacBook Pro (16-inch, M1 Pro, 2021)
And the initial apple,t6001 platforms:
- apple,j314c - MacBook Pro (14-inch, M1 Max, 2021)
- apple,j316c - MacBook Pro (16-inch, M1 Max, 2021)
Reviewed-by: Mark Kettenis <kettenis@openbsd.org>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Hector Martin <marcan@marcan.st>
Hector Martin [Thu, 9 Dec 2021 04:45:01 +0000 (13:45 +0900)]
arm64: dts: apple: t8103: Add apple,min-state to DCP PMGR nodes
This is required for DCP to boot successfully; it seems if power gating
is allowed, they do not wake up properly.
Reviewed-by: Sven Peter <sven@svenpeter.dev>
Signed-off-by: Hector Martin <marcan@marcan.st>
Hector Martin [Thu, 9 Dec 2021 04:44:59 +0000 (13:44 +0900)]
dt-bindings: power: apple,pmgr-pwrstate: Add apple,min-state prop
A few devices (DCP/DCPEXT) need to have the minimum power state for
auto-PM configured. Add a property that allows the DT to specify this
value.
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Hector Martin <marcan@marcan.st>
Nicolas Frattaroli [Sat, 27 Nov 2021 14:19:09 +0000 (15:19 +0100)]
arm64: dts: rockchip: Add spi1 pins on Quartz64 A
The Quartz64 Model A has the SPI pins broken out on its pin
header. The actual pins being used though are not the m0
variant, but the m1 variant, which also lacks the cs1 pin.
This commit overrides pinctrl-0 accordingly for this board.
spi1 is intentionally left disabled, as anyone wishing to add
SPI devices needs to edit the dts anyway, and the pins are more
useful as GPIOs for the rest of the users.
Signed-off-by: Nicolas Frattaroli <frattaroli.nicolas@gmail.com>
Link: https://lore.kernel.org/r/20211127141910.12649-4-frattaroli.nicolas@gmail.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Nicolas Frattaroli [Sat, 27 Nov 2021 14:19:08 +0000 (15:19 +0100)]
arm64: dts: rockchip: Add spi nodes on rk356x
This adds the four spi nodes (spi0, spi1, spi2, spi3) to the
rk356x dtsi. These are from the downstream device tree, though
I have double-checked that their interrupts and DMA numbers are
correct. I have also tested spi1 with an SPI device.
Signed-off-by: Nicolas Frattaroli <frattaroli.nicolas@gmail.com>
Link: https://lore.kernel.org/r/20211127141910.12649-3-frattaroli.nicolas@gmail.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Sascha Hauer [Wed, 8 Dec 2021 12:03:12 +0000 (13:03 +0100)]
arm64: dts: rockchip: Change pwm pinctrl-name to "default" on rk356x
The pinctrl state "active" is neither documented nor used by the PWM
driver. Rename it to "default"
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Link: https://lore.kernel.org/r/20211208120312.3300390-1-s.hauer@pengutronix.de
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Oleksij Rempel [Thu, 11 Nov 2021 08:10:45 +0000 (09:10 +0100)]
ARM: dts: at91: add Microchip EVB-KSZ9477 board
Add KSZ9477 managed switch evaluation kit with SAMA5D36 MPU:
https://www.microchip.com/en-us/development-tool/evb-ksz9477
Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de>
Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com>
Link: https://lore.kernel.org/r/20211111081045.711323-1-o.rempel@pengutronix.de
Mihai Sain [Tue, 26 Oct 2021 13:20:34 +0000 (16:20 +0300)]
ARM: dts: at91: sama5d2_xplained: remove PA11__SDMMC0_VDDSEL from pinctrl
I/O voltage for eMMC is always 3.3V because PA11__SDMMC0_VDDSEL is
tied with 10K resistor to GND. U13 switch S1 is always selected as
voltage rail of 3.3V for VCCQ power pin from MPU controller and eMMC flash.
Removing PA11 from pinctrl because it remains unused.
Signed-off-by: Mihai Sain <mihai.sain@microchip.com>
Reviewed-by: Eugen Hristev <eugen.hristev@microchip.com>
Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com>
Link: https://lore.kernel.org/r/20211026132034.678655-1-eugen.hristev@microchip.com
Hari Prasath [Wed, 8 Dec 2021 06:35:53 +0000 (12:05 +0530)]
ARM: dts: at91: update alternate function of signal PD20
The alternate function of PD20 is 4 as per the datasheet of
sama7g5 and not 5 as defined earlier.
Signed-off-by: Hari Prasath <Hari.PrasathGE@microchip.com>
Fixes: 7540629e2fc7 ("ARM: dts: at91: add sama7g5 SoC DT and sama7g5-ek")
Cc: <stable@vger.kernel.org> # v5.15+
Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com>
Link: https://lore.kernel.org/r/20211208063553.19807-1-Hari.PrasathGE@microchip.com
Hector Martin [Tue, 7 Dec 2021 05:34:58 +0000 (14:34 +0900)]
arm64: dts: apple: t8103: Remove PCIe max-link-speed properties
The driver doesn't support these, they shouldn't be in the SoC include
anyway, and we're now configuring this in the bootloader instead. This
also solves the j274 1G/10G Ethernet variant discrepancy, since that
will now be configured properly based on the dynamic ADT property.
Acked-by: Marc Zyngier <maz@kernel.org>
Signed-off-by: Hector Martin <marcan@marcan.st>
Mark Kettenis [Mon, 6 Dec 2021 18:38:16 +0000 (19:38 +0100)]
arm64: dts: apple: t8103: Expose PCI node for the WiFi MAC address
Expose the PCI node corresponding to the WiFi device and give it
a 'local-mac-address' property. The bootloader will update it
(m1n1 already has the required feature).
Signed-off-by: Mark Kettenis <kettenis@openbsd.org>
Acked-by: Marc Zyngier <maz@kernel.org>
Signed-off-by: Hector Martin <marcan@marcan.st>
Hector Martin [Sun, 19 Sep 2021 17:28:20 +0000 (02:28 +0900)]
arm64: dts: apple: t8103: Add UART2
This UART is connected to the debug port of the WLAN module. It is
mostly useless, but makes for a good test case for runtime-pm without
having to unbind the console from the main system UART.
Reviewed-by: Mark Kettenis <kettenis@openbsd.org>
Signed-off-by: Hector Martin <marcan@marcan.st>
Hector Martin [Wed, 24 Nov 2021 07:34:19 +0000 (16:34 +0900)]
arm64: dts: apple: t8103: Add PMGR nodes
This adds the two PMGR nodes and all known power state subnodes. Since
there are a large number of them, let's put them in a separate file to
include.
Reviewed-by: Sven Peter <sven@svenpeter.dev>
Signed-off-by: Hector Martin <marcan@marcan.st>
Hector Martin [Wed, 24 Nov 2021 07:34:17 +0000 (16:34 +0900)]
dt-bindings: arm: apple: Add apple,pmgr binding
The PMGR block in Apple Silicon SoCs is responsible for SoC power
management. There are two PMGRs in T8103, with different register
layouts but compatible registers. In order to support this as well
as future SoC generations with backwards-compatible registers, we
declare these blocks as syscons and bind to individual registers
in child nodes. Each register controls one SoC device.
The respective apple compatibles are defined in case device-specific
quirks are necessary in the future, but currently these nodes are
expected to be bound by the generic syscon driver.
Reviewed-by: Mark Kettenis <kettenis@openbsd.org>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Hector Martin <marcan@marcan.st>
Hector Martin [Wed, 24 Nov 2021 07:34:16 +0000 (16:34 +0900)]
dt-bindings: power: Add apple,pmgr-pwrstate binding
This syscon child node represents a single SoC device controlled by the
PMGR block. This layout allows us to declare all device power state
controls (power/clock gating and reset) in the device tree, including
dependencies, instead of hardcoding it into the driver. The register
layout is uniform.
Each pmgr-pwrstate node provides genpd and reset features, to be
consumed by downstream device nodes.
Future SoCs are expected to use backwards compatible registers, and the
"apple,pmgr-pwrstate" represents any such interfaces (possibly with
additional features gated by the more specific compatible), allowing
them to be bound without driver updates. If a backwards incompatible
change is introduced in future SoCs, it will require a new compatible,
such as "apple,pmgr-pwrstate-v2".
Reviewed-by: Mark Kettenis <kettenis@openbsd.org>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Hector Martin <marcan@marcan.st>
Hector Martin [Mon, 25 Oct 2021 14:31:16 +0000 (23:31 +0900)]
MAINTAINERS: Add PMGR power state files to ARM/APPLE MACHINE
This covers the PMGR power state driver and its DT bindings,
as well as any other future stuff in drivers/soc/apple.
Signed-off-by: Hector Martin <marcan@marcan.st>
Sven Peter [Tue, 30 Nov 2021 16:18:08 +0000 (17:18 +0100)]
dt-bindings: watchdog: Add Apple Watchdog
Apple SoCs come with a simple embedded watchdog. This watchdog is also
required in order to reset the SoC.
Reviewed-by: Mark Kettenis <kettenis@openbsd.org>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Sven Peter <sven@svenpeter.dev>
Reviewed-by: Guenter Roeck <linux@roeck-us.net>
Signed-off-by: Hector Martin <marcan@marcan.st>
Jagan Teki [Fri, 3 Dec 2021 16:54:35 +0000 (22:24 +0530)]
ARM: dts: stm32: Add Engicam i.Core STM32MP1 C.TOUCH 2.0 10.1" OF
Engicam C.TOUCH 2.0 is an EDIMM compliant general purpose Carrier
board.
Genaral features:
- Ethernet 10/100
- Wifi/BT
- USB Type A/OTG
- Audio Out
- CAN
- 10" LVDS Panel (SN65DSI84 DSI-LVDS bridge on SoM)
i.Core STM32MP1 is an EDIMM SoM based on STM32MP157A from Engicam.
10.1" OF is a capacitive touch 10.1" Open Frame panel solutions.
i.Core STM32MP1 needs to mount on top of C.TOUCH 2.0 carrier with
pluged 10.1" OF for creating complete i.Core STM32MP1 C.TOUCH 2.0
10.1" Open Frame board.
Add support for it.
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
Jagan Teki [Fri, 3 Dec 2021 16:54:34 +0000 (22:24 +0530)]
dt-bindings: arm: stm32: Add Engicam i.Core STM32MP1 C.TOUCH 2.0 10.1" OF
i.Core STM32MP1 is an EDIMM SoM based on STM32MP157A from Engicam.
C.TOUCH 2.0 is a general purpose carrier board with capacitive
touch interface support.
10.1" OF is a capacitive touch 10.1" Open Frame panel solutions.
i.Core STM32MP1 needs to mount on top of C.TOUCH 2.0 carrier with
pluged 10.1" OF for creating complete i.Core STM32MP1 C.TOUCH 2.0
10.1" Open Frame board.
Add bindings for it.
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
Jagan Teki [Fri, 3 Dec 2021 16:54:33 +0000 (22:24 +0530)]
ARM: dts: stm32: Enable LVDS panel on i.Core STM32MP1 EDIMM2.2
Engicam i.Core STM32MP1 EDIMM2.2 Starter Kit has plugged with
7" LVDS panel.
Engicam i.Core STM32MP1 SoM has SN65DSI84 DSI to LVDS bridge.
This patch adds a display pipeline to connect DSI to SN65DSI84
to 7" LVDS panel.
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
Linus Walleij [Wed, 28 Jul 2021 23:34:39 +0000 (01:34 +0200)]
ARM: dts: Add Goramo MultiLink device tree
This adds a device tree for the Goramo MultiLink IXP425-based
WAN router.
Cc: Krzysztof Hałasa <khalasa@piap.pl>
Cc: openwrt-devel@lists.openwrt.org
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Linus Walleij [Mon, 22 Nov 2021 10:22:28 +0000 (11:22 +0100)]
ARM: dts: Add FSG3 system controller and LEDs
This adds the system controller on CS2 and the LEDs on it.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Hector Martin [Wed, 24 Nov 2021 06:15:41 +0000 (15:15 +0900)]
dt-bindings: interrupt-controller: apple,aic: Add power-domains property
This will bind to the PMGR pwrstate nodes that control power/clock
gating to SoC blocks. The AIC driver doesn't do runtime-pm and likely
never will (since it is system-critical), but it makes sense to describe
the power domain relationship the devicetree properly.
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Hector Martin <marcan@marcan.st>
Hector Martin [Wed, 24 Nov 2021 06:14:12 +0000 (15:14 +0900)]
dt-bindings: pinctrl: apple,pinctrl: Add power-domains property
This will bind to the PMGR pwrstate nodes that control power/clock
gating to SoC blocks. The pinctrl driver doesn't do runtime-pm yet, so
initially this will just keep the domain on permanently.
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Hector Martin <marcan@marcan.st>
Hector Martin [Wed, 24 Nov 2021 06:13:15 +0000 (15:13 +0900)]
dt-bindings: iommu: apple,dart: Add power-domains property
This will bind to the PMGR pwrstate nodes that control power/clock
gating to SoC blocks. The DART driver doesn't do runtime-pm yet, so
initially this will just keep the domain on permanently.
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Hector Martin <marcan@marcan.st>
Hector Martin [Wed, 24 Nov 2021 06:12:03 +0000 (15:12 +0900)]
dt-bindings: i2c: apple,i2c: Add power-domains property
This will bind to the PMGR pwrstate nodes that control power/clock
gating to SoC blocks. The i2c driver doesn't do runtime-pm yet, so
initially this will just keep the domain on permanently.
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Hector Martin <marcan@marcan.st>
Janne Grunau [Tue, 23 Nov 2021 22:49:25 +0000 (23:49 +0100)]
arm64: dts: apple: t8103: Add cd321x nodes
All M1 Mac devices have 2 SoC connected USB-C ports and use cd321x USB
type C port switch and power deliver controllers. I2c bus and addresses
configuration are for all devices equal.
The iMac (24-inch, 2021) has a configuration with 2 additional USB-C
ports (j456) using two additional cd321x controllers.
Signed-off-by: Janne Grunau <j@jannau.net>
Reviewed-by: Sven Peter <sven@svenpeter.dev>
Tested-by: Hector Martin <marcan@marcan.st>
Signed-off-by: Hector Martin <marcan@marcan.st>
Janne Grunau [Tue, 23 Nov 2021 22:49:24 +0000 (23:49 +0100)]
arm64: dts: apple: t8103: Add i2c nodes
Apple M1 has at least 5 i2c controllers. i2c0, i2c1 and i2c3 are used
on all M1 Mac devices. The 2020 Mac Mini uses i2c2 and the 13-inch
MacBook Pro uses i2c2 and i2c4.
Signed-off-by: Janne Grunau <j@jannau.net>
Reviewed-by: Sven Peter <sven@svenpeter.dev>
Tested-by: Hector Martin <marcan@marcan.st>
Signed-off-by: Hector Martin <marcan@marcan.st>
Janne Grunau [Tue, 23 Nov 2021 22:49:23 +0000 (23:49 +0100)]
arm64: dts: apple: Add missing M1 (t8103) devices
This adds support for following Apple M1 devices:
- MacBook Pro (13-inch, M1, 2020)
- MacBook Air (M1, 2020)
- iMac (24-inch 2021)
Reviewed-by: Mark Kettenis <kettenis@openbsd.org>
Signed-off-by: Janne Grunau <j@jannau.net>
Tested-by: Hector Martin <marcan@marcan.st>
Signed-off-by: Hector Martin <marcan@marcan.st>
Janne Grunau [Tue, 23 Nov 2021 22:49:22 +0000 (23:49 +0100)]
dt-bindings: arm: apple: Add iMac (24-inch 2021) to Apple bindings
This introduces compatible strings for both 2021 Apple iMac M1 devices:
* apple,j456 - iMac (24-inch, 4x USB-C, M1, 2021)
* apple,j457 - iMac (24-inch, 2x USB-C, M1, 2021)
Reviewed-by: Mark Kettenis <kettenis@openbsd.org>
Signed-off-by: Janne Grunau <j@jannau.net>
Tested-by: Hector Martin <marcan@marcan.st>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Hector Martin <marcan@marcan.st>
Janne Grunau [Mon, 22 Nov 2021 22:24:40 +0000 (23:24 +0100)]
arm64: dts: apple: add #interrupt-cells property to pinctrl nodes
Required for devices trying to use pinctrl devices as interrupt
controller.
Fixes: 0a8282b83119 ("arm64: apple: Add pinctrl nodes")
Signed-off-by: Janne Grunau <j@jannau.net>
Cc: Mark Kettenis <kettenis@openbsd.org>
Reviewed-by: Sven Peter <sven@svenpeter.dev>
Reviewed-by: Mark Kettenis <kettenis@openbsd.org>
Tested-by: Hector Martin <marcan@marcan.st>
Signed-off-by: Hector Martin <marcan@marcan.st>
Janne Grunau [Mon, 22 Nov 2021 22:24:39 +0000 (23:24 +0100)]
dt-bindings: i2c: apple,i2c: allow multiple compatibles
The intention was to have a SoC-specific and base compatible string
to allow forward compatibility and SoC specific quirks,
Fixes: df7c4a8c1b47 ("dt-bindings: i2c: Add Apple I2C controller bindings")
Signed-off-by: Janne Grunau <j@jannau.net>
Cc: Mark Kettenis <kettenis@openbsd.org>
Reviewed-by: Sven Peter <sven@svenpeter.dev>
Reviewed-by: Mark Kettenis <kettenis@openbsd.org>
Tested-by: Hector Martin <marcan@marcan.st>
Acked-by: Wolfram Sang <wsa@kernel.org>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Hector Martin <marcan@marcan.st>
Sin Hui Kho [Wed, 1 Dec 2021 10:13:53 +0000 (18:13 +0800)]
arm64: dts: Update NAND MTD partition for Agilex and Stratix 10
Change NAND flash MTD partition in device tree after implementation of
UBI and UBIFS. "u-boot" partition remain for raw u-boot image, but "root"
partition is use for UBI image containing all other components.
Signed-off-by: Sin Hui Kho <sin.hui.kho@intel.com>
Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
Jerome Brunet [Tue, 30 Nov 2021 10:01:59 +0000 (11:01 +0100)]
arm64: dts: meson: p241: add sound support
Add the p241 sound card support. This board can play audio through HDMI
and the internal DAC.
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Reviewed-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Link: https://lore.kernel.org/r/20211130100159.214489-3-jbrunet@baylibre.com
Jerome Brunet [Tue, 30 Nov 2021 10:01:58 +0000 (11:01 +0100)]
arm64: dts: meson: p241: add vcc_5v regulator
Add the VCC_5V regulator, which feeds the HDMI, USB and audio amplifier.
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Reviewed-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Link: https://lore.kernel.org/r/20211130100159.214489-2-jbrunet@baylibre.com
Dinh Nguyen [Tue, 30 Nov 2021 20:10:44 +0000 (14:10 -0600)]
arm64: dts: n5x: add qspi, usb, and ethernet support
Populate the N5X board dts file with support for QSPI, USB, and
ethernet.
Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
Fabrice Gasnier [Fri, 26 Nov 2021 11:33:40 +0000 (12:33 +0100)]
ARM: dts: stm32: fix stusb1600 pinctrl used on stm32mp157c-dk
A pinctrl handle is used to setup a pull-up on the stusb1600 IRQ pin (that
is open drain).
When in ANALOG state, no pull-up can be applied in the GPIO HW controller,
still the setting is done into the register. The pull-up is effective
currently, only when the GPIO IRQ is requested. The correct setting is to
use directly the GPIO, instead of ANALOG state.
Signed-off-by: Fabrice Gasnier <fabrice.gasnier@foss.st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
Kieran Bingham [Fri, 26 Nov 2021 09:54:42 +0000 (09:54 +0000)]
arm64: dts: renesas: r8a779a0: Add DU support
Provide the device nodes for the DU on the V3U platforms.
Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Kieran Bingham <kieran.bingham+renesas@ideasonboard.com>
Link: https://lore.kernel.org/r/20211126095445.932930-2-kieran.bingham+renesas@ideasonboard.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Kieran Bingham [Wed, 24 Nov 2021 15:28:15 +0000 (15:28 +0000)]
arm64: dts: renesas: salvator-common: Merge hdmi0_con
The remote endpoint for the hdmi connector is specfied through a
reference to the hdmi0_con endpoint, which is in the same file.
Simplify by specifying the remote-endpoint directly in the hdmi0_con
endpoint.
Signed-off-by: Kieran Bingham <kieran.bingham+renesas@ideasonboard.com>
Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Link: https://lore.kernel.org/r/20211124152815.3926961-3-kieran.bingham+renesas@ideasonboard.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Kieran Bingham [Wed, 24 Nov 2021 15:28:14 +0000 (15:28 +0000)]
arm64: dts: renesas: ulcb: Merge hdmi0_con
The remote endpoint for the hdmi connector is specfied through a
reference to the hdmi0_con endpoint, which is in the same file.
Simplify by specifying the remote-endpoint directly in the hdmi0_con
endpoint.
Signed-off-by: Kieran Bingham <kieran.bingham+renesas@ideasonboard.com>
Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Link: https://lore.kernel.org/r/20211124152815.3926961-2-kieran.bingham+renesas@ideasonboard.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Biju Das [Wed, 24 Nov 2021 15:43:16 +0000 (15:43 +0000)]
arm64: dts: renesas: r9a07g044: Add OPP table
Add OPP table for RZ/G2L SoC.
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Link: https://lore.kernel.org/r/20211124154316.28365-1-biju.das.jz@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Geert Uytterhoeven [Wed, 24 Nov 2021 14:39:40 +0000 (15:39 +0100)]
arm64: dts: renesas: Fix operating point table node names
Align the node names of device nodes representing operating point v2
tables with the expectations of the DT bindings in
Documentation/devicetree/bindings/opp/opp-v2.yaml.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
Link: https://lore.kernel.org/r/ac885456ffb00fa4cc4069b9967761df2c98c3d8.1637764588.git.geert+renesas@glider.be
Biju Das [Tue, 23 Nov 2021 14:14:20 +0000 (14:14 +0000)]
arm64: dts: renesas: rzg2l-smarc-som: Enable watchdog
Enable watchdog{0, 1, 2} interfaces on RZ/G2L SMARC EVK.
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Link: https://lore.kernel.org/r/20211123141420.23529-3-biju.das.jz@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Biju Das [Tue, 23 Nov 2021 14:14:19 +0000 (14:14 +0000)]
arm64: dts: renesas: r9a07g044: Add WDT nodes
Add WDT{0, 1, 2} nodes to RZ/G2L SoC DTSI.
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Link: https://lore.kernel.org/r/20211123141420.23529-2-biju.das.jz@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Biju Das [Mon, 22 Nov 2021 10:39:05 +0000 (10:39 +0000)]
arm64: dts: renesas: r9a07g044: Rename SDHI clocks
Rename the below SDHI clocks to match with the clocks used in driver.
imclk->core
clk_hs->clkh
imclk2->cd
Also re-arrange the clocks to match with the sorting order used in the
binding document.
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Acked-by: Ulf Hansson <ulf.hansson@linaro.org>
Link: https://lore.kernel.org/r/20211122103905.14439-3-biju.das.jz@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Lad Prabhakar [Sun, 21 Nov 2021 23:49:06 +0000 (23:49 +0000)]
arm64: dts: renesas: rzg2l-smarc-som: Enable serial NOR flash
Enable mt25qu512a flash connected to QSPI0.
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Biju Das <biju.das.jz@bp.renesas.com>
Link: https://lore.kernel.org/r/20211121234906.9602-1-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Biju Das [Thu, 18 Nov 2021 19:18:25 +0000 (19:18 +0000)]
arm64: dts: renesas: rzg2l-smarc-som: Enable OSTM
Enable OSTM{1, 2} interfaces on RZ/G2L SMARC EVK.
OSTM0 is reserved for TF-A.
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Link: https://lore.kernel.org/r/20211118191826.2026-3-biju.das.jz@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Biju Das [Thu, 18 Nov 2021 19:18:24 +0000 (19:18 +0000)]
arm64: dts: renesas: r9a07g044: Add OSTM nodes
Add OSTM{0,1,2} nodes to RZ/G2L SoC DTSI.
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Link: https://lore.kernel.org/r/20211118191826.2026-2-biju.das.jz@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Biju Das [Fri, 12 Nov 2021 08:10:02 +0000 (08:10 +0000)]
arm64: dts: renesas: r9a07g044: Sort psci node
Sort psci node alphabetically.
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Link: https://lore.kernel.org/r/20211112081003.15453-4-biju.das.jz@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Biju Das [Mon, 22 Nov 2021 10:39:04 +0000 (10:39 +0000)]
dt-bindings: mmc: renesas,sdhi: Rename RZ/G2L clocks
Rename the below RZ/G2L clocks to match with the clock names used in
R-Car Gen2 and later generations.
imclk->core
clk_hs->clkh
imclk2->cd
This changes will avoid using fallback for RZ/G2L high speed clock,
if "clkh" is not used in device tree and also the code changes in
driver related to this clocks.
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Acked-by: Ulf Hansson <ulf.hansson@linaro.org>
Link: https://lore.kernel.org/r/20211122103905.14439-2-biju.das.jz@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Janne Grunau [Mon, 22 Nov 2021 22:24:38 +0000 (23:24 +0100)]
arm64: dts: apple: change ethernet0 device type to ethernet
Fixes make dtbs_check errors for t8103-j274.dts due to missing pci
properties.
Fixes: e1bebf978151 ("arm64: dts: apple: j274: Expose PCI node for the Ethernet MAC address")
Reviewed-by: Mark Kettenis <kettenis@openbsd.org>
Signed-off-by: Janne Grunau <j@jannau.net>
Tested-by: Hector Martin <marcan@marcan.st>
Signed-off-by: Hector Martin <marcan@marcan.st>
Fabrice Gasnier [Mon, 25 Oct 2021 15:17:50 +0000 (17:17 +0200)]
ARM: dts: stm32: tune the HS USB PHYs on stm32mp157c-ev1
This patch adds phy tuning parameters for usbphyc port0 (USBH controller)
and usbphyc port1 (OTG controller).
Phy tuning parameters are used to adjust the phy settings to compensate
parasitics, which can be due to USB receptacle, routing, and ESD protection
component.
Signed-off-by: Amelie Delaunay <amelie.delaunay@foss.st.com>
Signed-off-by: Fabrice Gasnier <fabrice.gasnier@foss.st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
Fabrice Gasnier [Mon, 25 Oct 2021 15:17:49 +0000 (17:17 +0200)]
ARM: dts: stm32: tune the HS USB PHYs on stm32mp15xx-dkx
This patch adds phy tuning parameters for usbphyc port0 (USBH controller)
and usbphyc port1 (OTG controller).
Phy tuning parameters are used to adjust the phy settings to compensate
parasitics, which can be due to USB receptacle, routing, and ESD protection
component.
Signed-off-by: Amelie Delaunay <amelie.delaunay@foss.st.com>
Signed-off-by: Fabrice Gasnier <fabrice.gasnier@foss.st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
Erwan Le Ray [Wed, 20 Oct 2021 15:02:30 +0000 (17:02 +0200)]
ARM: dts: stm32: clean uart4_idle_pins_a node for stm32mp15
Clean useless spaces in uart4_idle_pins_a node.
Signed-off-by: Erwan Le Ray <erwan.leray@foss.st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
Erwan Le Ray [Wed, 20 Oct 2021 15:03:11 +0000 (17:03 +0200)]
ARM: dts: stm32: add pull-up to USART3 and UART7 RX pins on STM32MP15 DKx boards
Add pull-up to USART3 and UART7 RX pins to allow loop tests between USART3
and UART7 on stm32mp15 DKx boards.
Signed-off-by: Erwan Le Ray <erwan.leray@foss.st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
Dillon Min [Sat, 24 Jul 2021 03:44:02 +0000 (11:44 +0800)]
ARM: dts: stm32: fix dtbs_check warning on ili9341 dts binding on stm32f429 disco
Since the compatible string defined from ilitek,ili9341.yaml is
"st,sf-tc240t-9370-t", "ilitek,ili9341"
so, append "ilitek,ili9341" to avoid the below dtbs_check warning.
arch/arm/boot/dts/stm32f429-disco.dt.yaml: display@1: compatible:
['st,sf-tc240t-9370-t'] is too short
Fixes: a726e2f000ec ("ARM: dts: stm32: enable ltdc binding with ili9341, gyro l3gd20 on stm32429-disco board")
Signed-off-by: Dillon Min <dillon.minfei@gmail.com>
Reported-by: kernel test robot <lkp@intel.com>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
Linus Walleij [Tue, 23 Nov 2021 10:23:11 +0000 (11:23 +0100)]
ARM: dts: ux500: Fixup Gavini magnetometer
The Gavini device tree had the wrong magnetometer specified,
this should be a YAS530.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Linus Walleij [Sat, 19 Jun 2021 22:42:59 +0000 (00:42 +0200)]
ARM: dts: ux500: Add reset lines to IP blocks
The new reset controller makes is possible to add reset lines to a host
of IP blocks in the DB8500/U8500.
Cc: Ulf Hansson <ulf.hansson@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Sugaya Taichi [Mon, 15 Nov 2021 09:30:55 +0000 (18:30 +0900)]
ARM: dts: milbeaut: set clock phandle to uart node
Set clock phandle to uart node for Milbeaut M10V support.
Signed-off-by: Sugaya Taichi <sugaya.taichi@socionext.com>
Link: https://lore.kernel.org/r/1636968656-14033-4-git-send-email-sugaya.taichi@socionext.com'
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Sugaya Taichi [Mon, 15 Nov 2021 09:30:54 +0000 (18:30 +0900)]
ARM: dts: milbeaut: set clock phandle to timer node
Set clock phandle to timer node for Milbeaut M10V support.
Signed-off-by: Sugaya Taichi <sugaya.taichi@socionext.com>
Link: https://lore.kernel.org/r/1636968656-14033-3-git-send-email-sugaya.taichi@socionext.com'
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Sugaya Taichi [Mon, 15 Nov 2021 09:30:53 +0000 (18:30 +0900)]
ARM: dts: milbeaut: add a clock node for M10V
Add a clock node for the platform of the Milbeaut M10V.
Signed-off-by: Sugaya Taichi <sugaya.taichi@socionext.com>
Link: https://lore.kernel.org/r/1636968656-14033-2-git-send-email-sugaya.taichi@socionext.com'
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Linus Torvalds [Sun, 21 Nov 2021 21:47:39 +0000 (13:47 -0800)]
Linux 5.16-rc2
Linus Torvalds [Sun, 21 Nov 2021 19:25:19 +0000 (11:25 -0800)]
Merge tag 'x86-urgent-2021-11-21' of git://git./linux/kernel/git/tip/tip
Pull x86 fixes from Thomas Gleixner:
- Move the command line preparation and the early command line parsing
earlier so that the command line parameters which affect
early_reserve_memory(), e.g. efi=nosftreserve, are taken into
account. This was broken when the invocation of
early_reserve_memory() was moved recently.
- Use an atomic type for the SGX page accounting, which is read and
written locklessly, to plug various race conditions related to it.
* tag 'x86-urgent-2021-11-21' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:
x86/sgx: Fix free page accounting
x86/boot: Pull up cmdline preparation and early param parsing
Linus Torvalds [Sun, 21 Nov 2021 19:17:50 +0000 (11:17 -0800)]
Merge tag 'perf-urgent-2021-11-21' of git://git./linux/kernel/git/tip/tip
Pull x86 perf fixes from Thomas Gleixner:
- Remove unneded PEBS disabling when taking LBR snapshots to prevent an
unchecked MSR access error.
- Fix IIO event constraints for Snowridge and Skylake server chips.
* tag 'perf-urgent-2021-11-21' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:
x86/perf: Fix snapshot_branch_stack warning in VM
perf/x86/intel/uncore: Fix IIO event constraints for Snowridge
perf/x86/intel/uncore: Fix IIO event constraints for Skylake Server
perf/x86/intel/uncore: Fix filter_tid mask for CHA events on Skylake Server
Linus Torvalds [Sun, 21 Nov 2021 18:26:35 +0000 (10:26 -0800)]
Merge tag 'powerpc-5.16-2' of git://git./linux/kernel/git/powerpc/linux
Pull more powerpc fixes from Michael Ellerman:
- Fix a bug in copying of sigset_t for 32-bit systems, which caused X
to not start.
- Fix handling of shared LSIs (rare) with the xive interrupt controller
(Power9/10).
- Fix missing TOC setup in some KVM code, which could result in oopses
depending on kernel data layout.
- Fix DMA mapping when we have persistent memory and only one DMA
window available.
- Fix further problems with STRICT_KERNEL_RWX on 8xx, exposed by a
recent fix.
- A couple of other minor fixes.
Thanks to Alexey Kardashevskiy, Aneesh Kumar K.V, Cédric Le Goater,
Christian Zigotzky, Christophe Leroy, Daniel Axtens, Finn Thain, Greg
Kurz, Masahiro Yamada, Nicholas Piggin, and Uwe Kleine-König.
* tag 'powerpc-5.16-2' of git://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux:
powerpc/xive: Change IRQ domain to a tree domain
powerpc/8xx: Fix pinned TLBs with CONFIG_STRICT_KERNEL_RWX
powerpc/signal32: Fix sigset_t copy
powerpc/book3e: Fix TLBCAM preset at boot
powerpc/pseries/ddw: Do not try direct mapping with persistent memory and one window
powerpc/pseries/ddw: simplify enable_ddw()
powerpc/pseries/ddw: Revert "Extend upper limit for huge DMA window for persistent memory"
powerpc/pseries: Fix numa FORM2 parsing fallback code
powerpc/pseries: rename numa_dist_table to form2_distances
powerpc: clean vdso32 and vdso64 directories
powerpc/83xx/mpc8349emitx: Drop unused variable
KVM: PPC: Book3S HV: Use GLOBAL_TOC for kvmppc_h_set_dabr/xdabr()
Florian Klink [Wed, 20 Oct 2021 09:59:22 +0000 (11:59 +0200)]
arm64: dts: rockchip: Enable HDD power on helios64
This adds the hdd_{a,b}_power blocks present in the armbian helios64
dts. [1]
Without those powered up, no HDDs will appear (except one connected via
the m.2 slot).
>From https://wiki.kobol.io/helios64/sata/#hdd-power:
> The power delivery of the HDDs is divided into two group:
>
> HDD Rail A (Max. 3x Drives)
> HDD Rail B (Max. 2x Drives)
>
> Helios64 implements a power staggering approach where HDD Rail A will be
> powered up first, then few seconds later HDD Rail B will be powered up.
> This power control scenario is performed to reduce the inrush current
> during disk spin-up.
In practice, this power staggering approach will be included in the
bootloader (not in the kernel), as we might want to boot from a SATA
drive.
>From my experiments, if the bootloader doesn't implement the power
staggering, only one HDD will get recognized (probably cause the others
didn't boot due to few power).
Still, it makes sense to expose this block in the device-tree, so the
kernel can ensure both rails are on (and this can be shared with
u-boot).
[1] https://github.com/armbian/build/blob/
744ea89a589d62cb6f409baab60fc6664520bc39/patch/kernel/archive/rockchip64-5.14/add-board-helios64.patch
Signed-off-by: Florian Klink <flokli@flokli.de>
Tested-by: Dennis Gilmore <dgilmore@redhat.com>
Link: https://lore.kernel.org/r/20211020095926.735938-1-flokli@flokli.de
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Dennis Gilmore [Fri, 29 Oct 2021 00:53:19 +0000 (19:53 -0500)]
arm64: dts: rockchip: add variables for pcie completion to helios64
without ep-gpios defined u-boot does not initialise PCIe
rockchip_pcie pcie@
f8000000: failed to find ep-gpios property
additionally set max-link-speed and pinctrl-names for completeness
with this patch and the ones from Florian Klink applied to the dts
file in u-boot sata drives show up in both u-boot and linux
Signed-off-by: Dennis Gilmore <dgilmore@redhat.com>
Acked-By: Florian Klink <flokli@flokli.de>
Link: https://lore.kernel.org/r/20211029005323.144652-1-dgilmore@redhat.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Geert Uytterhoeven [Thu, 18 Nov 2021 18:26:21 +0000 (10:26 -0800)]
pstore/blk: Use "%lu" to format unsigned long
On 32-bit:
fs/pstore/blk.c: In function ‘__best_effort_init’:
include/linux/kern_levels.h:5:18: warning: format ‘%zu’ expects argument of type ‘size_t’, but argument 3 has type ‘long unsigned int’ [-Wformat=]
5 | #define KERN_SOH "\001" /* ASCII Start Of Header */
| ^~~~~~
include/linux/kern_levels.h:14:19: note: in expansion of macro ‘KERN_SOH’
14 | #define KERN_INFO KERN_SOH "6" /* informational */
| ^~~~~~~~
include/linux/printk.h:373:9: note: in expansion of macro ‘KERN_INFO’
373 | printk(KERN_INFO pr_fmt(fmt), ##__VA_ARGS__)
| ^~~~~~~~~
fs/pstore/blk.c:314:3: note: in expansion of macro ‘pr_info’
314 | pr_info("attached %s (%zu) (no dedicated panic_write!)\n",
| ^~~~~~~
Cc: stable@vger.kernel.org
Fixes: 7bb9557b48fcabaa ("pstore/blk: Use the normal block device I/O path")
Signed-off-by: Geert Uytterhoeven <geert@linux-m68k.org>
Signed-off-by: Kees Cook <keescook@chromium.org>
Link: https://lore.kernel.org/r/20210629103700.1935012-1-geert@linux-m68k.org
Cc: Jens Axboe <axboe@kernel.dk>
Reviewed-by: Christoph Hellwig <hch@lst.de>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
Dennis Gilmore [Tue, 26 Oct 2021 15:07:47 +0000 (10:07 -0500)]
arm64: dts: rockchip: define usb hub and 2.5GbE nic on helios64
Add the 4 ports on the internal hub and define and turn on the 2.5GbE
nic.
Signed-off-by: Dennis Gilmore <dgilmore@redhat.com>
Tested-by: Florian Klink <flokli@flokli.de>
Link: https://lore.kernel.org/r/20211026150751.70115-1-dgilmore@redhat.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Alex Bee [Wed, 27 Oct 2021 14:37:26 +0000 (16:37 +0200)]
arm64: dts: rockchip: add interrupt and headphone-detection for Rock Pi4's audio codec
As schematics at [1] and [2] show C- and plus-revisions have interrupt and
headphone detection lines of ES8316 codec connected.
Add them to the respective device trees.
[1] https://dl.radxa.com/rockpi4/docs/hw/rockpi4/rockpi_4c_v12_sch_20200620.pdf
[2] https://dl.radxa.com/rockpi4/docs/hw/rockpi4/rockpi4b_plus_v16_sch_20200628.pdf
Signed-off-by: Alex Bee <knaerzche@gmail.com>
Link: https://lore.kernel.org/r/20211027143726.165809-2-knaerzche@gmail.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Linus Torvalds [Sat, 20 Nov 2021 21:17:24 +0000 (13:17 -0800)]
Merge branch 'akpm' (patches from Andrew)
Merge misc fixes from Andrew Morton:
"15 patches.
Subsystems affected by this patch series: ipc, hexagon, mm (swap,
slab-generic, kmemleak, hugetlb, kasan, damon, and highmem), and proc"
* emailed patches from Andrew Morton <akpm@linux-foundation.org>:
proc/vmcore: fix clearing user buffer by properly using clear_user()
kmap_local: don't assume kmap PTEs are linear arrays in memory
mm/damon/dbgfs: fix missed use of damon_dbgfs_lock
mm/damon/dbgfs: use '__GFP_NOWARN' for user-specified size buffer allocation
kasan: test: silence intentional read overflow warnings
hugetlb, userfaultfd: fix reservation restore on userfaultfd error
hugetlb: fix hugetlb cgroup refcounting during mremap
mm: kmemleak: slob: respect SLAB_NOLEAKTRACE flag
hexagon: ignore vmlinux.lds
hexagon: clean up timer-regs.h
hexagon: export raw I/O routines for modules
mm: emit the "free" trace report before freeing memory in kmem_cache_free()
shm: extend forced shm destroy to support objects from several IPC nses
ipc: WARN if trying to remove ipc object which is absent
mm/swap.c:put_pages_list(): reinitialise the page list
Linus Torvalds [Sat, 20 Nov 2021 19:05:10 +0000 (11:05 -0800)]
Merge tag 'block-5.16-2021-11-19' of git://git.kernel.dk/linux-block
Pull block fixes from Jens Axboe:
- Flip a cap check to avoid a selinux error (Alistair)
- Fix for a regression this merge window where we can miss a queue ref
put (me)
- Un-mark pstore-blk as broken, as the condition that triggered that
change has been rectified (Kees)
- Queue quiesce and sync fixes (Ming)
- FUA insertion fix (Ming)
- blk-cgroup error path put fix (Yu)
* tag 'block-5.16-2021-11-19' of git://git.kernel.dk/linux-block:
blk-mq: don't insert FUA request with data into scheduler queue
blk-cgroup: fix missing put device in error path from blkg_conf_pref()
block: avoid to quiesce queue in elevator_init_mq
Revert "mark pstore-blk as broken"
blk-mq: cancel blk-mq dispatch work in both blk_cleanup_queue and disk_release()
block: fix missing queue put in error path
block: Check ADMIN before NICE for IOPRIO_CLASS_RT
Linus Torvalds [Sat, 20 Nov 2021 18:59:03 +0000 (10:59 -0800)]
Merge tag 'pinctrl-v5.16-2' of git://git./linux/kernel/git/linusw/linux-pinctrl
Pull pin control fixes from Linus Walleij:
"There is an ACPI stubs fix which is ACKed by the ACPI maintainer for
merging through my tree.
One item stand out and that is that I delete the <linux/sdb.h> header
that is used by nothing. I deleted this subsystem (through the GPIO
tree) a while back so I feel responsible for tidying up the floor.
Other than that it is the usual mistakes, a bit noisy around build
issue and Kconfig then driver fixes.
Specifics:
- Fix some stubs causing compile issues for ACPI.
- Fix some wakeups on AMD IRQs shared between GPIO and SCI.
- Fix a build warning in the Tegra driver.
- Fix a Kconfig issue in the Qualcomm driver.
- Add a missing include the RALink driver.
- Return a valid type for the Apple pinctrl IRQs.
- Implement some Qualcomm SDM845 dual-edge errata.
- Remove the unused <linux/sdb.h> header. (The subsystem was once
deleted by the pinctrl maintainer...)
- Fix a duplicate initialized in the Tegra driver.
- Fix register offsets for UFS and SDC in the Qualcomm SM8350 driver"
* tag 'pinctrl-v5.16-2' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl:
pinctrl: qcom: sm8350: Correct UFS and SDC offsets
pinctrl: tegra194: remove duplicate initializer again
Remove unused header <linux/sdb.h>
pinctrl: qcom: sdm845: Enable dual edge errata
pinctrl: apple: Always return valid type in apple_gpio_irq_type
pinctrl: ralink: include 'ralink_regs.h' in 'pinctrl-mt7620.c'
pinctrl: qcom: fix unmet dependencies on GPIOLIB for GPIOLIB_IRQCHIP
pinctrl: tegra: Return const pointer from tegra_pinctrl_get_group()
pinctrl: amd: Fix wakeups when IRQ is shared with SCI
ACPI: Add stubs for wakeup handler functions
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