Merge branch 'pci/field-get'

- Use FIELD_GET()/FIELD_PREP() when possible throughout drivers/pci/ (Ilpo
  Järvinen, Bjorn Helgaas)

- Rework DPC control programming for clarity (Ilpo Järvinen)

* pci/field-get:
  PCI/portdrv: Use FIELD_GET()
  PCI/VC: Use FIELD_GET()
  PCI/PTM: Use FIELD_GET()
  PCI/PME: Use FIELD_GET()
  PCI/ATS: Use FIELD_GET()
  PCI/ATS: Show PASID Capability register width in bitmasks
  PCI: Use FIELD_GET() in Sapphire RX 5600 XT Pulse quirk
  PCI: Use FIELD_GET()
  PCI/MSI: Use FIELD_GET/PREP()
  PCI/DPC: Use defines with DPC reason fields
  PCI/DPC: Use defined fields with DPC_CTL register
  PCI/DPC: Use FIELD_GET()
  PCI: hotplug: Use FIELD_GET/PREP()
  PCI: dwc: Use FIELD_GET/PREP()
  PCI: cadence: Use FIELD_GET()
  PCI: Use FIELD_GET() to extract Link Width
  PCI: mvebu: Use FIELD_PREP() with Link Width
  PCI: tegra194: Use FIELD_GET()/FIELD_PREP() with Link Width fields

# Conflicts:
# drivers/pci/controller/dwc/pcie-tegra194.c

Merge branch 'pci/config-errs'

- Simplify config accessor error checking (Ilpo Järvinen)

* pci/config-errs:
  scsi: ipr: Do PCI error checks on own line
  PCI: xgene: Do PCI error check on own line & keep return value
  PCI: Do error check on own line to split long "if" conditions
  atm: iphase: Do PCI error checks on own line
  sh: pci: Do PCI error check on own line
  alpha: Streamline convoluted PCI error handling

Merge branch 'pci/controller/xilinx-xdma'

- Move Xilinx IRQ definitions to a common header shared by pcie-xilinx-cpm
  and xilinx-xdma (Thippeswamy Havalige)

- Add Xilinx XDMA driver and DT schema (Thippeswamy Havalige)

* pci/controller/xilinx-xdma:
  PCI: xilinx-xdma: Add Xilinx XDMA Root Port driver
  dt-bindings: PCI: xilinx-xdma: Add schemas for Xilinx XDMA PCIe Root Port Bridge
  PCI: xilinx-cpm: Move IRQ definitions to a common header

Merge branch 'pci/controller/xilinx-ecam'

- Drop xilinx-nwl updates of bridge bus number fields, since PCI core
  already does that (Thippeswamy Havalige)

- Update xilinx-nwl driver and ECAM size in devicetree example to allow up
  to 256 buses (Thippeswamy Havalige)

* pci/controller/xilinx-ecam:
  PCI: xilinx-nwl: Modify ECAM size to enable support for 256 buses
  PCI: xilinx-nwl: Rename the NWL_ECAM_VALUE_DEFAULT macro
  dt-bindings: PCI: xilinx-nwl: Modify ECAM size in the DT example
  PCI: xilinx-nwl: Remove redundant code that sets Type 1 header fields

Merge branch 'pci/controller/vmd'

- Fix space/tab whitespace issue (Xinghui Li)

* pci/controller/vmd:
  PCI: vmd: Fix inconsistent indentation in vmd_resume()

Merge branch 'pci/controller/speed'

- Use PCIE_SPEED2MBS_ENC() macro in qcom host and endpoint to encode link
  speed instead of hard-coding the link speed in MBps (Manivannan
  Sadhasivam)

- Use Mbps_to_icc() (not MBps_to_icc()) in tegra194 instead of explicitly
  doing the bytes-to-bits conversion (Manivannan Sadhasivam)

* pci/controller/speed:
  PCI: tegra194: Use Mbps_to_icc() macro for setting icc speed
  PCI: qcom-ep: Use PCIE_SPEED2MBS_ENC() macro for encoding link speed
  PCI: qcom: Use PCIE_SPEED2MBS_ENC() macro for encoding link speed

Merge branch 'pci/controller/rcar'

- Add generic T_PVPERL macro for the required interval between power being
  stable and PERST# being inactive (Yoshihiro Shimoda)

- Factor out dw_pcie_link_set_max_link_width() (Yoshihiro Shimoda)

- Update PCI_EXP_LNKCAP_MLW so Link Capabilities shows the correct max link
  width (Yoshihiro Shimoda)

- Drop tegra194 PCI_EXP_LNKCAP_MLW setting since dw_pcie_setup() already
  does it (Yoshihiro Shimoda)

- Add dwc support for different dbi and dbi2 register offsets, to be used
  for R-Car Gen4 controllers (Yoshihiro Shimoda)

- Add EDMA_UNROLL capability flag for R-Car Gen4 controllers that don't
  correctly advertise unrolled mapping via their eDMA CTRL register
  (Yoshihiro Shimoda)

- Export dw_pcie_ep_exit() for use by the modular R-Car Gen4 driver
  (Yoshihiro Shimoda)

- Add .pre_init() and .deinit() hooks for use by R-Car Gen4 controllers
  (Yoshihiro Shimoda)

- Increase snps,dw-pcie DT reg and reg-names maxItems for R-Car Gen4
  controllers (Yoshihiro Shimoda)

- Add rcar-gen4-pci host and endpoint DT bindings and drivers (Yoshihiro
  Shimoda)

- Add Renesas R8A779F0 Device ID to pci_endpoint_test to allow testing on
  R-Car S4-8 (Yoshihiro Shimoda)

* pci/controller/rcar:
  misc: pci_endpoint_test: Add Device ID for R-Car S4-8 PCIe controller
  MAINTAINERS: Update PCI DRIVER FOR RENESAS R-CAR for R-Car Gen4
  PCI: rcar-gen4: Add endpoint mode support
  PCI: rcar-gen4: Add R-Car Gen4 PCIe controller support for host mode
  dt-bindings: PCI: renesas: Add R-Car Gen4 PCIe Endpoint
  dt-bindings: PCI: renesas: Add R-Car Gen4 PCIe Host
  dt-bindings: PCI: dwc: Update maxItems of reg and reg-names
  PCI: dwc: endpoint: Introduce .pre_init() and .deinit()
  PCI: dwc: Expose dw_pcie_write_dbi2() to module
  PCI: dwc: Expose dw_pcie_ep_exit() to module
  PCI: dwc: Add EDMA_UNROLL capability flag
  PCI: dwc: endpoint: Add multiple PFs support for dbi2
  PCI: tegra194: Drop PCI_EXP_LNKSTA_NLW setting
  PCI: dwc: Add missing PCI_EXP_LNKCAP_MLW handling
  PCI: dwc: Add dw_pcie_link_set_max_link_width()
  PCI: Add T_PVPERL macro

Merge branch 'pci/controller/qcom-ep'

- Add qcom-ep callback to write DBI2 registers (Manivannan Sadhasivam)

* pci/controller/qcom-ep:
  PCI: qcom-ep: Add dedicated callback for writing to DBI2 registers

Merge branch 'pci/controller/layerscape'

- Set 64-bit DMA mask for layerscape-ep (Guanhua Gao)

* pci/controller/layerscape:
  PCI: layerscape-ep: Set 64-bit DMA mask

Merge branch 'pci/controller/hyperv'

- Annotate struct hv_dr_state with __counted_by to prepare for array access
  bounds checking (Kees Cook)

* pci/controller/hyperv:
  PCI: hv: Annotate struct hv_dr_state with __counted_by

Merge branch 'pci/controller/cadence'

- Drop unused struct cdns_plat_pcie.is_rc member (Li Chen)

* pci/controller/cadence:
  PCI: cadence: Drop unused member from struct cdns_plat_pcie

Merge branch 'pci/controller/aspm'

- Add a dwc .host_post_init() callback for configuration after downstream
  devices are scanned (Manivannan Sadhasivam)

- Enable ASPM for devices below qcom 1.9.0 host controllers (Manivannan
  Sadhasivam)

* pci/controller/aspm:
  PCI: qcom: Enable ASPM for platforms supporting 1.9.0 ops
  PCI: dwc: Add host_post_init() callback

Merge branch 'pci/vga'

- Add pci_is_vga() helper, which checks for both PCI_CLASS_DISPLAY_VGA and
  PCI_CLASS_NOT_DEFINED_VGA (which catches ancient devices built before
  Class Codes were defined) (Sui Jingfeng)

- Use the new pci_is_vga() to identify devices for the VGA arbiter, the
  sysfs "boot_vga" attribute, and the virtio and qxl drivers (SUi Jingfeng)

* pci/vga:
  drm/qxl: Use pci_is_vga() to identify VGA devices
  drm/virtio: Use pci_is_vga() to identify VGA devices
  PCI/sysfs: Enable 'boot_vga' attribute via pci_is_vga()
  PCI/VGA: Select VGA devices earlier
  PCI/VGA: Use pci_is_vga() to identify VGA devices
  PCI: Add pci_is_vga() helper

Merge branch 'pci/reset'

- Lengthen reset delay for VideoPropulsion Torrent QN16e card, which seems
  to require longer delay than spec requires (Lukas Wunner)

* pci/reset:
  PCI: Lengthen reset delay for VideoPropulsion Torrent QN16e card

Merge branch 'pci/pm'

- Protect driver's D3cold preference from being overwritten by user space
  via sysfs (Lukas Wunner)

- Avoid PME from D3hot/D3cold for AMD Rembrandt and Phoenix USB4 to fix
  wakeup by USB4-attached devices (Mario Limonciello)

* pci/pm:
  x86/PCI: Avoid PME from D3hot/D3cold for AMD Rembrandt and Phoenix USB4
  PCI/sysfs: Protect driver's D3cold preference from user space

Merge branch 'pci/p2pdma'

- Move struct dev_pagemap (a flexible structure) to end of struct
  pci_p2pdma_pagemap to avoid overwriting things after dev_pagemap
  (Gustavo A. R.  Silva)

* pci/p2pdma:
  PCI/P2PDMA: Remove redundant goto
  PCI/P2PDMA: Fix undefined behavior bug in struct pci_p2pdma_pagemap

Merge branch 'pci/hotplug'

- Add driver for Ampere Altra Attention Indicators (D Scott Phillips)

* pci/hotplug:
  PCI: hotplug: Add Ampere Altra Attention Indicator extension driver
  PCI: acpiphp: Allow built-in drivers for Attention Indicators

Merge branch 'pci/enumeration'

- Add and use pci_get_base_class() to search for all PCI_BASE_CLASS_DISPLAY
  devices (Sui Jingfeng)

- Fix a vmd check for multi-function devices (Ilpo Järvinen)

- Add PCI_HEADER_TYPE_MFD and use it to replace literals (Ilpo Järvinen)

- Use acpi_evaluate_dsm_typed() instead of open-coding it (Andy Shevchenko)

- Keep .remove() and .probe() callbacks (previously marked __init) in case
  they're used via sysfs (Uwe Kleine-König)

* pci/enumeration:
  PCI: keystone: Don't discard .probe() callback
  PCI: keystone: Don't discard .remove() callback
  PCI: kirin: Don't discard .remove() callback
  PCI: exynos: Don't discard .remove() callback
  PCI/ACPI: Use acpi_evaluate_dsm_typed()
  PCI: Use PCI_HEADER_TYPE_* instead of literals
  PCI: Add PCI_HEADER_TYPE_MFD definition
  PCI: vmd: Correct PCI Header Type Register's multi-function check
  drm/radeon: Use pci_get_base_class() to reduce duplicated code
  drm/amdgpu: Use pci_get_base_class() to reduce duplicated code
  drm/nouveau: Use pci_get_base_class() to reduce duplicated code
  ALSA: hda: Use pci_get_base_class() to reduce duplicated code
  PCI: Add pci_get_base_class() helper

Merge branch 'pci/endpoint'

- Use IS_ERR_OR_NULL() helper function instead of open-coding it (Ruan
  Jinjie)

* pci/endpoint:
  PCI: endpoint: Use IS_ERR_OR_NULL() helper function

Merge branch 'pci/ats'

- Disable ATS for Intel IPU E2000 A- and B-stepping devices to avoid
  invalidation message endianness erratum (Bartosz Pawlowski)

* pci/ats:
  PCI: Disable ATS for specific Intel IPU E2000 devices
  PCI: Extract ATS disabling to a helper function

Merge branch 'pci/aspm'

* pci/aspm:
  PCI/ASPM: Fix L1 substate handling in aspm_attr_store_common()
  Revert "PCI/ASPM: Disable only ASPM_STATE_L1 when driver, disables L1"
  PCI/ASPM: Convert printk() to pr_*() and add include
  PCI/ASPM: Remove unnecessary includes
  PCI/ASPM: Use FIELD_MAX() instead of literals
  PCI/ASPM: Use time constants
  PCI/ASPM: Return U32_MAX instead of bit magic construct
  PCI/ASPM: Use FIELD_GET/PREP() to access PCIe capability fields
  PCI: Add PCI_L1SS_CTL2 fields

Merge branch 'pci/aer'

- Factor out AER interrupt enable/disable (Kai-Heng Feng)

* pci/aer:
  PCI/AER: Factor out interrupt toggling into helpers

PCI: qcom-ep: Add dedicated callback for writing to DBI2 registers

The DWC core driver exposes the write_dbi2() callback for writing to the
DBI2 registers in a vendor-specific way.

On the Qcom EP platforms, the DBI_CS2 bit in the ELBI region needs to be
asserted before writing to any DBI2 registers and deasserted once done.

So, let's implement the callback for the Qcom PCIe EP driver so that the
DBI2 writes are correctly handled in the hardware.

Without this callback, the DBI2 register writes like BAR size won't go
through and as a result, the default BAR size is set for all BARs.

[kwilczynski: commit log, renamed function to match the DWC convention]
Fixes: f55fee56a631 ("PCI: qcom-ep: Add Qualcomm PCIe Endpoint controller driver")
Suggested-by: Serge Semin <fancer.lancer@gmail.com>
Link: https://lore.kernel.org/linux-pci/20231025130029.74693-2-manivannan.sadhasivam@linaro.org
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Signed-off-by: Krzysztof Wilczyński <kwilczynski@kernel.org>
Reviewed-by: Serge Semin <fancer.lancer@gmail.com>
Cc: stable@vger.kernel.org # 5.16+

PCI: xilinx-xdma: Add Xilinx XDMA Root Port driver

Add support for Xilinx XDMA Soft IP core as Root Port.

The Zynq UltraScale+ MPSoCs devices support XDMA soft IP module in
programmable logic.

The integrated XDMA Soft IP block has integrated bridge function that
can act as PCIe Root Port.

[kwilczynski: correct indentation and whitespaces, Kconfig help update]
Link: https://lore.kernel.org/linux-pci/20231003173453.938190-4-thippeswamy.havalige@amd.com
Signed-off-by: Thippeswamy Havalige <thippeswamy.havalige@amd.com>
Signed-off-by: Bharat Kumar Gogada <bharat.kumar.gogada@amd.com>
Signed-off-by: Krzysztof Wilczyński <kwilczynski@kernel.org>

dt-bindings: PCI: xilinx-xdma: Add schemas for Xilinx XDMA PCIe Root Port Bridge

Add YAML devicetree schemas for Xilinx XDMA Soft IP PCIe Root Port Bridge.

[kwilczynski: commit log]
Link: https://lore.kernel.org/linux-pci/20231003173453.938190-3-thippeswamy.havalige@amd.com
Signed-off-by: Thippeswamy Havalige <thippeswamy.havalige@amd.com>
Signed-off-by: Bharat Kumar Gogada <bharat.kumar.gogada@amd.com>
Signed-off-by: Krzysztof Wilczyński <kwilczynski@kernel.org>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Acked-by: Rob Herring <robh@kernel.org>

PCI: xilinx-cpm: Move IRQ definitions to a common header

Move the interrupt bit definitions to the pcie-xilinx-common.h file,
which then can be shared between pcie-xilinx-cpm and the new xilinx-xdma
drivers.

While at it, also rename them so these definitions are not CPM-specific.

No functional change intended.

[kwilczynski: commit log]
Link: https://lore.kernel.org/linux-pci/20231003173453.938190-2-thippeswamy.havalige@amd.com
Signed-off-by: Thippeswamy Havalige <thippeswamy.havalige@amd.com>
Signed-off-by: Bharat Kumar Gogada <bharat.kumar.gogada@amd.com>
Signed-off-by: Krzysztof Wilczyński <kwilczynski@kernel.org>

PCI: xilinx-nwl: Modify ECAM size to enable support for 256 buses

The PCIe Root Port controller expects ECAM size to be set through software.

As such, update the value of the NWL_ECAM_VALUE_DEFAULT macro to 16 to
allow the controller to address the 256 MB ECAM region and, as such,
enable support for detecting up to 256 buses.

[kwilczynski: commit log]
Link: https://patchwork.kernel.org/project/linux-pci/patch/20231016051102.1180432-5-thippeswamy.havalige@amd.com/
Signed-off-by: Thippeswamy Havalige <thippeswamy.havalige@amd.com>
Signed-off-by: Krzysztof Wilczyński <kwilczynski@kernel.org>

PCI: xilinx-nwl: Rename the NWL_ECAM_VALUE_DEFAULT macro

Rename the NWL_ECAM_VALUE_DEFAULT macro to NWL_ECAM_MAX_SIZE and drop
the no longer needed ecam_value variable from struct nwl_pcie.

[kwilczynski: commit log]
Link: https://lore.kernel.org/linux-pci/20231016051102.1180432-4-thippeswamy.havalige@amd.com
Signed-off-by: Thippeswamy Havalige <thippeswamy.havalige@amd.com>
Signed-off-by: Krzysztof Wilczyński <kwilczynski@kernel.org>

dt-bindings: PCI: xilinx-nwl: Modify ECAM size in the DT example

Update ECAM size in the devicetree example to allow for the discovery of
up to 256 buses.

[kwilczynski: commit log]
Link: https://lore.kernel.org/linux-pci/20231016051102.1180432-3-thippeswamy.havalige@amd.com
Signed-off-by: Thippeswamy Havalige <thippeswamy.havalige@amd.com>
Signed-off-by: Krzysztof Wilczyński <kwilczynski@kernel.org>
Acked-by: Rob Herring <robh@kernel.org>

PCI: xilinx-nwl: Remove redundant code that sets Type 1 header fields

The PCI core already updates the primary, secondary and subordinate bus
number registers fields of the Type 1 header.

Thus, remove the redundant code from the nwl_pcie_bridge_init().

[kwilczynski: commit log]
Link: https://lore.kernel.org/linux-pci/20231016051102.1180432-2-thippeswamy.havalige@amd.com
Signed-off-by: Thippeswamy Havalige <thippeswamy.havalige@amd.com>
Signed-off-by: Krzysztof Wilczyński <kwilczynski@kernel.org>

PCI: hotplug: Add Ampere Altra Attention Indicator extension driver

On Ampere Altra, PCIe hotplug is handled through ACPI. A side interface is
also present to request system firmware control of the hotplug Attention
Indicators. Add an ACPI PCI Hotplug companion driver to support Attention
Indicator control.

Link: https://lore.kernel.org/r/20230930002036.6491-2-scott@os.amperecomputing.com
Signed-off-by: D Scott Phillips <scott@os.amperecomputing.com>
[bhelgaas: mask domain to low 4 bits]
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Acked-by: "Rafael J. Wysocki" <rafael@kernel.org>

PCI/AER: Factor out interrupt toggling into helpers

There are many places that enable and disable AER interrupt, so move
them into helpers.

Link: https://lore.kernel.org/r/20230512000014.118942-1-kai.heng.feng@canonical.com
Signed-off-by: Kai-Heng Feng <kai.heng.feng@canonical.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Reviewed-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Reviewed-by: Kuppuswamy Sathyanarayanan <sathyanarayanan.kuppuswamy@linux.intel.com>
Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>

PCI: acpiphp: Allow built-in drivers for Attention Indicators

Since the introduction of the attention callback in acpiphp, a non-zero
struct module *owner has been required in acpiphp_register_attention(). The
intent seemed to be that the core code could hold a refcount on the module
while invoking a callback.

This check accidentally precludes the possibility of attention callbacks to
built-in drivers.

Remove the check on `struct module *owner` in acpiphp_register_attention()
so attention callbacks can also be registered from built-in drivers.

Link: https://lore.kernel.org/r/20230930002036.6491-1-scott@os.amperecomputing.com
Signed-off-by: D Scott Phillips <scott@os.amperecomputing.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>

PCI/portdrv: Use FIELD_GET()

Use FIELD_GET() to remove dependences on the field position, i.e., the
shift value.  No functional change intended.

Link: https://lore.kernel.org/r/20231010204436.1000644-11-helgaas@kernel.org
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Reviewed-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com>
Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Reviewed-by: Kuppuswamy Sathyanarayanan <sathyanarayanan.kuppuswamy@linux.intel.com>

PCI/VC: Use FIELD_GET()

Use FIELD_GET() to remove dependences on the field position, i.e., the
shift value.  No functional change intended.

Link: https://lore.kernel.org/r/20231010204436.1000644-10-helgaas@kernel.org
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Reviewed-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com>
Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Reviewed-by: Kuppuswamy Sathyanarayanan <sathyanarayanan.kuppuswamy@linux.intel.com>

PCI/PTM: Use FIELD_GET()

Use FIELD_GET() and FIELD_PREP() to remove dependences on the field
position, i.e., the shift value.  No functional change intended.

Link: https://lore.kernel.org/r/20231010204436.1000644-9-helgaas@kernel.org
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Reviewed-by: Kuppuswamy Sathyanarayanan <sathyanarayanan.kuppuswamy@linux.intel.com>

PCI/PME: Use FIELD_GET()

Use FIELD_GET() to remove dependences on the field position, i.e., the
shift value.  No functional change intended.

Link: https://lore.kernel.org/r/20231010204436.1000644-8-helgaas@kernel.org
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Reviewed-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com>
Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Reviewed-by: Kuppuswamy Sathyanarayanan <sathyanarayanan.kuppuswamy@linux.intel.com>

PCI/ATS: Use FIELD_GET()

Use FIELD_GET() to remove dependences on the field position, i.e., the
shift value.  No functional change intended.

Link: https://lore.kernel.org/r/20231010204436.1000644-6-helgaas@kernel.org
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Reviewed-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com>
Reviewed-by: Kuppuswamy Sathyanarayanan <sathyanarayanan.kuppuswamy@linux.intel.com>

PCI/ATS: Show PASID Capability register width in bitmasks

The PASID Capability and Control registers are both 16 bits wide.  Use
16-bit wide constants in field names to match the register width.  No
functional change intended.

Link: https://lore.kernel.org/r/20231010204436.1000644-5-helgaas@kernel.org
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Reviewed-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com>
Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Reviewed-by: Kuppuswamy Sathyanarayanan <sathyanarayanan.kuppuswamy@linux.intel.com>

PCI/ASPM: Fix L1 substate handling in aspm_attr_store_common()

aspm_attr_store_common(), which handles sysfs control of ASPM, has the same
problem as fb097dcd5a28 ("PCI/ASPM: Disable only ASPM_STATE_L1 when driver
disables L1"): disabling L1 adds only ASPM_L1 (but not any of the L1.x
substates) to the "aspm_disable" mask.

Enabling one substate, e.g., L1.1, via sysfs removes ASPM_L1 from the
disable mask.  Since disabling L1 via sysfs doesn't add any of the
substates to the disable mask, enabling L1.1 actually enables *all* the
substates.

In this scenario:

  - Write 0 to "l1_aspm" to disable L1
  - Write 1 to "l1_1_aspm" to enable L1.1

the intention is to disable L1 and all L1.x substates, then enable just
L1.1, but in fact, *all* L1.x substates are enabled.

Fix this by explicitly disabling all the L1.x substates when disabling L1.

Fixes: 72ea91afbfb0 ("PCI/ASPM: Add sysfs attributes for controlling ASPM link states")
Link: https://lore.kernel.org/r/6ba7dd79-9cfe-4ed0-a002-d99cb842f361@gmail.com
Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com>
[bhelgaas: commit log]
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Cc: stable@vger.kernel.org

Revert "PCI/ASPM: Disable only ASPM_STATE_L1 when driver, disables L1"

This reverts commit fb097dcd5a28c0a2325632405c76a66777a6bed9.

After fb097dcd5a28 ("PCI/ASPM: Disable only ASPM_STATE_L1 when driver
disables L1"), disabling L1 via pci_disable_link_state(PCIE_LINK_STATE_L1),
then enabling one substate, e.g., L1.1, via sysfs actually enables *all*
the substates.

For example, r8169 disables L1 because of hardware issues on a number of
systems, which implicitly disables the L1.1 and L1.2 substates.

On some systems, L1 and L1.1 work fine, but L1.2 causes missed rx packets.
Enabling L1.1 via the sysfs "aspm_l1_1" attribute unexpectedly enables L1.2
as well as L1.1.

After fb097dcd5a28, pci_disable_link_state(PCIE_LINK_STATE_L1) adds only
ASPM_L1 (but not any of the L1.x substates) to the "aspm_disable" mask:

  --- Before fb097dcd5a28
  +++ After fb097dcd5a28

  # r8169 disables L1:
    pci_disable_link_state(PCIE_LINK_STATE_L1)
  -   disable |= ASPM_L1 | ASPM_L1_1 | ASPM_L1_2 | ...  # disable L1, L1.x
  +   disable |= ASPM_L1                                # disable L1 only

  # write "1" to sysfs "aspm_l1_1" attribute:
    l1_1_aspm
      aspm_attr_store_common(state = ASPM_L1_1)
        disable &= ~ASPM_L1_1              # enable L1.1
        if (state & (ASPM_L1_1 | ...))     # if enabling any substate
          disable &= ~ASPM_L1              # enable L1

  # final state:
  - disable = ASPM_L1_2 | ...              # L1, L1.1 enabled; L1.2 disabled
  + disable = 0                            # L1, L1.1, L1.2 all enabled

Enabling an L1.x substate removes the substate and L1 from the
"aspm_disable" mask.  After fb097dcd5a28, the substates were not added to
the mask when disabling L1, so enabling one substate implicitly enables all
of them.

Revert fb097dcd5a28 so enabling one substate doesn't enable the others.

Link: https://lore.kernel.org/r/c75931ac-7208-4200-9ca1-821629cf5e28@gmail.com
Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com>
[bhelgaas: work through example in commit log]
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Cc: stable@vger.kernel.org

PCI: Use FIELD_GET() in Sapphire RX 5600 XT Pulse quirk

Use FIELD_GET() to remove dependences on the field position, i.e., the
shift value.  No functional change intended.

Separate because this isn't as trivial as the other FIELD_GET() changes.

See 907830b0fc9e ("PCI: Add a REBAR size quirk for Sapphire RX 5600 XT
Pulse")

Link: https://lore.kernel.org/r/20231010204436.1000644-3-helgaas@kernel.org
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Reviewed-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com>
Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Reviewed-by: Kuppuswamy Sathyanarayanan <sathyanarayanan.kuppuswamy@linux.intel.com>
Cc: Nirmoy Das <nirmoy.das@amd.com>

PCI: Use FIELD_GET()

Use FIELD_GET() and FIELD_PREP() to remove dependences on the field
position, i.e., the shift value.  No functional change intended.

Link: https://lore.kernel.org/r/20231010204436.1000644-2-helgaas@kernel.org
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Reviewed-by: Kuppuswamy Sathyanarayanan <sathyanarayanan.kuppuswamy@linux.intel.com>

PCI/MSI: Use FIELD_GET/PREP()

Instead of custom masking and shifting, use FIELD_GET/PREP() with
register fields.

Link: https://lore.kernel.org/r/20231018113254.17616-8-ilpo.jarvinen@linux.intel.com
Signed-off-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>

PCI/DPC: Use defines with DPC reason fields

Add new defines for DPC reason fields and use them instead of literals.

Link: https://lore.kernel.org/r/20231018113254.17616-7-ilpo.jarvinen@linux.intel.com
Signed-off-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com>
[bhelgaas: shorten comments]
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>

PCI/DPC: Use defined fields with DPC_CTL register

Instead of using a literal to clear bits, add PCI_EXP_DPC_CTL_EN_MASK
and use the usual pattern to modify a bitfield.

While at it, rearrange RMW code more logically together.

Link: https://lore.kernel.org/r/20231018113254.17616-6-ilpo.jarvinen@linux.intel.com
Signed-off-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>

PCI/DPC: Use FIELD_GET()

Use FIELD_GET() to remove dependencies on the field position, i.e., the
shift value. No functional change intended.

Link: https://lore.kernel.org/r/20231018113254.17616-5-ilpo.jarvinen@linux.intel.com
Signed-off-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>

PCI: hotplug: Use FIELD_GET/PREP()

Instead of handcrafted shifts to handle register fields, use
FIELD_GET/FIELD_PREP().

Link: https://lore.kernel.org/r/20231018113254.17616-4-ilpo.jarvinen@linux.intel.com
Signed-off-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>

PCI: dwc: Use FIELD_GET/PREP()

Convert open-coded variants of PCI field access into FIELD_GET/PREP()
to make the code easier to understand.

Add two missing defines into pci_regs.h. Logically, the Max No-Snoop
Latency Register is a separate word sized register in the PCIe spec,
but the pre-existing LTR defines in pci_regs.h with dword long values
seem to consider the registers together (the same goes for the only
user). Thus, follow the custom and make the new values also take both
word long LTR registers as a joint dword register.

Link: https://lore.kernel.org/r/20231024110336.26264-1-ilpo.jarvinen@linux.intel.com
Signed-off-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>

PCI/P2PDMA: Remove redundant goto

Remove redundant goto in pci_alloc_p2pmem().

Link: https://lore.kernel.org/r/20231023084050.55230-1-tstruk@gmail.com
Signed-off-by: Tadeusz Struk <tstruk@gmail.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Reviewed-by: Logan Gunthorpe <logang@deltatee.com>

misc: pci_endpoint_test: Add Device ID for R-Car S4-8 PCIe controller

Add Renesas R8A779F0 in pci_device_id table so that pci-epf-test
can be used for testing PCIe EP on R-Car S4-8.

Link: https://lore.kernel.org/linux-pci/20231018085631.1121289-16-yoshihiro.shimoda.uh@renesas.com
Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Signed-off-by: Krzysztof Wilczyński <kwilczynski@kernel.org>
Acked-by: Manivannan Sadhasivam <mani@kernel.org>

MAINTAINERS: Update PCI DRIVER FOR RENESAS R-CAR for R-Car Gen4

Update this entry for R-Car Gen4's source code.

Link: https://lore.kernel.org/linux-pci/20231018085631.1121289-15-yoshihiro.shimoda.uh@renesas.com
Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Signed-off-by: Krzysztof Wilczyński <kwilczynski@kernel.org>
Reviewed-by: Serge Semin <fancer.lancer@gmail.com>
Acked-by: Manivannan Sadhasivam <mani@kernel.org>

PCI: rcar-gen4: Add endpoint mode support

Add R-Car Gen4 PCIe controller for endpoint mode. This controller is based
on Synopsys DesignWare PCIe.

Link: https://lore.kernel.org/linux-pci/20231018085631.1121289-14-yoshihiro.shimoda.uh@renesas.com
Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Signed-off-by: Krzysztof Wilczyński <kwilczynski@kernel.org>
Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Reviewed-by: Serge Semin <fancer.lancer@gmail.com>

PCI: rcar-gen4: Add R-Car Gen4 PCIe controller support for host mode

Add R-Car Gen4 PCIe controller support for host mode.

This controller is based on Synopsys DesignWare PCIe. However, this
particular controller has a number of vendor-specific registers, and as
such, requires initialization code like mode setting and retraining and
so on.

Link: https://lore.kernel.org/linux-pci/20231018085631.1121289-13-yoshihiro.shimoda.uh@renesas.com
Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Signed-off-by: Krzysztof Wilczyński <kwilczynski@kernel.org>
Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Reviewed-by: Serge Semin <fancer.lancer@gmail.com>

dt-bindings: PCI: renesas: Add R-Car Gen4 PCIe Endpoint

Document bindings for Renesas R-Car Gen4 and R-Car S4-8 (R8A779F0)
PCIe endpoint module.

Link: https://lore.kernel.org/linux-pci/20231018085631.1121289-12-yoshihiro.shimoda.uh@renesas.com
Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Signed-off-by: Krzysztof Wilczyński <kwilczynski@kernel.org>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Rob Herring <robh@kernel.org>
Reviewed-by: Serge Semin <fancer.lancer@gmail.com>
Acked-by: Conor Dooley <conor.dooley@microchip.com>
Acked-by: Manivannan Sadhasivam <mani@kernel.org>

dt-bindings: PCI: renesas: Add R-Car Gen4 PCIe Host

Document bindings for Renesas R-Car Gen4 and R-Car S4-8 (R8A779F0)
PCIe host module.

Link: https://lore.kernel.org/linux-pci/20231018085631.1121289-11-yoshihiro.shimoda.uh@renesas.com
Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Signed-off-by: Krzysztof Wilczyński <kwilczynski@kernel.org>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Rob Herring <robh@kernel.org>
Reviewed-by: Serge Semin <fancer.lancer@gmail.com>
Acked-by: Conor Dooley <conor.dooley@microchip.com>

dt-bindings: PCI: dwc: Update maxItems of reg and reg-names

Update maxItems of reg and reg-names on both host and endpoint
for supporting Renesas R-Car Gen4 PCIe controllers later.

Link: https://lore.kernel.org/linux-pci/20231018085631.1121289-10-yoshihiro.shimoda.uh@renesas.com
Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Signed-off-by: Krzysztof Wilczyński <kwilczynski@kernel.org>
Reviewed-by: Serge Semin <fancer.lancer@gmail.com>
Acked-by: Conor Dooley <conor.dooley@microchip.com>
Acked-by: Manivannan Sadhasivam <mani@kernel.org>
Acked-by: Rob Herring <robh@kernel.org>

PCI: dwc: endpoint: Introduce .pre_init() and .deinit()

Renesas R-Car Gen4 PCIe controllers require vendor-specific
initialization before .init().

To use dw->dbi and dw->num-lanes in the initialization code,
introduce .pre_init() into struct dw_pcie_ep_ops. While at it,
also introduce .deinit() to disable the controller by using
vendor-specific de-initialization.

Note that the ep_init in the struct dw_pcie_ep_ops should be
renamed to init later.

Link: https://lore.kernel.org/linux-pci/20231018085631.1121289-9-yoshihiro.shimoda.uh@renesas.com
Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Signed-off-by: Krzysztof Wilczyński <kwilczynski@kernel.org>
Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Reviewed-by: Serge Semin <fancer.lancer@gmail.com>

PCI: dwc: Expose dw_pcie_write_dbi2() to module

Since no PCIe controller drivers call this, this change is not required
for now. But, Renesas R-Car Gen4 PCIe controller driver will call this
and if the controller driver is built as a kernel module, the following
build error happens:

  ERROR: modpost: "dw_pcie_write_dbi2" [drivers/pci/controller/dwc/pcie-rcar-gen4-host-drv.ko] undefined!

So, expose dw_pcie_write_dbi2() for it.

Link: https://lore.kernel.org/linux-pci/20230926122431.3974714-8-yoshihiro.shimoda.uh@renesas.com
Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Signed-off-by: Krzysztof Wilczyński <kwilczynski@kernel.org>
Reviewed-by: Serge Semin <fancer.lancer@gmail.com>

PCI: dwc: Expose dw_pcie_ep_exit() to module

Since no PCIe controller drivers call this, this change is not required
for now. But, Renesas R-Car Gen4 PCIe controller driver will call this
and if the controller driver is built as a kernel module, the following
build error happens:

  ERROR: modpost: "dw_pcie_ep_exit" [drivers/pci/controller/dwc/pcie-rcar-gen4-ep-drv.ko] undefined!

So, expose dw_pcie_ep_exit() for it.

Link: https://lore.kernel.org/linux-pci/20231018085631.1121289-8-yoshihiro.shimoda.uh@renesas.com
Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Signed-off-by: Krzysztof Wilczyński <kwilczynski@kernel.org>
Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Reviewed-by: Serge Semin <fancer.lancer@gmail.com>

PCI: dwc: Add EDMA_UNROLL capability flag

Renesas R-Car Gen4 PCIe controllers have an unexpected register value in
the eDMA CTRL register.

So, add a new capability flag "EDMA_UNROLL" which would force the unrolled
eDMA mapping for the problematic device.

Suggested-by: Serge Semin <fancer.lancer@gmail.com>
Link: https://lore.kernel.org/linux-pci/20231018085631.1121289-7-yoshihiro.shimoda.uh@renesas.com
Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Signed-off-by: Krzysztof Wilczyński <kwilczynski@kernel.org>
Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Reviewed-by: Serge Semin <fancer.lancer@gmail.com>

PCI: dwc: endpoint: Add multiple PFs support for dbi2

The commit 24ede430fa49 ("PCI: designware-ep: Add multiple PFs support
for DWC") added .func_conf_select() to get the configuration space of
different PFs and assumed that the offsets between dbi and dbi2 would
be the same.

However, Renesas R-Car Gen4 PCIe controllers have different offsets of
function 1: dbi (+0x1000) and dbi2 (+0x800). To get the offset for dbi2,
add .get_dbi2_offset() and dw_pcie_ep_get_dbi2_offset().

Note:
 - .func_conf_select() should be renamed later.
 - dw_pcie_ep_get_dbi2_offset() will call .func_conf_select()
   if .get_dbi2_offset() doesn't exist for backward compatibility.
 - dw_pcie_writeX_{dbi/dbi2} APIs accepted the func_no argument,
   so that these offset calculations are contained in the API
   definitions itself as it should.

Link: https://lore.kernel.org/linux-pci/20231018085631.1121289-6-yoshihiro.shimoda.uh@renesas.com
Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Signed-off-by: Krzysztof Wilczyński <kwilczynski@kernel.org>
Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>

PCI: tegra194: Drop PCI_EXP_LNKSTA_NLW setting

dw_pcie_setup() is already setting PCI_EXP_LNKCAP_MLW to pcie->num_lanes
in the PCI_EXP_LNKCAP register for programming maximum link width.

Hence, remove the redundant setting here.

Link: https://lore.kernel.org/linux-pci/20231018085631.1121289-5-yoshihiro.shimoda.uh@renesas.com
Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Signed-off-by: Krzysztof Wilczyński <kwilczynski@kernel.org>
Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Reviewed-by: Serge Semin <fancer.lancer@gmail.com>
Cc: Thierry Reding <thierry.reding@gmail.com>
Cc: Jonathan Hunter <jonathanh@nvidia.com>

PCI: dwc: Add missing PCI_EXP_LNKCAP_MLW handling

Update dw_pcie_link_set_max_link_width() to set PCI_EXP_LNKCAP_MLW.

In accordance with the DW PCIe RC/EP HW manuals [1,2,3,...] aside with
the PORT_LINK_CTRL_OFF.LINK_CAPABLE and GEN2_CTRL_OFF.NUM_OF_LANES[8:0]
field there is another one which needs to be updated.

It's LINK_CAPABILITIES_REG.PCIE_CAP_MAX_LINK_WIDTH. If it isn't done at
the very least the maximum link-width capability CSR won't expose the
actual maximum capability.

[1] DesignWare Cores PCI Express Controller Databook - DWC PCIe Root Port,
    Version 4.60a, March 2015, p.1032
[2] DesignWare Cores PCI Express Controller Databook - DWC PCIe Root Port,
    Version 4.70a, March 2016, p.1065
[3] DesignWare Cores PCI Express Controller Databook - DWC PCIe Root Port,
    Version 4.90a, March 2016, p.1057
...
[X] DesignWare Cores PCI Express Controller Databook - DWC PCIe Endpoint,
      Version 5.40a, March 2019, p.1396
[X+1] DesignWare Cores PCI Express Controller Databook - DWC PCIe Root Port,
      Version 5.40a, March 2019, p.1266

Suggested-by: Serge Semin <fancer.lancer@gmail.com>
Link: https://lore.kernel.org/linux-pci/20231018085631.1121289-4-yoshihiro.shimoda.uh@renesas.com
Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Signed-off-by: Krzysztof Wilczyński <kwilczynski@kernel.org>
Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Reviewed-by: Serge Semin <fancer.lancer@gmail.com>

PCI: dwc: Add dw_pcie_link_set_max_link_width()

This is a preparation before adding the Max-Link-width capability
setup which would in its turn complete the max-link-width setup
procedure defined by Synopsys in the HW-manual.

Seeing there is a max-link-speed setup method defined in the DW PCIe
core driver it would be good to have a similar function for the link
width setup.

That's why we need to define a dedicated function first from already
implemented but incomplete link-width setting up code.

Link: https://lore.kernel.org/linux-pci/20231018085631.1121289-3-yoshihiro.shimoda.uh@renesas.com
Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Signed-off-by: Krzysztof Wilczyński <kwilczynski@kernel.org>
Reviewed-by: Manivannan Sadhasivam <mani@kernel.org>
Reviewed-by: Serge Semin <fancer.lancer@gmail.com>

PCI: Add T_PVPERL macro

According to the PCIe CEM r5.0, sec 2.9.2, Power stable to PERST#
inactive interval is 100 ms as minimum. Add a macro so that the PCIe
controller drivers can make use of it.

Link: https://lore.kernel.org/linux-pci/20231018085631.1121289-2-yoshihiro.shimoda.uh@renesas.com
Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Signed-off-by: Krzysztof Wilczyński <kwilczynski@kernel.org>
Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Reviewed-by: Serge Semin <fancer.lancer@gmail.com>

PCI: Disable ATS for specific Intel IPU E2000 devices

Due to a hardware issue in A and B steppings of Intel IPU E2000, it expects
wrong endianness in ATS invalidation message body. This problem can lead to
outdated translations being returned as valid and finally cause system
instability.

To prevent such issues, add quirk_intel_e2000_no_ats() to disable ATS for
vulnerable IPU E2000 devices.

Link: https://lore.kernel.org/r/20230908143606.685930-3-bartosz.pawlowski@intel.com
Signed-off-by: Bartosz Pawlowski <bartosz.pawlowski@intel.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Alexander Lobakin <aleksander.lobakin@intel.com>

PCI: Extract ATS disabling to a helper function

Introduce quirk_no_ats() helper function to provide a standard way to
disable ATS capability in PCI quirks.

Suggested-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Link: https://lore.kernel.org/r/20230908143606.685930-2-bartosz.pawlowski@intel.com
Signed-off-by: Bartosz Pawlowski <bartosz.pawlowski@intel.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>

PCI: cadence: Use FIELD_GET()

Convert open-coded variants of PCI field access into FIELD_GET() to
make the code easier to understand.

Link: https://lore.kernel.org/r/20231018113254.17616-2-ilpo.jarvinen@linux.intel.com
Signed-off-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>

PCI: Use FIELD_GET() to extract Link Width

Use FIELD_GET() to extract PCIe Negotiated and Maximum Link Width fields
instead of custom masking and shifting.

Link: https://lore.kernel.org/r/20230919125648.1920-7-ilpo.jarvinen@linux.intel.com
Signed-off-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com>
[bhelgaas: drop duplicate include of <linux/bitfield.h>]
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>

PCI: hv: Annotate struct hv_dr_state with __counted_by

Prepare for the coming implementation by GCC and Clang of the __counted_by
attribute. Flexible array members annotated with __counted_by can have
their accesses bounds-checked at run-time checking via CONFIG_UBSAN_BOUNDS
(for array indexing) and CONFIG_FORTIFY_SOURCE (for strcpy/memcpy-family
functions).

As found with Coccinelle[1], add __counted_by for struct hv_dr_state.

[1] https://github.com/kees/kernel-tools/blob/trunk/coccinelle/examples/counted_by.cocci

Link: https://lore.kernel.org/linux-pci/20230922175257.work.900-kees@kernel.org
Signed-off-by: Kees Cook <keescook@chromium.org>
Signed-off-by: Krzysztof Wilczyński <kwilczynski@kernel.org>
Reviewed-by: "Gustavo A. R. Silva" <gustavoars@kernel.org>
Acked-by: Wei Liu <wei.liu@kernel.org>
Cc: Bjorn Helgaas <bhelgaas@google.com>
Cc: Dexuan Cui <decui@microsoft.com>
Cc: Haiyang Zhang <haiyangz@microsoft.com>
Cc: "K. Y. Srinivasan" <kys@microsoft.com>
Cc: Krzysztof Wilczyński <kw@linux.com>
Cc: Lorenzo Pieralisi <lpieralisi@kernel.org>
Cc: Rob Herring <robh@kernel.org>
Cc: Wei Liu <wei.liu@kernel.org>
Cc: linux-hyperv@vger.kernel.org
Cc: linux-pci@vger.kernel.org

PCI: qcom: Enable ASPM for platforms supporting 1.9.0 ops

ASPM is supported by Qcom host controllers/bridges on most of the recent
platforms and so the devices tested so far. But for enabling ASPM by
default (without using Kconfig, kernel command-line or sysfs), BIOS has
to enable ASPM on both host bridge and downstream devices during boot.

Unfortunately, none of the BIOS available on Qcom platforms enables
ASPM. Due to this, the platforms making use of Qcom SoCs draw high power
during runtime.

To fix this power draw issue, users have to enable ASPM using Kconfig,
kernel command-line, sysfs or the BIOS has to start enabling ASPM.

The latter may happen in the future, but that won't address the issue on
current platforms. Also, asking users to enable a feature to get the power
management right would provide an unpleasant out-of-the-box experience.

So the apt solution is to enable ASPM in the controller driver itself. And
this is being accomplished by calling pci_enable_link_state() in the newly
introduced host_post_init() callback for all the devices connected to the
bus. This function enables all supported link low power states for both
host bridge and the downstream devices.

Due to limited testing, ASPM is only enabled for platforms making use of
ops_1_9_0 callbacks.

[kwilczynski: commit log]
Link: https://lore.kernel.org/linux-pci/20231010155914.9516-3-manivannan.sadhasivam@linaro.org
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Signed-off-by: Krzysztof Wilczyński <kwilczynski@kernel.org>

PCI: dwc: Add host_post_init() callback

This callback can be used by the platform drivers to do configuration
once all the devices are scanned. Like changing LNKCTL of all downstream
devices to enable ASPM etc...

Link: https://lore.kernel.org/linux-pci/20231010155914.9516-2-manivannan.sadhasivam@linaro.org
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Signed-off-by: Krzysztof Wilczyński <kwilczynski@kernel.org>

PCI: tegra194: Use Mbps_to_icc() macro for setting icc speed

PCIe speed returned by the PCIE_SPEED2MBS_ENC() macro is in Mbps. So
instead of converting it to MBps explicitly and using the MBps_to_icc()
macro, let's use the Mbps_to_icc() macro to pass the value directly.

Link: https://lore.kernel.org/linux-pci/20231004164430.39662-3-manivannan.sadhasivam@linaro.org
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Signed-off-by: Krzysztof Wilczyński <kwilczynski@kernel.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Cc: Vidya Sagar <vidyas@nvidia.com>

PCI: qcom-ep: Use PCIE_SPEED2MBS_ENC() macro for encoding link speed

Instead of hardcoding the link speed in MBps, use existing
PCIE_SPEED2MBS_ENC() macro that does the encoding of the link speed for
us. Also, let's Wrap it with QCOM_PCIE_LINK_SPEED_TO_BW() macro to do
the conversion to ICC speed.

This eliminates the need for a switch case in qcom_pcie_icc_update() and
also works for future Gen speeds without any code modifications.

Suggested-by: Bjorn Helgaas <bhelgaas@google.com>
Link: https://lore.kernel.org/linux-pci/20231004164430.39662-2-manivannan.sadhasivam@linaro.org
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Signed-off-by: Krzysztof Wilczyński <kwilczynski@kernel.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>

PCI: qcom: Use PCIE_SPEED2MBS_ENC() macro for encoding link speed

Instead of hardcoding the link speed in MBps, use existing
PCIE_SPEED2MBS_ENC() macro that does the encoding of the link speed for
us. Also, let's Wrap it with QCOM_PCIE_LINK_SPEED_TO_BW() macro to do
the conversion to ICC speed.

This eliminates the need for a switch case in qcom_pcie_icc_update() and
also works for future Gen speeds without any code modifications.

Suggested-by: Bjorn Helgaas <bhelgaas@google.com>
Link: https://lore.kernel.org/linux-pci/20231004164430.39662-1-manivannan.sadhasivam@linaro.org
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Signed-off-by: Krzysztof Wilczyński <kwilczynski@kernel.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>

scsi: ipr: Do PCI error checks on own line

Instead of "if" conditions with line splits, use the usual error handling
pattern with a separate variable to improve readability.

No functional changes intended.

Link: https://lore.kernel.org/r/20230911125354.25501-7-ilpo.jarvinen@linux.intel.com
Signed-off-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Reviewed-by: "Martin K. Petersen" <martin.petersen@oracle.com>

PCI: xgene: Do PCI error check on own line & keep return value

Instead of an "if" condition with a line split, use the usual error
handling pattern with a separate variable to improve readability.

pci_generic_config_read32() already returns either PCIBIOS_SUCCESSFUL or
PCIBIOS_DEVICE_NOT_FOUND so it is enough to simply return its return value
when ret != PCIBIOS_SUCCESSFUL.

No functional changes intended.

Link: https://lore.kernel.org/r/20230911125354.25501-6-ilpo.jarvinen@linux.intel.com
Signed-off-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>

PCI: Do error check on own line to split long "if" conditions

Placing PCI error code check inside "if" condition usually results in need
to split lines. Combined with additional conditions the "if" condition
becomes messy.

Convert to the usual error handling pattern with an additional variable to
improve code readability. In addition, reverse the logic in
pci_find_vsec_capability() to get rid of &&.

No functional changes intended.

Link: https://lore.kernel.org/r/20230911125354.25501-5-ilpo.jarvinen@linux.intel.com
Signed-off-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com>
[bhelgaas: PCI_POSSIBLE_ERROR()]
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>

atm: iphase: Do PCI error checks on own line

In get_esi() PCI errors are checked inside line-split "if" conditions (in
addition to the file not following the coding style). To make the code in
get_esi() more readable, fix the coding style and use the usual error
handling pattern with a separate variable.

In addition, initialization of 'error' variable at declaration is not
needed.

No functional changes intended.

Link: https://lore.kernel.org/r/20230911125354.25501-4-ilpo.jarvinen@linux.intel.com
Signed-off-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>

sh: pci: Do PCI error check on own line

Instead of an "if" condition with a line split, use the usual error
handling pattern with a separate variable to improve readability.

No functional changes intended.

Link: https://lore.kernel.org/r/20230911125354.25501-3-ilpo.jarvinen@linux.intel.com
Signed-off-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com>
[bhelgaas: u16 vid, PCI_POSSIBLE_ERROR()]
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Acked-by: John Paul Adrian Glaubitz <glaubitz@physik.fu-berlin.de>

alpha: Streamline convoluted PCI error handling

miata_map_irq() handles PCI device and read config related errors in a
conditional block that is more complex than necessary.

Streamline the code flow and error handling.

No functional changes intended.

Link: https://lore.kernel.org/r/20230911125354.25501-2-ilpo.jarvinen@linux.intel.com
Signed-off-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>

PCI/ASPM: Convert printk() to pr_*() and add include

Convert printk(KERN_INFO ...) to pr_info() and add the correct include
for it.

Link: https://lore.kernel.org/r/20230915155752.84640-8-ilpo.jarvinen@linux.intel.com
Signed-off-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>

PCI/ASPM: Remove unnecessary includes

aspm.c does not use anything from delay.h nor jiffies.h so remove the
includes.

Link: https://lore.kernel.org/r/20230915155752.84640-7-ilpo.jarvinen@linux.intel.com
Signed-off-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>

PCI/ASPM: Use FIELD_MAX() instead of literals

Convert 0x3ff literals in encode_l12_threshold() to
FIELD_MAX(PCI_L1SS_CTL1_LTR_L12_TH_VALUE) that explains the purpose of
the literal.

Link: https://lore.kernel.org/r/20230915155752.84640-6-ilpo.jarvinen@linux.intel.com
Signed-off-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>

PCI/ASPM: Use time constants

Use defined constants to convert between time units.

Link: https://lore.kernel.org/r/20230915155752.84640-5-ilpo.jarvinen@linux.intel.com
Signed-off-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>

PCI/ASPM: Return U32_MAX instead of bit magic construct

Instead of returning a bit obscure -1U, make code's intent of returning
the maximum representable value more obvious by returning U32_MAX.

Link: https://lore.kernel.org/r/20230915155752.84640-4-ilpo.jarvinen@linux.intel.com
Signed-off-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>

PCI/ASPM: Use FIELD_GET/PREP() to access PCIe capability fields

Replace open-coded variants to access PCIe capability registers fields
with FIELD_GET/PREP().

Link: https://lore.kernel.org/r/20230915155752.84640-3-ilpo.jarvinen@linux.intel.com
Signed-off-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>

PCI: Add PCI_L1SS_CTL2 fields

Add L1 PM Substates Control 2 Register fields (PCI_L1SS_CTL2_*).

Link: https://lore.kernel.org/r/20230915155752.84640-2-ilpo.jarvinen@linux.intel.com
Signed-off-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>

PCI: mvebu: Use FIELD_PREP() with Link Width

mvebu_pcie_setup_hw() setups the Maximum Link Width field in the Link
Capabilities registers using an open-coded variant of FIELD_PREP() with
a literal in shift. Improve readability by using
FIELD_PREP(PCI_EXP_LNKCAP_MLW, ...).

Link: https://lore.kernel.org/r/20230919125648.1920-6-ilpo.jarvinen@linux.intel.com
Signed-off-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>

PCI: tegra194: Use FIELD_GET()/FIELD_PREP() with Link Width fields

Use FIELD_GET() to extract PCIe Negotiated Link Width field instead of
custom masking and shifting.

Similarly, change custom code that misleadingly used
PCI_EXP_LNKSTA_NLW_SHIFT to prepare value for PCI_EXP_LNKCAP write
to use FIELD_PREP() with correct field define (PCI_EXP_LNKCAP_MLW).

Link: https://lore.kernel.org/r/20230919125648.1920-5-ilpo.jarvinen@linux.intel.com
Signed-off-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>

PCI: keystone: Don't discard .probe() callback

The __init annotation makes the ks_pcie_probe() function disappear after
booting completes. However a device can also be bound later. In that case,
we try to call ks_pcie_probe(), but the backing memory is likely already
overwritten.

The right thing to do is do always have the probe callback available.  Note
that the (wrong) __refdata annotation prevented this issue to be noticed by
modpost.

Fixes: 0c4ffcfe1fbc ("PCI: keystone: Add TI Keystone PCIe driver")
Link: https://lore.kernel.org/r/20231001170254.2506508-5-u.kleine-koenig@pengutronix.de
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Cc: stable@vger.kernel.org

PCI: keystone: Don't discard .remove() callback

With CONFIG_PCIE_KEYSTONE=y and ks_pcie_remove() marked with __exit, the
function is discarded from the driver. In this case a bound device can
still get unbound, e.g via sysfs. Then no cleanup code is run resulting in
resource leaks or worse.

The right thing to do is do always have the remove callback available.
Note that this driver cannot be compiled as a module, so ks_pcie_remove()
was always discarded before this change and modpost couldn't warn about
this issue. Furthermore the __ref annotation also prevents a warning.

Fixes: 0c4ffcfe1fbc ("PCI: keystone: Add TI Keystone PCIe driver")
Link: https://lore.kernel.org/r/20231001170254.2506508-4-u.kleine-koenig@pengutronix.de
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Cc: stable@vger.kernel.org

PCI: kirin: Don't discard .remove() callback

With CONFIG_PCIE_KIRIN=y and kirin_pcie_remove() marked with __exit, the
function is discarded from the driver. In this case a bound device can
still get unbound, e.g via sysfs. Then no cleanup code is run resulting in
resource leaks or worse.

The right thing to do is do always have the remove callback available.
This fixes the following warning by modpost:

  drivers/pci/controller/dwc/pcie-kirin: section mismatch in reference: kirin_pcie_driver+0x8 (section: .data) -> kirin_pcie_remove (section: .exit.text)

(with ARCH=x86_64 W=1 allmodconfig).

Fixes: 000f60db784b ("PCI: kirin: Add support for a PHY layer")
Link: https://lore.kernel.org/r/20231001170254.2506508-3-u.kleine-koenig@pengutronix.de
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Cc: stable@vger.kernel.org

PCI: exynos: Don't discard .remove() callback

With CONFIG_PCI_EXYNOS=y and exynos_pcie_remove() marked with __exit, the
function is discarded from the driver. In this case a bound device can
still get unbound, e.g via sysfs. Then no cleanup code is run resulting in
resource leaks or worse.

The right thing to do is do always have the remove callback available.
This fixes the following warning by modpost:

  WARNING: modpost: drivers/pci/controller/dwc/pci-exynos: section mismatch in reference: exynos_pcie_driver+0x8 (section: .data) -> exynos_pcie_remove (section: .exit.text)

(with ARCH=x86_64 W=1 allmodconfig).

Fixes: 340cba6092c2 ("pci: Add PCIe driver for Samsung Exynos")
Link: https://lore.kernel.org/r/20231001170254.2506508-2-u.kleine-koenig@pengutronix.de
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Reviewed-by: Alim Akhtar <alim.akhtar@samsung.com>
Cc: stable@vger.kernel.org

PCI: layerscape-ep: Set 64-bit DMA mask

Set DMA mask and coherent DMA mask to enable 64-bit addressing.

Link: https://lore.kernel.org/r/20230926140445.3855365-1-Frank.Li@nxp.com
Signed-off-by: Guanhua Gao <guanhua.gao@nxp.com>
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Signed-off-by: Frank Li <Frank.Li@nxp.com>
Signed-off-by: Lorenzo Pieralisi <lpieralisi@kernel.org>
Reviewed-by: Christoph Hellwig <hch@lst.de>
Acked-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Acked-by: Roy Zang <Roy.Zang@nxp.com>

drm/qxl: Use pci_is_vga() to identify VGA devices

Use pci_is_vga() to identify VGA devices instead of a private is_vga()
function.

This means qxl will use the VGA arbiter for old PCI_CLASS_NOT_DEFINED_VGA
(0x0001) devices as well as the PCI_CLASS_DISPLAY_VGA (0x0300) devices it
recognized previously.

This probably doesn't make a difference because qxl_pci_driver doesn't
claim PCI_CLASS_NOT_DEFINED_VGA devices by default, so it's mainly a code
simplification.

Link: https://lore.kernel.org/r/20230830111532.444535-6-sui.jingfeng@linux.dev
Signed-off-by: Sui Jingfeng <suijingfeng@loongson.cn>
[bhelgaas: commit log]
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Cc: Dave Airlie <airlied@redhat.com>
Cc: Gerd Hoffmann <kraxel@redhat.com>
Cc: David Airlie <airlied@gmail.com>
Cc: Daniel Vetter <daniel@ffwll.ch>

drm/virtio: Use pci_is_vga() to identify VGA devices

Use pci_is_vga() to identify VGA devices instead of open-coding the class
test.

This means virtio_gpu_pci_quirk() will apply to old
PCI_CLASS_NOT_DEFINED_VGA (0x0001) devices as well as the
PCI_CLASS_DISPLAY_VGA (0x0300) devices it did previously.

Link: https://lore.kernel.org/r/20230830111532.444535-5-sui.jingfeng@linux.dev
Signed-off-by: Sui Jingfeng <suijingfeng@loongson.cn>
[bhelgaas: commit log]
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Cc: David Airlie <airlied@redhat.com>
Cc: Gerd Hoffmann <kraxel@redhat.com>
Cc: Gurchetan Singh <gurchetansingh@chromium.org>
Cc: Chia-I Wu <olvaffe@gmail.com>
Cc: Daniel Vetter <daniel@ffwll.ch>

PCI/sysfs: Enable 'boot_vga' attribute via pci_is_vga()

Enable the 'boot_vga' sysfs attribute via pci_is_vga().

This exposes 'boot_vga' for old PCI_CLASS_NOT_DEFINED_VGA (0x0001) devices
as well as for the PCI_CLASS_DISPLAY_VGA (0x0300) devices where it was
previously exposed.

Link: https://lore.kernel.org/r/20230830111532.444535-4-sui.jingfeng@linux.dev
Signed-off-by: Sui Jingfeng <suijingfeng@loongson.cn>
[bhelgaas: commit log]
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Cc: "Maciej W. Rozycki" <macro@orcam.me.uk>

PCI/VGA: Select VGA devices earlier

Select VGA devices in vga_arb_device_init() and pci_notify() instead of in
vga_arbiter_add_pci_device().

This is a trivial optimization for adding devices.  It's a bigger
optimization for the removal case because pci_notify() won't call
vga_arbiter_del_pci_device() for non-VGA devices, so it won't have to
search the vga_list for them.

https://lore.kernel.org/r/20230830111532.444535-3-sui.jingfeng@linux.dev
Signed-off-by: Sui Jingfeng <suijingfeng@loongson.cn>
[bhelgaas: commit log, split from functional change]
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>