Arnd Bergmann [Thu, 1 Apr 2021 20:05:57 +0000 (22:05 +0200)]
Merge tag 'v5.12-next-dts64' of git://git./linux/kernel/git/matthias.bgg/linux into arm/dt
- add trivial bindings for MT8195
- fix dtbs_check warnings
- add pinmux for build-in Wifi on MT7622 evaluation borad
MT8183:
- fix USB wakeup register
- add regulator for EVB board
- add registers to mailbox consumers
- add thermal zone and trip points for CPU cooling
- Add new boards:
* ASUS Chromebook Flip CM3
* ASUS Chromebook Detachable CM3
* Acer Chromebook Spin 311
* Lenovo 10e Chromebook Tablet
MT8173:
- fix PHY property in DSI
- fix power-domain for PMIC wrapper
Pumkin:
- add MT8516 based board
- add MT8183 based board
- fix reset pin for MT8167 and MT8516 based boards
* tag 'v5.12-next-dts64' of git://git.kernel.org/pub/scm/linux/kernel/git/matthias.bgg/linux: (29 commits)
arm64: dts: mediatek: fix reset GPIO level on pumpkin
arm64: dts: mt8183: add mt8183 pumpkin board
dt-bindings: arm64: dts: mediatek: Add mt8183-pumpkin board
arm64: dts: mt8183: Add kukui kodama board
arm64: dts: mt8183: Add kukui kakadu board
dt-bindings: arm64: dts: mediatek: Add mt8183-kukui-kodama
dt-bindings: arm64: dts: mediatek: Add mt8183-kukui-kakadu
dt-bindings: arm64: dts: mediatek: Add mt8516-pumpkin board
arm64: dts: mt7622: add ePA/eLNA pinmux for built-in WiFi
dt-bindings: nvmem: mediatek: add support for MediaTek mt8192 SoC
arm64: dts: mt8173: fix wrong power-domain phandle of pmic
arm64: dts: mt8183: Configure CPU cooling
arm64: dts: mt8183: add thermal zone node
arm64: dts: mt8183: Add gce client reg for display subcomponents
arm64: dts: mediatek: mt8183: fix dtbs_check warning
arm64: dts: mediatek: mt7622: harmonize node names and compatibles
arm64: dts: mediatek: mt8516: harmonize node names and compatibles
arm64: dts: mediatek: mt2712: harmonize node names
arm64: dts: mediatek: mt8173: fix dtbs_check warning
arm64: dts: mt8173: fix property typo of 'phys' in dsi node
...
Link: https://lore.kernel.org/r/d1121630-5778-0955-fac7-f921174defe7@gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Arnd Bergmann [Thu, 1 Apr 2021 20:04:55 +0000 (22:04 +0200)]
Merge tag 'v5.12-next-dts32' of git://git./linux/kernel/git/matthias.bgg/linux into arm/dt
- fix dtbs_check warnings
- enable SMP for mt6589
* tag 'v5.12-next-dts32' of git://git.kernel.org/pub/scm/linux/kernel/git/matthias.bgg/linux:
arm: mediatek: dts: activate SMP for mt6589
arm: dts: mt2701: harmonize node names and compatibles
arm: dts: mt7623: harmonize node names and compatibles
arm: dts: mt7629: harmonize node names and compatibles
Link: https://lore.kernel.org/r/be262120-6cd9-87a7-ccc3-f5c403cff66b@gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Arnd Bergmann [Thu, 1 Apr 2021 20:02:59 +0000 (22:02 +0200)]
Merge tag 'tegra-for-5.13-arm64-dt' of git://git./linux/kernel/git/tegra/linux into arm/dt
arm64: tegra: Device tree fixes for v5.12-rc6
This contains a couple of device tree fixes for the v5.12 release cycle.
These are needed for proper audio support on Jetson AGX Xavier, to boot
the Jetson Xavier NX from an SD card and to be able to suspend/resume
the Jetson TX2.
* tag 'tegra-for-5.13-arm64-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
arm64: tegra: Move clocks from RT5658 endpoint to device node
arm64: tegra: Fix mmc0 alias for Jetson Xavier NX
arm64: tegra: Set fw_devlink=on for Jetson TX2
arm64: tegra: Add unit-address for ACONNECT on Tegra186
Link: https://lore.kernel.org/r/20210401172622.3352990-5-thierry.reding@gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Arnd Bergmann [Thu, 1 Apr 2021 20:01:53 +0000 (22:01 +0200)]
Merge tag 'tegra-for-5.13-arm-dt' of git://git./linux/kernel/git/tegra/linux into arm/dt
ARM: tegra: Device tree changes for v5.13-rc1
This contains a couple of improvements and fixes for various 32-bit
Tegra-based boards.
* tag 'tegra-for-5.13-arm-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
ARM: tegra: acer-a500: Add atmel,wakeup-method property
ARM: tegra: Specify tps65911 as wakeup source
ARM: tegra: Specify memory suspend OPP in device-tree
ARM: tegra: Specify CPU suspend OPP in device-tree
ARM: tegra: ouya: Specify all CPU cores as cooling devices
ARM: tegra: nexus7: Specify all CPU cores as cooling devices
ARM: tegra: acer-a500: Rename avdd to vdda of touchscreen node
ARM: tegra: acer-a500: Specify all CPU cores as cooling devices
ARM: tegra: acer-a500: Reduce thermal throttling hysteresis to 0.2C
ARM: tegra: acer-a500: Enable core voltage scaling
ARM: tegra: paz00: Enable full voltage scaling ranges for CPU and Core domains
ARM: tegra: cardhu: Support CPU thermal throttling
ARM: tegra: cardhu: Support CPU frequency and voltage scaling on all board variants
ARM: tegra: ventana: Support CPU thermal throttling
ARM: tegra: ventana: Support CPU and Core voltage scaling
Link: https://lore.kernel.org/r/20210401172622.3352990-4-thierry.reding@gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Arnd Bergmann [Thu, 1 Apr 2021 20:01:10 +0000 (22:01 +0200)]
Merge tag 'tegra-for-5.13-dt-bindings' of git://git./linux/kernel/git/tegra/linux into arm/dt
dt-bindings: Changes for v5.13-rc1
One single changes that adds the nvidia,pmc property to the XUSB pad
controller binding, which will subsequently be used to implement USB
sleepwalk functionality.
* tag 'tegra-for-5.13-dt-bindings' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
dt-bindings: phy: tegra-xusb: Add nvidia,pmc prop
Link: https://lore.kernel.org/r/20210401172622.3352990-1-thierry.reding@gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Arnd Bergmann [Thu, 1 Apr 2021 19:47:19 +0000 (21:47 +0200)]
Merge tag 'stm32-dt-for-v5.13-1' of git://git./linux/kernel/git/atorgue/stm32 into arm/dt
STM32 DT updates for v5.13, round 1
Highlights:
----------
MCU part:
-Add stm32h750 SoC support. It is based on stm32h743 and embeds
crypto IPs and 2 ADC.
-Add new art-pi board based on stm32h750. This board embeds:
-8MB QSPI flash.
-16MB SPI flash.
-32MB SDRAM.
-AP6212 combo (wifi/bt/fm).
MPU part:
-Use dedicated PTP clock for Ethernet controller on stm32mp151.
-Enable i2c analog filter on stm32mp151.
-DH:
-Update GPIO names.
-Enable crc1 & crryp1 on DHSOM.
-Engicam: add new boards support:
-MicroGEA SOM which embeds STM32MP157aac, 512 MB Nand Flash
I2S.
-MicroGEA STM32MP1 Microdev 2.0 which embeds MicroGEA SOM,
Ethernet up to 100 Mbps, USB typeA, microSD, UMTS LTE, Wifi/BT
LVDS panel connector.
-MicroGEA STM32MP1 MicroDev 2.0 7" which embeds a MicroGEA STM32MP1
MicroDev 2.0 plus 7" Open Frame panel solution (7" AUO B101AW03 LVDS panel
and EDT DT5526 Touch)
-i.Core STM32MP1 EDIMM SoM based on STM32MP157A.
-C.TOUCH 2.0 n EDIMM compliant general purpose Carrier board with capacitive
touch interface support based on i.Core STM32MP1 EDIMM SoM.
It embeds ETH 10/100, wifi/bt, CAN, USB TypeA/OTG, LVDS pannel connector.
-EDIMM2.2 Starter Kit is an EDIMM 2.2 Form Factor Capacitive Evaluation
Board based on i.Core STM32MP1 EDIMM SoM. IT embeds LCD 7" C.Touch,
wifi/bt,2*LVDS FHD, 3*USB2, 1*USB3 ...
* tag 'stm32-dt-for-v5.13-1' of git://git.kernel.org/pub/scm/linux/kernel/git/atorgue/stm32: (26 commits)
ARM: dts: stm32: Add PTP clock to Ethernet controller
ARM: dts: stm32: Enable crc1 and cryp1 where applicable on DHSOM
ARM: dts: stm32: Update GPIO line names on PicoITX
ARM: dts: stm32: Update GPIO line names on DRC02
ARM: dts: stm32: Fill GPIO line names on AV96
ARM: dts: stm32: Fill GPIO line names on DHCOM SoM
dt-bindings: serial: stm32: Use 'type: object' instead of false for 'additionalProperties'
ARM: stm32: Add a new SoC - STM32H750
ARM: dts: stm32: add support for art-pi board based on stm32h750xbh6
ARM: dts: stm32: fix i2c node typo in stm32h743
ARM: dts: stm32: add new instances for stm32h743 MCU
ARM: dts: stm32: introduce stm32h7-pinctrl.dtsi to support stm32h750
dt-bindings: arm: stm32: Add compatible strings for ART-PI board
Documentation: arm: stm32: Add stm32h750 value line doc
ARM: dts: stm32: enable the analog filter for all I2C nodes in stm32mp151
ARM: dts: stm32: Add Engicam i.Core STM32MP1 EDIMM2.2 Starter Kit
dt-bindings: arm: stm32: Add Engicam i.Core STM32MP1 EDIMM2.2 Starter Kit
ARM: dts: stm32: Add Engicam i.Core STM32MP1 C.TOUCH 2.0
ARM: dts: stm32: Add Engicam i.Core STM32MP1 SoM
dt-bindings: arm: stm32: Add Engicam i.Core STM32MP1 C.TOUCH 2.0
...
Link: https://lore.kernel.org/r/48784f53-943b-0baf-d4a0-fcb7d3849b00@foss.st.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Arnd Bergmann [Thu, 1 Apr 2021 19:43:51 +0000 (21:43 +0200)]
Merge tag 'ux500-dts-v5.13' of git://git./linux/kernel/git/linusw/linux-nomadik into arm/dt
Ux500 DTS changes for the v5.13 kernel cycle:
- Fix up the WLAN on Janice
- Fix the touchscreen on TVK R2
- Push down definitions to the UIBs instead of
trying to share too much.
- Bump the AUX1 voltage on the AB8500 so the
touchscreen will work.
- Define the CTTYSP touchscreen on the TVK R3.
* tag 'ux500-dts-v5.13' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-nomadik:
ARM: dts: ux500: Add Cypress CTTYSP touch to TVK UIB
ARM: dts: ux500: Bump AUX1 voltage
ARM: dts: ux500: Clarify UIB version per board
ARM: dts: ux500: Totally separate TVK R2 and R3
ARM: dts: ux500: Push TC35893 defines to each UIB
ARM: dts: ux500: Fix up TVK R3 sensors
ARM: dts: ux500: Push sensors to TVK R2 board
ARM: dts: ux500: Move Synaptics to right include
ARM: dts: ux500: Fix touchscreen on TVK R2
ARM: dts: ux500: Fix BT+WLAN on Janice
Link: https://lore.kernel.org/r/CACRpkdanRQ6A85d=7vgpzbg-m3-yFcpQ4fuzrxZu3RJ0DrA2bQ@mail.gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Arnd Bergmann [Thu, 1 Apr 2021 19:42:56 +0000 (21:42 +0200)]
Merge tag 'juno-updates-5.13' of git://git./linux/kernel/git/sudeep.holla/linux into arm/dt
ARMv8 Juno updates for v5.13
Couple of changes to describe PCI dma-ranges correctly which was
previously removed and to enable the PCIe and DMA SMMU.
* tag 'juno-updates-5.13' of git://git.kernel.org/pub/scm/linux/kernel/git/sudeep.holla/linux:
arm64: dts: juno: Enable more SMMUs
arm64: dts: juno: Describe PCI dma-ranges
Link: https://lore.kernel.org/r/20210331100410.cenuhvpqoumvsk52@bogus
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Arnd Bergmann [Thu, 1 Apr 2021 19:41:48 +0000 (21:41 +0200)]
Merge tag 'imx-dt64-5.13' of git://git./linux/kernel/git/shawnguo/linux into arm/dt
i.MX arm64 device tree update for 5.13:
- A series from Dong Aisheng to update i.MX8Q device trees for adopting
SS (SubSystems) based bindings.
- New board support: Kontron pitx-imx8m, Engicam i.Core MX8M Mini.
- A series from Adrien Grassein to add various peripheral support for
imx8mm-nitrogen-r2 board.
- A series from Guido Günther to update librem5-devkit device tree.
- A number of patches from Michael Walle to add Root Complex Event
Collector interrupt, update MTD partitions and add rtc0 alias for
ls1028a-kontron-sl28 board.
- Add EQOS MAC support for phyBOARD-Pollux-i.MX8MP.
- Add 2x2 SFP+ cage support for clearfog-itx boards.
- Small and random update for various boards.
* tag 'imx-dt64-5.13' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux: (55 commits)
arm64: dts: fsl-ls1028a-kontron-sl28: add rtc0 alias
arm64: dts: ls1028a: move rtc alias to individual boards
arm64: dts: fsl-ls1028a-kontron-sl28: combine unused partitions
arm64: dts: fsl-ls1028a-kontron-sl28: move MTD partitions
arm64: dts: imx8mp-evk: Improve the Ethernet PHY description
arm64: dts: imx8mq-librem5-r3: Mark buck3 as always on
arm64: dts: imx8mq-librem5: Hog the correct gpio
arm64: dts: lx2160a-clearfog-itx: add SFP support
arm64: dts: imx8mp-phyboard-pollux-rdk: Change debug UART
arm64: dts: imx8mn: Reorder flexspi clock-names entry
arm64: dts: imx8mm: Reorder flexspi clock-names entry
arm64: dts: ls1028a: set up the real link speed for ENETC port 2
arm64: dts: imx8mm-nitrogen-r2: add ecspi2 support
arm64: dts: imx: add imx8qm mek support
arm64: dts: imx: add imx8qm common dts file
arm64: dts: imx8qm: add dma ss support
arm64: dts: imx8: split adma ss into dma and audio ss
arm64: dts: imx8qm: add conn ss support
arm64: dts: imx8qm: add lsio ss support
arm64: dts: imx8: switch to new lpcg clock binding
...
Link: https://lore.kernel.org/r/20210331041019.31345-5-shawnguo@kernel.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Arnd Bergmann [Thu, 1 Apr 2021 19:37:35 +0000 (21:37 +0200)]
Merge tag 'imx-dt-5.13' of git://git./linux/kernel/git/shawnguo/linux into arm/dt
i.MX device tree change for 5.13:
- New board support: i.MX7D based reMarkable2.
- Clean up imx6ql-pfla02 hog group by moving pins into corresponded
client groups.
- Add Netronix embedded controller for imx50-kobo-aura.
- A series from Sebastian Reichel to improve GE Bx50v3 device trees.
- Support I2C bus recovery for imx6qdl-wandboard by adding SCL/SDA
GPIOs.
- Remove unnecessary #address-cells/#size-cells from imx6qdl-gw boards.
- Various small and random device tree update.
* tag 'imx-dt-5.13' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux: (21 commits)
ARM: dts: imx6: pbab01: Set USB OTG port to peripheral
ARM: dts: imx6: pfla02: Fix USB vbus enable pinmuxing
ARM: imx7d-remarkable2: Initial device tree for reMarkable2
ARM: dts: imx7d-mba7: Remove unsupported PCI properties
ARM: dts: imx6qdl-gw*: Remove unnecessary #address-cells/#size-cells
ARM: dts: imx6dl-plybas: Fix gpio-keys W=1 warnings
ARM: dts: imx: bx50v3: Define GPIO line names
ARM: dts: imx: bx50v3: i2c GPIOs are open drain
ARM: dts: imx6q-ba16: improve PHY information
ARM: dts: imx6q-ba16: add USB OTG VBUS enable GPIO
ARM: dts: ls1021a: mark crypto engine dma coherent
ARM: dts: colibri-imx6ull: Change drive strength for usdhc2
ARM: dts: imx6ql-pfla02: Move "hog" pins into corresponded pin groups
ARM: dts: imx6qdl-phytec-pbab01: Select synchronous mode for AUDMUX
ARM: dts: imx6qdl-ts7970: Drop redundant "fsl,mode" option
ARM: dts: imx53-qsb: Describe the esdhc1 card detect pin
ARM: dts: ls1021a: Harmonize DWC USB3 DT nodes name
ARM: dts: imx6qdl-wandboard: add scl/sda gpios definitions for i2c bus recovery
ARM: dts: imx: Mark IIM as syscon on i.MX51/i.MX53
ARM: dts: imx6sl-tolino-shine2hd: Add Netronix embedded controller
...
Link: https://lore.kernel.org/r/20210331041019.31345-4-shawnguo@kernel.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Arnd Bergmann [Thu, 1 Apr 2021 19:36:44 +0000 (21:36 +0200)]
Merge tag 'imx-bindgins-5.13' of git://git./linux/kernel/git/shawnguo/linux into arm/dt
i.MX bindings update for 5.13:
- Add vendor prefix for reMarkable.
- Add compatible for reMarkable 2 e-Ink tablet, Kontron pITX-imx8m
board, Engicam i.Core MX8M Mini devices.
- Add compatbile 'fsl,imx8qm-mu' for i.MX mailbox bindings.
- One correction on example clock-names in imx8qxp-lpcg bindings.
* tag 'imx-bindgins-5.13' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux:
dt-bindings: arm: fsl: Add the reMarkable 2 e-Ink tablet
dt-bindings: Add vendor prefix for reMarkable
dt-bindings: mailbox: mu: add imx8qm support
dt-bindings: arm: fsl: add imx8qm boards compatible string
dt-bindings: arm: fsl: add Kontron pITX-imx8m board
dt-bindings: arm: fsl: Add Engicam i.Core MX8M Mini EDIMM2.2 Starter Kit
dt-bindings: arm: fsl: Add Engicam i.Core MX8M Mini C.TOUCH 2.0
dt-bindings: clock: imx8qxp-lpcg: correct the example clock-names
Link: https://lore.kernel.org/r/20210331041019.31345-3-shawnguo@kernel.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Arnd Bergmann [Thu, 1 Apr 2021 19:35:38 +0000 (21:35 +0200)]
Merge tag 'arm-soc/for-5.13/devicetre-arm64' of https://github.com/Broadcom/stblinux into arm/dt
This pull request contains Broadcom ARM64-based SoCs Device Tree changes
for 5.13, please pull the following:
- Rafal continues to add support for the 4908 SoCs and describes the USB
PHY, firmware flash partitions and Ethernet switch and Ethernet
controller. He also adds support for the TP-Link Archer C2300 V1
router and upates the Netgear R8000P and Asus GT-AC5300 routers network
ports description.
* tag 'arm-soc/for-5.13/devicetre-arm64' of https://github.com/Broadcom/stblinux:
arm64: dts: broadcom: bcm4908: add Ethernet MAC addr
arm64: dts: broadcom: bcm4908: add Ethernet TX irq
arm64: dts: broadcom: bcm4908: set Asus GT-AC5300 port 7 PHY mode
arm64: dts: broadcom: bcm4908: add TP-Link Archer C2300 V1
dt-bindings: arm: bcm: document TP-Link Archer C2300 binding
arm64: dts: broadcom: bcm4908: fix switch parent node name
arm64: dts: broadcom: bcm4908: describe firmware partitions
arm64: dts: broadcom: bcm4908: add remaining Netgear R8000P LEDs
arm64: dts: broadcom: bcm4908: describe Netgear R8000P switch
arm64: dts: broadcom: bcm4908: describe Ethernet controller
arm64: dts: broadcom: bcm4908: describe USB PHY
Link: https://lore.kernel.org/r/20210330184006.1451315-2-f.fainelli@gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Arnd Bergmann [Thu, 1 Apr 2021 19:34:48 +0000 (21:34 +0200)]
Merge tag 'arm-soc/for-5.13/devicetree' of https://github.com/Broadcom/stblinux into arm/dt
This pull request contains Broadcom ARM-based SoCs Device Tree changes
for 5.13, please pull the following:
- Rafal fixes YAML warnings for the memory nodes of BCM5301X nodes and
adds support for the NVMEM NVRAM node on Linksys and Luxul WLAN
routers. He also fixes up the partitions for the Linksys EA9400 to
use the newly introduced parser compatible and sets the power LED to
its default state.
* tag 'arm-soc/for-5.13/devicetree' of https://github.com/Broadcom/stblinux:
ARM: dts: BCM5301X: Set Linksys EA9500 power LED
ARM: dts: BCM5301X: Fix Linksys EA9500 partitions
ARM: dts: BCM5301X: Describe NVMEM NVRAM on Linksys & Luxul routers
ARM: dts: BCM5301X: fix "reg" formatting in /memory node
Link: https://lore.kernel.org/r/20210330184006.1451315-1-f.fainelli@gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Arnd Bergmann [Thu, 1 Apr 2021 19:33:43 +0000 (21:33 +0200)]
Merge tag 'socfpga_dts_update_for_v5.13' of git://git./linux/kernel/git/dinguyen/linux into arm/dt
SoCFPGA DTS updates for v5.13
- Patches from Krzysztof Kozlowski that fixes dtc warnings
and dtbs_check warnings
- Adjust the "cnds,read-delay" value for the Agilex devkit to 2
* tag 'socfpga_dts_update_for_v5.13' of git://git.kernel.org/pub/scm/linux/kernel/git/dinguyen/linux:
arm64: dts: intel: adjust qpsi read-delay property
arm64: dts: intel: socfpga_agilex_socdk_nand: align LED node names with dtschema
arm64: dts: intel: socfpga_agilex: align node names with dtschema
arm64: dts: intel: socfpga_agilex: use defined for GIC interrupts
arm64: dts: intel: socfpga_agilex: move usbphy out of soc node
arm64: dts: intel: socfpga_agilex: remove default status=okay
arm64: dts: intel: socfpga_agilex: move timer out of soc node
arm64: dts: intel: socfpga_agilex: move clocks out of soc node
arm64: dts: intel: socfpga: override clocks by label
Link: https://lore.kernel.org/r/20210330110430.558182-2-dinguyen@kernel.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Arnd Bergmann [Thu, 1 Apr 2021 19:26:02 +0000 (21:26 +0200)]
Merge tag 'omap-for-v5.13/dts-genpd-signed' of git://git./linux/kernel/git/tmlind/linux-omap into arm/dt
Devicetree changes for omaps for genpd support for v5.13
In order to move omap4/5 and dra7 to probe with devicetree data and genpd,
we need to add the missing interconnect target module configuration for
the drivers that do not still have it. This is similar to what we have
already done earlier for am3 and 4 earlier.
These patches are very much similar for all the three SoCs here. The dra7
changes were already available for v5.12 merge window, but were considered
too late to add for v5.12. The patches for omap4 and 5 follow the same
pattern, except for PCIe that is available only on dra7.
We do the changes one driver at a time, and still keep the legacy property
for "ti,hwmods" mostly around, except for cases when already not needed.
We will be dropping the custom property and related legacy data in a
follow-up series.
* tag 'omap-for-v5.13/dts-genpd-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap: (53 commits)
ARM: dts: Configure simple-pm-bus for omap5 l3
ARM: dts: Configure simple-pm-bus for omap5 l4_cfg
ARM: dts: Configure simple-pm-bus for omap5 l4_per
ARM: dts: Configure simple-pm-bus for omap5 l4_wkup
ARM: dts: Move omap5 l3-noc to a separate node
ARM: dts: Move omap5 mmio-sram out of l3 interconnect
ARM: dts: Configure interconnect target module for omap5 sata
ARM: dts: Configure interconnect target module for omap5 gpmc
ARM: dts: Configure interconnect target module for omap5 mpu
ARM: dts: Configure interconnect target module for omap5 emif
ARM: dts: Configure interconnect target module for omap5 dmm
ARM: dts: Prepare for simple-pm-bus for omap4 l3
ARM: dts: Configure simple-pm-bus for omap4 l4_cfg
ARM: dts: Configure simple-pm-bus for omap4 l4_per
ARM: dts: Configure simple-pm-bus for omap4 l4_wkup
ARM: dts: Move omap4 l3-noc to a separate node
ARM: dts: Move omap4 mmio-sram out of l3 interconnect
ARM: dts: Configure interconnect target module for omap4 mpu
ARM: dts: Configure interconnect target module for omap4 debugss
ARM: dts: Configure interconnect target module for omap4 emif
...
Link: https://lore.kernel.org/r/pull-1617004205-537424@atomide.com-2
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Daniel Palmer [Mon, 1 Mar 2021 12:35:42 +0000 (21:35 +0900)]
ARM: mstar: Add mpll to base dtsi
All of the currently known MStar/SigmaStar ARMv7 SoCs have at least
one MPLL and it seems to always be at the same place so add it to
the base dtsi.
Signed-off-by: Daniel Palmer <daniel@0x0f.com>
Link: https://lore.kernel.org/r/20210301123542.2800643-4-daniel@0x0f.com'
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Daniel Palmer [Mon, 1 Mar 2021 12:35:41 +0000 (21:35 +0900)]
ARM: mstar: Add the external clocks to the base dsti
All of the currently known MStar/SigmaStar ARMv7 SoCs have an "xtal"
clock input that is usually 24MHz and an "RTC xtal" that is usually 32KHz.
The xtal input has to be connected to something so it's enabled by default.
The MSC313 and MSC313E do not bring the RTC clock input out to the pins
so it's impossible to connect it. The SSC8336 does bring the input
out to the pins but it's not always actually connected to something.
The RTC node needs to always be present because in the future the nodes
for the clock muxes will refer to it even if it's not usable.
The RTC node is disabled by default and should be enabled at the board
level if the RTC input is wired up.
Signed-off-by: Daniel Palmer <daniel@0x0f.com>
Link: https://lore.kernel.org/r/20210301123542.2800643-3-daniel@0x0f.com'
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Daniel Palmer [Mon, 1 Mar 2021 12:35:40 +0000 (21:35 +0900)]
ARM: mstar: Select MSTAR_MSC313_MPLL
All of the ARCH_MSTARV7 chips have an MPLL as the source for
peripheral clocks so select MSTAR_MSC313_MPLL.
Signed-off-by: Daniel Palmer <daniel@0x0f.com>
Link: https://lore.kernel.org/r/20210301123542.2800643-2-daniel@0x0f.com'
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Kurt Kanzenbach [Tue, 16 Mar 2021 08:06:44 +0000 (09:06 +0100)]
ARM: dts: stm32: Add PTP clock to Ethernet controller
Add the PTP clock to the Ethernet controller. Otherwise, the driver uses the
main clock to derive the PTP frequency which is not necessarily the correct one.
Tested with linuxptp on Olimex STMP1-OLinuXino-LIME2.
Signed-off-by: Kurt Kanzenbach <kurt@linutronix.de>
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
Fabien Parent [Tue, 23 Feb 2021 22:18:26 +0000 (23:18 +0100)]
arm64: dts: mediatek: fix reset GPIO level on pumpkin
The tca6416 chip is active low. Fix the reset-gpios value.
Fixes: e2a8fa1e0faa ("arm64: dts: mediatek: fix tca6416 reset GPIOs in pumpkin")
Signed-off-by: Fabien Parent <fparent@baylibre.com>
Link: https://lore.kernel.org/r/20210223221826.2063911-1-fparent@baylibre.com
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
Fabien Parent [Wed, 17 Feb 2021 20:59:44 +0000 (21:59 +0100)]
arm64: dts: mt8183: add mt8183 pumpkin board
The MT8183 Pumpkin board is manufactured by OLogic and includes
a MediaTek MT8183 SoC with 2GB of RAM.
The board provides the following IOs:
* 2 USB Type-A ports
* Ethernet
* Serial UART over micro-USB port
* 1 USB Type-C dual role port
* 1 USB Type-C power only port
* 1 Jack for audio
* RPI compatible header
* MT7668 wiresless chip with Wi-Fi AC and BT 5
* Micro-HDMI port
* 2 connectors for CSI cameras
* 1 connector for DSI display
* 1 JTAG port
Signed-off-by: Fabien Parent <fparent@baylibre.com>
Link: https://lore.kernel.org/r/20210217205945.830006-2-fparent@baylibre.com
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
Fabien Parent [Wed, 17 Feb 2021 20:59:43 +0000 (21:59 +0100)]
dt-bindings: arm64: dts: mediatek: Add mt8183-pumpkin board
Add binding documentation for the MT8183 Pumpkin board.
Signed-off-by: Fabien Parent <fparent@baylibre.com>
Acked-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20210217205945.830006-1-fparent@baylibre.com
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
Marek Vasut [Thu, 25 Mar 2021 21:45:33 +0000 (22:45 +0100)]
ARM: dts: stm32: Enable crc1 and cryp1 where applicable on DHSOM
Enable the CRC accelerator on all STM32MP15xx DHSOM based systems
and CRYP accelerator on all STM32MP15x[CF] DHSOM based systems.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Alexandre Torgue <alexandre.torgue@st.com>
Cc: Maxime Coquelin <mcoquelin.stm32@gmail.com>
Cc: Patrice Chotard <patrice.chotard@st.com>
Cc: Patrick Delaunay <patrick.delaunay@st.com>
Cc: linux-stm32@st-md-mailman.stormreply.com
To: linux-arm-kernel@lists.infradead.org
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
Marek Vasut [Mon, 29 Mar 2021 19:36:14 +0000 (21:36 +0200)]
ARM: dts: stm32: Update GPIO line names on PicoITX
Use more specific custom GPIO line names which denote exactly where
the GPIO came from, i.e. the base board. Also, update the new blank
GPIO line names set up by stm32mp15xx-dhcom-som.dtsi back to their
original values.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Alexandre Torgue <alexandre.torgue@foss.st.com>
Cc: Patrice Chotard <patrice.chotard@foss.st.com>
Cc: Patrick Delaunay <patrick.delaunay@foss.st.com>
Cc: linux-stm32@st-md-mailman.stormreply.com
To: linux-arm-kernel@lists.infradead.org
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
Marek Vasut [Mon, 29 Mar 2021 19:36:13 +0000 (21:36 +0200)]
ARM: dts: stm32: Update GPIO line names on DRC02
Use more specific custom GPIO line names which denote exactly where
the GPIO came from, i.e. the base board. Also, update the new blank
GPIO line names set up by stm32mp15xx-dhcom-som.dtsi back to their
original values.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Alexandre Torgue <alexandre.torgue@foss.st.com>
Cc: Patrice Chotard <patrice.chotard@foss.st.com>
Cc: Patrick Delaunay <patrick.delaunay@foss.st.com>
Cc: linux-stm32@st-md-mailman.stormreply.com
To: linux-arm-kernel@lists.infradead.org
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
Marek Vasut [Mon, 29 Mar 2021 19:36:12 +0000 (21:36 +0200)]
ARM: dts: stm32: Fill GPIO line names on AV96
Fill in the custom GPIO line names used by DH.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Alexandre Torgue <alexandre.torgue@foss.st.com>
Cc: Patrice Chotard <patrice.chotard@foss.st.com>
Cc: Patrick Delaunay <patrick.delaunay@foss.st.com>
Cc: linux-stm32@st-md-mailman.stormreply.com
To: linux-arm-kernel@lists.infradead.org
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
Marek Vasut [Mon, 29 Mar 2021 19:36:11 +0000 (21:36 +0200)]
ARM: dts: stm32: Fill GPIO line names on DHCOM SoM
Fill in the custom GPIO line names used by DH on the DHCOM SoM.
The GPIO line names are in accordance to DHCOM Design Guide R04
available at [1], section 3.9 GPIO.
[1] https://wiki.dh-electronics.com/images/5/52/DOC_DHCOM-Design-Guide_R04_2018-06-28.pdf
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Alexandre Torgue <alexandre.torgue@foss.st.com>
Cc: Patrice Chotard <patrice.chotard@foss.st.com>
Cc: Patrick Delaunay <patrick.delaunay@foss.st.com>
Cc: linux-stm32@st-md-mailman.stormreply.com
To: linux-arm-kernel@lists.infradead.org
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
dillon min [Wed, 31 Mar 2021 08:28:45 +0000 (16:28 +0800)]
dt-bindings: serial: stm32: Use 'type: object' instead of false for 'additionalProperties'
To use additional properties 'bluetooth' on serial, need replace false with
'type: object' for 'additionalProperties' to make it as a node, else will
run into dtbs_check warnings.
'arch/arm/boot/dts/stm32h750i-art-pi.dt.yaml: serial@
40004800:
'bluetooth' does not match any of the regexes: 'pinctrl-[0-9]+'
Fixes: af1c2d81695b ("dt-bindings: serial: Convert STM32 UART to json-schema")
Reported-by: kernel test robot <lkp@intel.com>
Tested-by: Valentin Caron <valentin.caron@foss.st.com>
Signed-off-by: dillon min <dillon.minfei@gmail.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/1616757302-7889-8-git-send-email-dillon.minfei@gmail.com
Signed-off-by: dillon min <dillon.minfei@gmail.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
dillon min [Wed, 31 Mar 2021 08:28:44 +0000 (16:28 +0800)]
ARM: stm32: Add a new SoC - STM32H750
The STM32H750 is a Cortex-M7 MCU running at 480MHz
and containing 128KBytes internal flash, 1MiB SRAM.
Signed-off-by: dillon min <dillon.minfei@gmail.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
dillon min [Wed, 31 Mar 2021 08:28:43 +0000 (16:28 +0800)]
ARM: dts: stm32: add support for art-pi board based on stm32h750xbh6
This patchset has following changes:
- introduce stm32h750.dtsi to support stm32h750 value line
- add pin groups for usart3/uart4/spi1/sdmmc2
- add stm32h750i-art-pi.dtb (arch/arm/boot/dts/Makefile)
- add stm32h750-art-pi.dts to support art-pi board
art-pi board component:
- 8MiB qspi flash
- 16MiB spi flash
- 32MiB sdram
- ap6212 wifi&bt&fm
the detail board information can be found at:
https://art-pi.gitee.io/website/
Signed-off-by: dillon min <dillon.minfei@gmail.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
Alexandre Torgue [Thu, 1 Apr 2021 07:46:08 +0000 (09:46 +0200)]
ARM: dts: stm32: fix i2c node typo in stm32h743
Replace upper case by lower case in i2c nodes name.
Signed-off-by: dillon min <dillon.minfei@gmail.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
Alexandre Torgue [Thu, 1 Apr 2021 07:37:31 +0000 (09:37 +0200)]
ARM: dts: stm32: add new instances for stm32h743 MCU
Some instances are missing in current support of stm32h743 MCU. This commit
adds usart3/uart4 and sdmmc2 support.
Signed-off-by: dillon min <dillon.minfei@gmail.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
dillon min [Wed, 31 Mar 2021 08:28:42 +0000 (16:28 +0800)]
ARM: dts: stm32: introduce stm32h7-pinctrl.dtsi to support stm32h750
This patch is intend to add support stm32h750 value line,
just add stm32h7-pinctrl.dtsi for extending, with following changes:
- rename stm32h743-pinctrl.dtsi to stm32h7-pinctrl.dtsi
- move 'pin-controller' from stm32h7-pinctrl.dtsi to stm32h743.dtsi, to
fix make dtbs_check warrnings
arch/arm/boot/dts/stm32h750i-art-pi.dt.yaml: soc: 'i2c@
40005C00',
'i2c@
58001C00' do not match any of the regexes:
'@(0|[1-9a-f][0-9a-f]*)$', '^[^@]+$', 'pinctrl-[0-9]+'
Signed-off-by: dillon min <dillon.minfei@gmail.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
dillon min [Wed, 31 Mar 2021 08:28:41 +0000 (16:28 +0800)]
dt-bindings: arm: stm32: Add compatible strings for ART-PI board
Art-pi based on stm32h750xbh6, with following resources:
-8MiB QSPI flash
-16MiB SPI flash
-32MiB SDRAM
-AP6212 wifi, bt, fm
detail information can be found at:
https://art-pi.gitee.io/website/
Signed-off-by: dillon min <dillon.minfei@gmail.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
dillon min [Wed, 31 Mar 2021 08:28:40 +0000 (16:28 +0800)]
Documentation: arm: stm32: Add stm32h750 value line doc
This patchset add support for soc stm32h750, stm32h750 has mirror
different from stm32h743
item stm32h743 stm32h750
flash size: 2MiB 128KiB
adc: none 3
crypto-hash: none aes/hamc/des/tdes/md5/sha
detail information can be found at:
https://www.st.com/en/microcontrollers-microprocessors/stm32h750-value-line.html
Signed-off-by: dillon min <dillon.minfei@gmail.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
Hsin-Yi Wang [Wed, 31 Mar 2021 09:13:27 +0000 (17:13 +0800)]
arm64: dts: mt8183: Add kukui kodama board
kodama is also known as Lenovo 10e Chromebook Tablet.
Signed-off-by: Hsin-Yi Wang <hsinyi@chromium.org>
Link: https://lore.kernel.org/r/20210331091327.1198529-4-hsinyi@chromium.org
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
Nicolas Boichat [Wed, 31 Mar 2021 09:13:26 +0000 (17:13 +0800)]
arm64: dts: mt8183: Add kukui kakadu board
Kakadu is also known as ASUS Chromebook Detachable CM3.
Signed-off-by: Nicolas Boichat <drinkcat@chromium.org>
Signed-off-by: Hsin-Yi Wang <hsinyi@chromium.org>
Link: https://lore.kernel.org/r/20210331091327.1198529-3-hsinyi@chromium.org
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
Hsin-Yi Wang [Wed, 31 Mar 2021 09:13:25 +0000 (17:13 +0800)]
dt-bindings: arm64: dts: mediatek: Add mt8183-kukui-kodama
Kodama is also known as Lenovo 10e Chromebook Tablet.
Signed-off-by: Hsin-Yi Wang <hsinyi@chromium.org>
Link: https://lore.kernel.org/r/20210331091327.1198529-2-hsinyi@chromium.org
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
Hsin-Yi Wang [Wed, 31 Mar 2021 09:13:24 +0000 (17:13 +0800)]
dt-bindings: arm64: dts: mediatek: Add mt8183-kukui-kakadu
Kakadu is also known as ASUS Chromebook Detachable CM3.
Signed-off-by: Hsin-Yi Wang <hsinyi@chromium.org>
Link: https://lore.kernel.org/r/20210331091327.1198529-1-hsinyi@chromium.org
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
Dinh Nguyen [Tue, 23 Mar 2021 15:55:15 +0000 (10:55 -0500)]
arm64: dts: intel: adjust qpsi read-delay property
The "cnds,read-delay" value needs to be 2 for the Agilex devkit.
Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
Krzysztof Kozlowski [Mon, 8 Mar 2021 17:09:45 +0000 (18:09 +0100)]
arm64: dts: intel: socfpga_agilex_socdk_nand: align LED node names with dtschema
Align the LED node names with dtschema to silence dtbs_check warnings
like:
leds: 'hps0', 'hps1', 'hps2' do not match any of the regexes: '(^led-[0-9a-f]$|led)', 'pinctrl-[0-9]+'
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
Krzysztof Kozlowski [Mon, 8 Mar 2021 17:09:43 +0000 (18:09 +0100)]
arm64: dts: intel: socfpga_agilex: align node names with dtschema
Align the NAND, GIC and UART node names with dtschema to silence
dtbs_check warnings like:
arch/arm64/boot/dts/intel/socfpga_agilex_socdk.dt.yaml:
intc@
fffc1000: $nodename:0: 'intc@
fffc1000' does not match '^interrupt-controller(@[0-9a-f,]+)*$'
arch/arm64/boot/dts/intel/socfpga_agilex_socdk.dt.yaml:
serial0@
ffc02000: $nodename:0: 'serial0@
ffc02000' does not match '^serial(@[0-9a-f,]+)*$'
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
Krzysztof Kozlowski [Mon, 8 Mar 2021 17:09:42 +0000 (18:09 +0100)]
arm64: dts: intel: socfpga_agilex: use defined for GIC interrupts
Use human-readable defines for GIC interrupt type and flag, instead of
hard-coding the numbers. It makes review easier. No functional change.
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
Krzysztof Kozlowski [Mon, 8 Mar 2021 17:09:41 +0000 (18:09 +0100)]
arm64: dts: intel: socfpga_agilex: move usbphy out of soc node
The usual usb-nop-xceiv USB phy node should be under root node, to fix
dtc warning:
arch/arm64/boot/dts/intel/socfpga_agilex.dtsi:472.21-476.5:
Warning (simple_bus_reg): /soc/usbphy@0: missing or empty reg/ranges property
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
Krzysztof Kozlowski [Mon, 8 Mar 2021 17:09:40 +0000 (18:09 +0100)]
arm64: dts: intel: socfpga_agilex: remove default status=okay
New nodes are okay by default.
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
Krzysztof Kozlowski [Mon, 8 Mar 2021 17:09:39 +0000 (18:09 +0100)]
arm64: dts: intel: socfpga_agilex: move timer out of soc node
The ARM architected timer is part of ARM CPU design therefore by
convention it should not be inside the soc node. This also fixes dtc
warning like:
arch/arm64/boot/dts/intel/socfpga_agilex.dtsi:410.9-416.5:
Warning (simple_bus_reg): /soc/timer: missing or empty reg/ranges property
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
Krzysztof Kozlowski [Mon, 8 Mar 2021 17:09:38 +0000 (18:09 +0100)]
arm64: dts: intel: socfpga_agilex: move clocks out of soc node
The clocks are usually not part of the SoC but provided on the board
(external oscillators). Moving them out of soc node fixes dtc warning:
arch/arm64/boot/dts/intel/socfpga_agilex.dtsi:111.10-137.5:
Warning (simple_bus_reg): /soc/clocks: missing or empty reg/ranges property
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
Krzysztof Kozlowski [Mon, 8 Mar 2021 17:09:37 +0000 (18:09 +0100)]
arm64: dts: intel: socfpga: override clocks by label
Using full paths to extend or override a device tree node is error
prone. If there was a typo error, a new node will be created instead of
extending the existing node. This will lead to run-time errors that
could be hard to detect.
A mistyped label on the other hand, will cause a dtc compile error
(during build time).
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
Boris Lysov [Sat, 13 Mar 2021 23:37:35 +0000 (02:37 +0300)]
arm: mediatek: dts: activate SMP for mt6589
This simple patch activates SMP for mt6589 by adding the missing
"enable-method" property. After applying this patch kernel log
indicates all cores are brought up:
[ 0.070122] CPU0: thread -1, cpu 0, socket 0, mpidr
80000000
[ 0.071652] Setting up static identity map for 0x80100000 - 0x80100054
[ 0.072711] rcu: Hierarchical SRCU implementation.
[ 0.073853] smp: Bringing up secondary CPUs ...
[ 0.133675] CPU1: thread -1, cpu 1, socket 0, mpidr
80000001
[ 0.193675] CPU2: thread -1, cpu 2, socket 0, mpidr
80000002
[ 0.253675] CPU3: thread -1, cpu 3, socket 0, mpidr
80000003
[ 0.253818] smp: Brought up 1 node, 4 CPUs
[ 0.256930] SMP: Total of 4 processors activated (7982.28 BogoMIPS).
[ 0.257855] CPU: All CPU(s) started in SVC mode.
Before this change CPU cores 1-3 didn't start and the following lines
were in kernel log:
[ 0.070126] CPU0: thread -1, cpu 0, socket 0, mpidr
80000000
[ 0.071640] Setting up static identity map for 0x80100000 - 0x80100054
[ 0.072706] rcu: Hierarchical SRCU implementation.
[ 0.073850] smp: Bringing up secondary CPUs ...
[ 0.076052] smp: Brought up 1 node, 1 CPU
[ 0.076678] SMP: Total of 1 processors activated (2000.48 BogoMIPS).
[ 0.077603] CPU: All CPU(s) started in SVC mode.
Signed-off-by: Boris Lysov <arzamas-16@mail.ee>
Link: https://lore.kernel.org/r/20210314023735.052d2d35@pc
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
Fabien Parent [Tue, 23 Feb 2021 22:36:13 +0000 (23:36 +0100)]
dt-bindings: arm64: dts: mediatek: Add mt8516-pumpkin board
Add binding documentation for the MT8516 Pumpkin board.
Signed-off-by: Fabien Parent <fparent@baylibre.com>
Acked-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20210223223613.2085827-1-fparent@baylibre.com
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
Ryder Lee [Mon, 29 Mar 2021 17:24:48 +0000 (01:24 +0800)]
arm64: dts: mt7622: add ePA/eLNA pinmux for built-in WiFi
This just illustrates one of possible combinations. User should setup
the corresponding pins according to the onboard RF data that stores
in eeprom.
Signed-off-by: Ryder Lee <ryder.lee@mediatek.com>
Link: https://lore.kernel.org/r/641c5e40f54e7c9c8eaa6be398d7169445b6fede.1617006498.git.ryder.lee@mediatek.com
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
Linus Walleij [Tue, 23 Mar 2021 09:32:59 +0000 (10:32 +0100)]
ARM: dts: ux500: Add Cypress CTTYSP touch to TVK UIB
The TVK1281618 R3 UIB has a Cypress CTTYSP touchscreen.
Add it to the device tree file.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Linus Walleij [Mon, 29 Mar 2021 21:57:51 +0000 (23:57 +0200)]
ARM: dts: ux500: Bump AUX1 voltage
The voltage default on the AB8500 VAUX1 regulator is way
too low and does not correspond to the setting in the
vendor tree. This should be 2.8-3.3 V not 2.5-2.9 V or
things like the HREFP520 touchscreen will not work.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Ryan Wu [Mon, 1 Feb 2021 03:59:45 +0000 (11:59 +0800)]
dt-bindings: nvmem: mediatek: add support for MediaTek mt8192 SoC
This updates dt-binding documentation for MediaTek mt8192
Signed-off-by: Ryan Wu <Yz.Wu@mediatek.com>
Acked-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/1612151986-19820-2-git-send-email-Yz.Wu@mediatek.com
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
Stefan Riedmueller [Mon, 29 Mar 2021 13:01:02 +0000 (15:01 +0200)]
ARM: dts: imx6: pbab01: Set USB OTG port to peripheral
Due to a hardware bug preventing the correct detection if the ID pin
the USB OTG port cannot be used in otg mode. It can either be set to
host or peripheral. Set it to peripheral so vbus is disabled by default.
Signed-off-by: Stefan Riedmueller <s.riedmueller@phytec.de>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Stefan Riedmueller [Mon, 29 Mar 2021 13:01:01 +0000 (15:01 +0200)]
ARM: dts: imx6: pfla02: Fix USB vbus enable pinmuxing
The pinmuxing for the enable pin of the usbh1 node is wrong. It needs to
be muxed as GPIO. While at it, move the pinctrl to the vbus regulator
since it is actually the regulator enable pin.
Signed-off-by: Stefan Riedmueller <s.riedmueller@phytec.de>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Rafał Miłecki [Mon, 29 Mar 2021 15:45:14 +0000 (17:45 +0200)]
arm64: dts: broadcom: bcm4908: add Ethernet MAC addr
On most BCM4908 devices MAC address can be read from the bootloader
binary section containing device settings. Use NVMEM to describe that.
Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Rafał Miłecki [Mon, 29 Mar 2021 08:04:09 +0000 (10:04 +0200)]
ARM: dts: BCM5301X: Set Linksys EA9500 power LED
Set Linux default trigger to default on, just like it's normally done
for power LEDs.
Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Rafał Miłecki [Mon, 29 Mar 2021 05:54:30 +0000 (07:54 +0200)]
ARM: dts: BCM5301X: Fix Linksys EA9500 partitions
Partitions are basically fixed indeed but firmware ones don't have
hardcoded function ("firmware" vs "failsafe"). Actual function depends
on bootloader configuration. Use a proper binding for that.
While at it fix numbers formatting to avoid:
arch/arm/boot/dts/bcm47094-linksys-panamera.dt.yaml: partitions: 'partition@
1F00000' does not match any of the regexes: '^partition@[0-9a-f]+$', 'pinctrl-[0-9]+'
From schema: Documentation/devicetree/bindings/mtd/partitions/linksys,ns-partitions.yaml
Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Chunfeng Yun [Thu, 18 Mar 2021 06:18:48 +0000 (14:18 +0800)]
arm64: dts: mt8173: fix wrong power-domain phandle of pmic
Due to power domain controller is added, the power domain's
phanle is also changed from 'scpsys' to 'spm', but forget to
modify pmic node's
Fixes: 8b6562644df9 ("arm64: dts: mediatek: Add mt8173 power domain controller")
Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com>
Reviewed-by: Enric Balletbo i Serra <enric.balletbo@collabora.com>
Link: https://lore.kernel.org/r/1616048328-13579-1-git-send-email-chunfeng.yun@mediatek.com
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
Matthias Kaehlcke [Mon, 29 Mar 2021 17:10:37 +0000 (19:10 +0200)]
arm64: dts: mt8183: Configure CPU cooling
Add two passive trip points at 68°C and 80°C for the CPU temperature.
Signed-off-by: Matthias Kaehlcke <mka@chromium.org>
Signed-off-by: Michael Kao <michael.kao@mediatek.com>
Tested-by: Hsin-Yi Wang <hsinyi@chromium.org>
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
michael.kao [Tue, 16 Mar 2021 07:01:42 +0000 (15:01 +0800)]
arm64: dts: mt8183: add thermal zone node
Add thermal zone node to Mediatek MT8183 dts file.
Evaluate the thermal zone every 500ms while not cooling
and every 100ms when passive cooling is performed.
Signed-off-by: Matthias Kaehlcke <mka@chromium.org>
Tested-by: Hsin-Yi Wang <hsinyi@chromium.org>
Signed-off-by: Michael Kao <michael.kao@mediatek.com>
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
Hsin-Yi Wang [Wed, 24 Mar 2021 07:08:42 +0000 (15:08 +0800)]
arm64: dts: mt8183: Add gce client reg for display subcomponents
Add mediatek,gce-client-reg for mmsys, ccorr, aal, gamma, dither.
Fixes: 91f9c963ce79 ("arm64: dts: mt8183: Add display nodes for MT8183")
Signed-off-by: Hsin-Yi Wang <hsinyi@chromium.org>
Tested-by: Enric Balletbo i Serra <enric.balletbo@collabora.com>
Link: https://lore.kernel.org/r/20210324070842.1037233-1-hsinyi@chromium.org
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
Chunfeng Yun [Tue, 16 Mar 2021 09:22:32 +0000 (17:22 +0800)]
arm: dts: mt2701: harmonize node names and compatibles
This is used to fix dtbs_check warning
Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com>
Link: https://lore.kernel.org/r/20210316092232.9806-13-chunfeng.yun@mediatek.com
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
Chunfeng Yun [Tue, 16 Mar 2021 09:22:31 +0000 (17:22 +0800)]
arm: dts: mt7623: harmonize node names and compatibles
This is used to fix dtbs_check warning
Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com>
Link: https://lore.kernel.org/r/20210316092232.9806-12-chunfeng.yun@mediatek.com
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
Chunfeng Yun [Tue, 16 Mar 2021 09:22:30 +0000 (17:22 +0800)]
arm: dts: mt7629: harmonize node names and compatibles
This is used to fix dtbs_check warning
Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com>
Link: https://lore.kernel.org/r/20210316092232.9806-11-chunfeng.yun@mediatek.com
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
Chunfeng Yun [Tue, 16 Mar 2021 09:22:29 +0000 (17:22 +0800)]
arm64: dts: mediatek: mt8183: fix dtbs_check warning
Harmonize node names, compatibles and properties.
Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com>
Link: https://lore.kernel.org/r/20210316092232.9806-10-chunfeng.yun@mediatek.com
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
Chunfeng Yun [Tue, 16 Mar 2021 09:22:28 +0000 (17:22 +0800)]
arm64: dts: mediatek: mt7622: harmonize node names and compatibles
This is used to fix dtbs_check warning
Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com>
Link: https://lore.kernel.org/r/20210316092232.9806-9-chunfeng.yun@mediatek.com
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
Chunfeng Yun [Tue, 16 Mar 2021 09:22:27 +0000 (17:22 +0800)]
arm64: dts: mediatek: mt8516: harmonize node names and compatibles
This is used to fix dtbs_check warning:
harmonize node names and compatibles;
add property "usb-role-switch" for connector dependence.
Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com>
Link: https://lore.kernel.org/r/20210316092232.9806-8-chunfeng.yun@mediatek.com
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
Chunfeng Yun [Tue, 16 Mar 2021 09:22:26 +0000 (17:22 +0800)]
arm64: dts: mediatek: mt2712: harmonize node names
This is used to fix dtbs_check warning.
Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com>
Link: https://lore.kernel.org/r/20210316092232.9806-7-chunfeng.yun@mediatek.com
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
Chunfeng Yun [Tue, 16 Mar 2021 09:22:25 +0000 (17:22 +0800)]
arm64: dts: mediatek: mt8173: fix dtbs_check warning
Harmonize nodes names, compatibles and remove unused property.
Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com>
Link: https://lore.kernel.org/r/20210316092232.9806-6-chunfeng.yun@mediatek.com
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
Chunfeng Yun [Tue, 16 Mar 2021 09:22:24 +0000 (17:22 +0800)]
arm64: dts: mt8173: fix property typo of 'phys' in dsi node
Use 'phys' instead of 'phy'.
Fixes: 81ad4dbaf7af ("arm64: dts: mt8173: Add display subsystem related nodes")
Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com>
Reviewed-by: Chun-Kuang Hu <chunkuang.hu@kernel.org>
Cc: stable <stable@vger.kernel.org>
Link: https://lore.kernel.org/r/20210316092232.9806-5-chunfeng.yun@mediatek.com
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
Seiya Wang [Fri, 19 Mar 2021 02:34:25 +0000 (10:34 +0800)]
dt-bindings: arm: Add compatible for Mediatek MT8195
This commit adds dt-binding documentation for the Mediatek MT8195
reference board.
Signed-off-by: Seiya Wang <seiya.wang@mediatek.com>
Acked-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20210319023427.16711-8-seiya.wang@mediatek.com
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
Seiya Wang [Fri, 19 Mar 2021 02:34:21 +0000 (10:34 +0800)]
dt-bindings: serial: Add compatible for Mediatek MT8195
This commit adds dt-binding documentation of uart for Mediatek MT8195 SoC
Platform.
Signed-off-by: Seiya Wang <seiya.wang@mediatek.com>
Link: https://lore.kernel.org/r/20210319023427.16711-4-seiya.wang@mediatek.com
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
Seiya Wang [Fri, 19 Mar 2021 02:34:20 +0000 (10:34 +0800)]
dt-bindings: timer: Add compatible for Mediatek MT8195
This commit adds dt-binding documentation of timer for Mediatek MT8195 SoC
Platform.
Signed-off-by: Seiya Wang <seiya.wang@mediatek.com>
Acked-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20210319023427.16711-3-seiya.wang@mediatek.com
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
Hsin-Yi Wang [Fri, 19 Mar 2021 03:52:45 +0000 (11:52 +0800)]
arm64: dts: mt8183: Add kukui-jacuzzi-juniper board
Juniper is known as Acer Chromebook Spin 311 (CP311-3H).
Signed-off-by: Hsin-Yi Wang <hsinyi@chromium.org>
Tested-by: Ricardo Cañuelo <ricardo.canuelo@collabora.com>
Link: https://lore.kernel.org/r/20210319035245.2751911-4-hsinyi@chromium.org
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
Hsin-Yi Wang [Fri, 19 Mar 2021 03:52:44 +0000 (11:52 +0800)]
arm64: dts: mt8183: Add kukui-jacuzzi-damu board
Damu is known as ASUS Chromebook Flip CM3.
Signed-off-by: Hsin-Yi Wang <hsinyi@chromium.org>
Link: https://lore.kernel.org/r/20210319035245.2751911-3-hsinyi@chromium.org
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
Hsin-Yi Wang [Fri, 19 Mar 2021 03:52:43 +0000 (11:52 +0800)]
dt-bindings: arm64: dts: mediatek: Add mt8183-kukui-jacuzzi-juniper
mt8183-kukui-jacuzzi-juniper board also known as Acer Chromebook Spin 311,
using mediatek mt8183 SoC.
Signed-off-by: Hsin-Yi Wang <hsinyi@chromium.org>
Reviewed-by: Enric Balletbo i Serra <enric.balletbo@collabora.com>
Acked-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20210319035245.2751911-2-hsinyi@chromium.org
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
Hsin-Yi Wang [Fri, 19 Mar 2021 03:52:42 +0000 (11:52 +0800)]
dt-bindings: arm64: dts: mediatek: Add mt8183-kukui-jacuzzi-damu
mt8183-kukui-jacuzzi-damu board also known as ASUS Chromebook Flip CM3,
using mediatek mt8183 SoC.
Signed-off-by: Hsin-Yi Wang <hsinyi@chromium.org>
Reviewed-by: Enric Balletbo i Serra <enric.balletbo@collabora.com>
Acked-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20210319035245.2751911-1-hsinyi@chromium.org
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
Chunfeng Yun [Tue, 23 Mar 2021 07:02:55 +0000 (15:02 +0800)]
arm64: dts: mt8183: update wakeup register offset
Use wakeup control register offset exactly, and update revision
number
Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com>
Link: https://lore.kernel.org/r/1616482975-17841-13-git-send-email-chunfeng.yun@mediatek.com
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
Alain Volmat [Fri, 5 Feb 2021 08:51:43 +0000 (09:51 +0100)]
ARM: dts: stm32: enable the analog filter for all I2C nodes in stm32mp151
Enable the analog filter for all I2C nodes of the stm32mp151.
Signed-off-by: Alain Volmat <alain.volmat@foss.st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
Michael Walle [Tue, 23 Mar 2021 15:07:57 +0000 (16:07 +0100)]
arm64: dts: fsl-ls1028a-kontron-sl28: add rtc0 alias
For completeness, add the rtc0 alias.
Signed-off-by: Michael Walle <michael@walle.cc>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Michael Walle [Tue, 23 Mar 2021 15:07:56 +0000 (16:07 +0100)]
arm64: dts: ls1028a: move rtc alias to individual boards
The aliases are board-specific and shouldn't be included in the common
SoC dtsi. Move them over to the boards.
Signed-off-by: Michael Walle <michael@walle.cc>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Michael Walle [Thu, 18 Mar 2021 17:18:56 +0000 (18:18 +0100)]
arm64: dts: fsl-ls1028a-kontron-sl28: combine unused partitions
The failsafe partitions for the DP firmware and for AT-F are unused. If
AT-F will ever be supported in the failsafe mode, then it will be a FIT
image. Thus fold the unused partitions into the failsafe bootloader one
to have enough storage if the bootloader image will grow.
While at it, remove the reserved partition. It served no purpose other
than having no hole in the map.
Signed-off-by: Michael Walle <michael@walle.cc>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Michael Walle [Thu, 18 Mar 2021 17:18:55 +0000 (18:18 +0100)]
arm64: dts: fsl-ls1028a-kontron-sl28: move MTD partitions
Move the MTD partitions to the partitions subnode. This is the new way
to specify the partitions, see
Documentation/devicetree/bindings/mtd/jedec,spi-nor.yaml
Signed-off-by: Michael Walle <michael@walle.cc>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Fabio Estevam [Thu, 18 Mar 2021 11:13:30 +0000 (08:13 -0300)]
arm64: dts: imx8mp-evk: Improve the Ethernet PHY description
According to the datasheet RTL8211, it must be asserted low for at least
10ms and at least 72ms "for internal circuits settling time" before
accessing the PHY registers.
Add properties to describe such requirements.
Reported-by: Joakim Zhang <qiangqing.zhang@nxp.com>
Signed-off-by: Fabio Estevam <festevam@gmail.com>
Tested-by: Joakim Zhang <qiangqing.zhang@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Sebastian Krzyszkowiak [Mon, 15 Mar 2021 08:35:30 +0000 (09:35 +0100)]
arm64: dts: imx8mq-librem5-r3: Mark buck3 as always on
Commit
99e71c029213 ("arm64: dts: imx8mq-librem5: Don't mark buck3 as always on")
removed always-on marking from GPU regulator, which is great for power
saving - however it introduces additional i2c0 traffic which can be deadly
for devices from the Dogwood batch.
To workaround the i2c0 shutdown issue on Dogwood, this commit marks
buck3 as always-on again - but only for Dogwood (r3).
Signed-off-by: Sebastian Krzyszkowiak <sebastian.krzyszkowiak@puri.sm>
Signed-off-by: Martin Kepplinger <martin.kepplinger@puri.sm>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Guido Günther [Mon, 15 Mar 2021 08:35:29 +0000 (09:35 +0100)]
arm64: dts: imx8mq-librem5: Hog the correct gpio
There was an additional alias in the specifier it hogged line 27
instead of line 1.
Signed-off-by: Guido Günther <agx@sigxcpu.org>
Signed-off-by: Martin Kepplinger <martin.kepplinger@puri.sm>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Russell King [Tue, 9 Mar 2021 16:36:58 +0000 (16:36 +0000)]
arm64: dts: lx2160a-clearfog-itx: add SFP support
Add 2x2 SFP+ cage support for clearfog-itx boards.
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Teresa Remmet [Thu, 11 Mar 2021 06:14:46 +0000 (07:14 +0100)]
arm64: dts: imx8mp-phyboard-pollux-rdk: Change debug UART
With the first redesign the debug UART had changed from
UART2 to UART1.
As the first hardware revision is considered as alpha and
will not be supported in future. The old setup will not
be preserved.
Signed-off-by: Teresa Remmet <t.remmet@phytec.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Kuldeep Singh [Tue, 9 Mar 2021 11:14:25 +0000 (16:44 +0530)]
arm64: dts: imx8mn: Reorder flexspi clock-names entry
Reorder flexspi clock-names entry to make it compliant with bindings.
Signed-off-by: Kuldeep Singh <kuldeep.singh@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Kuldeep Singh [Tue, 9 Mar 2021 11:14:24 +0000 (16:44 +0530)]
arm64: dts: imx8mm: Reorder flexspi clock-names entry
Reorder flexspi clock-names entry to make it compliant with bindings.
Signed-off-by: Kuldeep Singh <kuldeep.singh@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Vladimir Oltean [Mon, 8 Mar 2021 13:08:34 +0000 (15:08 +0200)]
arm64: dts: ls1028a: set up the real link speed for ENETC port 2
In NXP LS1028A there is a MAC-to-MAC internal link between enetc_port2
and mscc_felix_port4. This link operates at 2.5Gbps and is described as
such for the mscc_felix_port4 node.
The reason for the discrepancy is a limitation in the PHY library
support for fixed-link nodes. Due to the fact that the PHY library
registers a software PHY which emulates the clause 22 register map, the
drivers/net/phy/fixed_phy.c driver only supports speeds up to 1Gbps.
The mscc_felix_port4 node is probed by DSA, which does not use the PHY
library directly, but phylink, and phylink has a different representation
for fixed-link nodes, one that does not have the limitation of not being
able to represent speeds > 1Gbps.
Since the enetc driver was converted to phylink too as of commit
71b77a7a27a3 ("enetc: Migrate to PHYLINK and PCS_LYNX"), the limitation
has been practically lifted there too, and we can describe the real link
speed in the device tree now.
Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Adrien Grassein [Mon, 8 Mar 2021 12:55:18 +0000 (13:55 +0100)]
arm64: dts: imx8mm-nitrogen-r2: add ecspi2 support
Add the description for ecspi2 support.
Signed-off-by: Adrien Grassein <adrien.grassein@gmail.com>
Reviewed-by: Krzysztof Kozlowski <krzk@kernel.org>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Reviewed-by: Marco Felsch <m.felsch@pengutronix.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Dong Aisheng [Mon, 8 Mar 2021 03:14:30 +0000 (11:14 +0800)]
arm64: dts: imx: add imx8qm mek support
The i.MX8QuadMax is a Dual (2x) Cortex-A72 and Quad (4x) Cortex-A53
proccessor with powerful graphic and multimedia features.
This patch adds i.MX8QuadMax MEK board support.
Note that MX8QM needs a special workaround for TLB flush due to a SoC
errata, otherwise there may be random crash if enable both clusters of
A72 and A53. As the errata workaround is still not in mainline, so we
disable A72 cluster first for MX8QM MEK.
Cc: Rob Herring <robh+dt@kernel.org>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: devicetree@vger.kernel.org
Cc: Sascha Hauer <kernel@pengutronix.de>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Dong Aisheng [Mon, 8 Mar 2021 03:14:29 +0000 (11:14 +0800)]
arm64: dts: imx: add imx8qm common dts file
The i.MX8QuadMax is a Dual (2x) Cortex-A72 and Quad (4x) Cortex-A53
proccessor with powerful graphic and multimedia features. It uses
the same architecture as MX8QXP, so many SS can be reused.
This patch adds i.MX8QuadMax SoC dtsi file.
Cc: Rob Herring <robh+dt@kernel.org>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: devicetree@vger.kernel.org
Cc: Sascha Hauer <kernel@pengutronix.de>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Dong Aisheng [Mon, 8 Mar 2021 03:14:28 +0000 (11:14 +0800)]
arm64: dts: imx8qm: add dma ss support
The DMA SS of MX8QM is mostly the same as the DMA part in MX8QXP ADMA SS
while it has one more instance for each of LPUART, ADC and LPI2C. And unlike
MX8QXP that flexcan clocks are shared between multiple CAN instances,
MX8QM has separate flexcan clock slice.
So we reuse the most part of common imx8-ss-dma.dtsi and add new things
based on it.
Cc: Rob Herring <robh+dt@kernel.org>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: devicetree@vger.kernel.org
Cc: Sascha Hauer <kernel@pengutronix.de>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Dong Aisheng [Mon, 8 Mar 2021 03:14:27 +0000 (11:14 +0800)]
arm64: dts: imx8: split adma ss into dma and audio ss
amda ss is consisted of dma and audio ss in qxp which are
also used in qm.
Let's split them into two ss for better code reuse.
Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Dong Aisheng [Mon, 8 Mar 2021 03:14:26 +0000 (11:14 +0800)]
arm64: dts: imx8qm: add conn ss support
The CONN SS of MX8QM is mostly the same as MX8QXP except it has one more
USB HSIC module support. So we can fully reuse the exist CONN SS dtsi.
Add <soc>-ss-conn.dtsi with compatible string updated according to
imx8-ss-conn.dtsi.
Cc: Rob Herring <robh+dt@kernel.org>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: devicetree@vger.kernel.org
Cc: Sascha Hauer <kernel@pengutronix.de>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Dong Aisheng [Mon, 8 Mar 2021 03:14:25 +0000 (11:14 +0800)]
arm64: dts: imx8qm: add lsio ss support
The LSIO SS of MX8QM is exactly the same as MX8QXP. So we can fully
reuse the exist LSIO SS dtsi. Add <soc>-ss-lsio.dtsi with compatible
string updated according to imx8-ss-lsio.dtsi.
Cc: Rob Herring <robh+dt@kernel.org>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: devicetree@vger.kernel.org
Cc: Sascha Hauer <kernel@pengutronix.de>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>