linux.git
10 months agoMerge branch 'pci/misc'
Bjorn Helgaas [Thu, 16 May 2024 23:14:14 +0000 (18:14 -0500)]
Merge branch 'pci/misc'

- Constify pcibus_class (Heiner Kallweit)

- Annotate pci_cache_line_size variables as __ro_after_init (Heiner
  Kallweit)

- Clean up formatting of PCI accessor macros (Ilpo Järvinen)

- Remove some OLPC dead code (Kunwu Chan)

- Make pcie_bandwidth_capable() static (Ilpo Järvinen)

* pci/misc:
  PCI: Make pcie_bandwidth_capable() static
  x86/pci: Remove OLPC dead code
  PCI: Clean up accessor macro formatting
  PCI/ERR: Cleanup misleading indentation inside if conditions
  PCI: Annotate pci_cache_line_size variables as __ro_after_init
  PCI: Constify pcibus_class

10 months agoMerge branch 'pci/ims-removal'
Bjorn Helgaas [Thu, 16 May 2024 23:14:14 +0000 (18:14 -0500)]
Merge branch 'pci/ims-removal'

- Remove unused Interrupt Message Store (IMS) support (Bjorn Helgaas)

* pci/ims-removal:
  Revert "genirq/msi: Provide constants for PCI/IMS support"
  Revert "x86/apic/msi: Enable PCI/IMS"
  Revert "iommu/vt-d: Enable PCI/IMS"
  Revert "iommu/amd: Enable PCI/IMS"
  Revert "PCI/MSI: Provide IMS (Interrupt Message Store) support"
  Revert "PCI/MSI: Provide pci_ims_alloc/free_irq()"
  Revert "PCI/MSI: Provide stubs for IMS functions"

10 months agoMerge branch 'pci/endpoint'
Bjorn Helgaas [Thu, 16 May 2024 23:14:13 +0000 (18:14 -0500)]
Merge branch 'pci/endpoint'

- Simplify pci_epf_test_alloc_space() by using pci_epc_get_next_free_bar()
  as other similar iterators do (Niklas Cassel)

- Configure endpoint BARs as 64-bit if that's all the hardware supports, in
  addition to doing it if the BAR size is larger than 2GB (Niklas Cassel)

- Remove superfluous pci_epf_configure_bar(), since pci_epf_alloc_space()
  now contains that functionality (Niklas Cassel)

- Simplify pci_epf_test_set_bar() (Niklas Cassel)

- Clean up pci_epf_test_unbind() to reduce indentation level (Niklas
  Cassel)

* pci/endpoint:
  PCI: endpoint: pci-epf-test: Clean up pci_epf_test_unbind()
  PCI: endpoint: pci-epf-test: Simplify pci_epf_test_set_bar() loop
  PCI: endpoint: pci-epf-test: Remove superfluous code
  PCI: endpoint: Allocate a 64-bit BAR if that is the only option
  PCI: endpoint: pci-epf-test: Simplify pci_epf_test_alloc_space() loop

10 months agoMerge branch 'pci/controller/tegra194'
Bjorn Helgaas [Thu, 16 May 2024 23:14:13 +0000 (18:14 -0500)]
Merge branch 'pci/controller/tegra194'

- Return success from endpoint probe before incorrectly dropping the
  reference to the BPMP (Vidya Sagar)

* pci/controller/tegra194:
  PCI: tegra194: Fix probe path for Endpoint mode

10 months agoMerge branch 'pci/controller/rockchip'
Bjorn Helgaas [Thu, 16 May 2024 23:14:13 +0000 (18:14 -0500)]
Merge branch 'pci/controller/rockchip'

- Configure endpoint BAR to be 64-bit if the PCI_BASE_ADDRESS_MEM_TYPE_64
  flag is set instead of depending on the new BAR value itself (Niklas
  Cassel)

- Set Subsystem Vendor ID correctly (Rick Wertenbroek)

* pci/controller/rockchip:
  PCI: rockchip-ep: Remove wrong mask on subsys_vendor_id
  PCI: rockchip-ep: Set a 64-bit BAR if requested

10 months agoMerge branch 'pci/controller/mt7621'
Bjorn Helgaas [Thu, 16 May 2024 23:14:13 +0000 (18:14 -0500)]
Merge branch 'pci/controller/mt7621'

- Enlarge PHY name buffer to avoid snprintf() overflow (Sergio Paracuellos)

* pci/controller/mt7621:
  PCI: mt7621: Fix string truncation in mt7621_pcie_parse_port()

10 months agoMerge branch 'pci/controller/dwc'
Bjorn Helgaas [Thu, 16 May 2024 23:14:12 +0000 (18:14 -0500)]
Merge branch 'pci/controller/dwc'

- Move DBI accesses from dw_pcie_ep_init() to dw_pcie_ep_init_complete() so
  drivers for endpoints that require Refclk for DBI access, e.g., qcom and
  tegra194, can control when this happens (Manivannan Sadhasivam)

- Add endpoint API kernel-doc (Manivannan Sadhasivam)

- Remove .deinit() callback and instead call rcar_gen4_pcie_ep_deinit()
  explicitly from rcar-gen4, which was the only user (Manivannan
  Sadhasivam)

- Rename dw_pcie_ep_exit() to dw_pcie_ep_deinit() to correspond with
  dw_pcie_ep_init() (Manivannan Sadhasivam)

- Add dw_pcie_ep_cleanup() for drivers that need to clean up eDMA resources
  when PERST# is asserted, e.g., qcom, tegra194 (Manivannan Sadhasivam)

- Rename dw_pcie_ep_init_complete() to dw_pcie_ep_init_registers() to
  better reflect the functionality (Manivannan Sadhasivam)

- Call dw_pcie_ep_init_registers() directly from drivers instead of from
  dw_pcie_ep_init() so drivers, e.g., qcom and tegra194, can do it when
  Refclk is available (Manivannan Sadhasivam)

- Remove the "core_init_notifier" flag, which previously identified drivers
  that required Refclk before DBI access, because it's now unnecessary
  (Manivannan Sadhasivam)

* pci/controller/dwc:
  PCI: endpoint: Remove "core_init_notifier" flag
  PCI: dwc: ep: Call dw_pcie_ep_init_registers() API directly from all glue drivers
  PCI: dwc: ep: Rename dw_pcie_ep_init_complete() to dw_pcie_ep_init_registers()
  PCI: dwc: ep: Introduce dw_pcie_ep_cleanup() API for drivers supporting PERST#
  PCI: dwc: ep: Rename dw_pcie_ep_exit() to dw_pcie_ep_deinit()
  PCI: dwc: ep: Remove deinit() callback from struct dw_pcie_ep_ops
  PCI: dwc: ep: Add Kernel-doc comments for APIs
  PCI: dwc: ep: Fix DBI access failure for drivers requiring refclk from host

10 months agoMerge branch 'pci/controller/cadence'
Bjorn Helgaas [Thu, 16 May 2024 23:14:12 +0000 (18:14 -0500)]
Merge branch 'pci/controller/cadence'

- Configure endpoint BAR to be 64-bit if the PCI_BASE_ADDRESS_MEM_TYPE_64
  flag is set instead of depending on the new BAR value itself (Niklas
  Cassel)

* pci/controller/cadence:
  PCI: cadence: Set a 64-bit BAR if requested

10 months agoMerge branch 'pci/dt-bindings'
Bjorn Helgaas [Thu, 16 May 2024 23:14:12 +0000 (18:14 -0500)]
Merge branch 'pci/dt-bindings'

- Add rcar-pci-host missing IOMMU properties (Geert Uytterhoeven)

- Add ti,j721e-pci-host J784S4 Device ID (Siddharth Vadapalli)

- Add ti,j721e-pci-host J722S compatible string (Siddharth Vadapalli)

- Add ti,am65 num-viewport, phys, and phy-name properties (Jan Kiszka)

- Drop cdns,cdns-pcie-host redundant msi-parent and pci-bus.yaml (Krzysztof
  Kozlowski)

- Add mediatek,mt7621 missing reg property for child Root Ports (Krzysztof
  Kozlowski)

- Switch bindings from pci-bus.yaml to pci-host-bridge.yaml (Krzysztof
  Kozlowski)

- Convert fsl,layerscape host and endpoint bindings to YAML (Frank Li)

- Add rcar-gen4-pci-host R-Car V4H (R8A779G0) compatible strings for both
  host and endpoint mode (Yoshihiro Shimoda)

- Add rockchip,rk3399-pcie maxItems for ep-gpios (Krzysztof Kozlowski)

* pci/dt-bindings:
  dt-bindings: PCI: rockchip,rk3399-pcie: Add missing maxItems to ep-gpios
  dt-bindings: PCI: rcar-gen4-pci-ep: Add R-Car V4H compatible
  dt-bindings: PCI: rcar-gen4-pci-host: Add R-Car V4H compatible
  dt-bindings: PCI: layerscape-pci: Convert to YAML format
  dt-bindings: PCI: mediatek,mt7621-pcie: Switch from deprecated pci-bus.yaml
  dt-bindings: PCI: host-bridges: Switch from deprecated pci-bus.yaml
  dt-bindings: PCI: mediatek,mt7621: Add missing child node reg
  dt-bindings: PCI: cdns,cdns-pcie-host: Drop redundant msi-parent and pci-bus.yaml
  dt-bindings: PCI: ti,am65: Fix remaining binding warnings
  dt-bindings: PCI: ti,j721e-pci-host: Add support for J722S SoC
  dt-bindings: PCI: rcar-pci-host: Add missing IOMMU properties
  dt-bindings: PCI: ti,j721e-pci-host: Add device-id for TI's J784S4 SoC

10 months agoMerge branch 'pci/pm'
Bjorn Helgaas [Thu, 16 May 2024 23:14:11 +0000 (18:14 -0500)]
Merge branch 'pci/pm'

- Avoid D3cold for HP Pavilion 17 PC/1972 PCIe Ports because we can't get
  them back out of D3cold (Mario Limonciello)

* pci/pm:
  PCI/PM: Avoid D3cold for HP Pavilion 17 PC/1972 PCIe Ports

10 months agoMerge branch 'pci/of'
Bjorn Helgaas [Thu, 16 May 2024 23:14:11 +0000 (18:14 -0500)]
Merge branch 'pci/of'

- Check for kcalloc() failure and handle it gracefully (Duoming Zhou)

* pci/of:
  PCI: of_property: Return error for int_map allocation failure

10 months agoMerge branch 'pci/msi'
Bjorn Helgaas [Thu, 16 May 2024 23:14:11 +0000 (18:14 -0500)]
Merge branch 'pci/msi'

- Update coding style to "mainline is normal path, errors are the
  exceptions" (Andy Shevchenko)

* pci/msi:
  PCI/MSI: Make error path handling follow the standard pattern

10 months agoMerge branch 'pci/hotplug'
Bjorn Helgaas [Thu, 16 May 2024 23:14:10 +0000 (18:14 -0500)]
Merge branch 'pci/hotplug'

- Update hotplug TODO notes (Nam Cao)

* pci/hotplug:
  PCI: hotplug: Remove obsolete sgi_hotplug TODO notes
  PCI: hotplug: Document unchecked return value of pci_hp_add_bridge()

10 months agoMerge branch 'pci/enumeration'
Bjorn Helgaas [Thu, 16 May 2024 23:14:10 +0000 (18:14 -0500)]
Merge branch 'pci/enumeration'

- Clear bridge Secondary Status errors after enumeration since enumeration
  causes many errors (Vidya Sagar)

- Wait for Link Training==0 before starting Link retrain to avoid a race;
  this was done previously but broken by a faulty merge (Ilpo Järvinen)

- Rename PCI_IRQ_LEGACY to PCI_IRQ_INTX to be more specific about what
  "LEGACY" means (Damien Le Moal)

- Update return types of pci_find_capability() stubs to match the extern
  declarations for the actual implementations (Bjorn Helgaas)

- Drop unnecessary pci_enable_device_io() from pata_cs5520 (Heiner
  Kallweit)

- Drop unused pci_enable_device_io() (Heiner Kallweit)

- On 2016 and newer BIOSes, skip early E820 check for ECAM regions
  described in ACPI MCFG; there's no spec requirement for E820
  reservations, and some machines don't provide them (Bjorn Helgaas)

- If devices were disconnected while suspended, don't wait for them when
  resuming (Ilpo Järvinen)

* pci/enumeration:
  PCI: Do not wait for disconnected devices when resuming
  x86/pci: Skip early E820 check for ECAM region
  PCI: Remove unused pci_enable_device_io()
  ata: pata_cs5520: Remove unnecessary call to pci_enable_device_io()
  PCI: Update pci_find_capability() stub return types
  PCI: Remove PCI_IRQ_LEGACY
  scsi: vmw_pvscsi: Do not use PCI_IRQ_LEGACY instead of PCI_IRQ_LEGACY
  scsi: pmcraid: Use PCI_IRQ_INTX instead of PCI_IRQ_LEGACY
  scsi: mpt3sas: Use PCI_IRQ_INTX instead of PCI_IRQ_LEGACY
  scsi: megaraid_sas: Use PCI_IRQ_INTX instead of PCI_IRQ_LEGACY
  scsi: ipr: Use PCI_IRQ_INTX instead of PCI_IRQ_LEGACY
  scsi: hpsa: Use PCI_IRQ_INTX instead of PCI_IRQ_LEGACY
  scsi: arcmsr: Use PCI_IRQ_INTX instead of PCI_IRQ_LEGACY
  wifi: rtw89: Use PCI_IRQ_INTX instead of PCI_IRQ_LEGACY
  wifi: rtw88: Use PCI_IRQ_INTX instead of PCI_IRQ_LEGACY
  wifi: ath10k: Refer to INTX instead of LEGACY
  net: wangxun: Use PCI_IRQ_INTX instead of PCI_IRQ_LEGACY
  r8169: Use PCI_IRQ_INTX instead of PCI_IRQ_LEGACY
  net: alx: Use PCI_IRQ_INTX instead of PCI_IRQ_LEGACY
  net: atlantic: Use PCI_IRQ_INTX instead of PCI_IRQ_LEGACY
  net: amd-xgbe: Use PCI_IRQ_INTX instead of PCI_IRQ_LEGACY
  VMCI: Use PCI_IRQ_ALL_TYPES to remove PCI_IRQ_LEGACY use
  RDMA/vmw_pvrdma: Use PCI_IRQ_INTX instead of PCI_IRQ_LEGACY
  IB/qib: Use PCI_IRQ_INTX instead of PCI_IRQ_LEGACY
  drm/amdgpu: Use PCI_IRQ_INTX instead of PCI_IRQ_LEGACY
  mfd: intel-lpss: Use PCI_IRQ_INTX instead of PCI_IRQ_LEGACY
  ntb: idt: Use PCI_IRQ_INTX instead of PCI_IRQ_LEGACY
  platform/x86: intel_ips: Use PCI_IRQ_INTX instead of PCI_IRQ_LEGACY
  tty: 8250_pci: Use PCI_IRQ_INTX instead of PCI_IRQ_LEGACY
  usb: hcd-pci: Use PCI_IRQ_INTX instead of PCI_IRQ_LEGACY
  ASoC: Intel: avs: Use PCI_IRQ_INTX instead of PCI_IRQ_LEGACY
  Documentation: PCI: Use PCI_IRQ_INTX instead of PCI_IRQ_LEGACY
  PCI/portdrv: Use PCI_IRQ_INTX instead of PCI_IRQ_LEGACY
  PCI/MSI: Use PCI_IRQ_INTX instead of PCI_IRQ_LEGACY
  PCI: Clarify intent of LT wait
  PCI: Wait for Link Training==0 before starting Link retrain
  PCI: Clear Secondary Status errors after enumeration

10 months agoMerge branch 'pci/edr'
Bjorn Helgaas [Thu, 16 May 2024 23:14:10 +0000 (18:14 -0500)]
Merge branch 'pci/edr'

- Specify Revision 6 of the "Enable DPC" _DSM function to match the
  implementation (Kuppuswamy Sathyanarayanan)

- Check for failure of the "Locate Port" _DSM function (Kuppuswamy
  Sathyanarayanan)

* pci/edr:
  PCI/EDR: Align EDR_PORT_LOCATE_DSM with PCI Firmware r3.3
  PCI/EDR: Align EDR_PORT_DPC_ENABLE_DSM with PCI Firmware r3.3

10 months agoMerge branch 'pci/doe'
Bjorn Helgaas [Thu, 16 May 2024 23:14:09 +0000 (18:14 -0500)]
Merge branch 'pci/doe'

- Add support for DOE Discovery version 2 (Alexey Kardashevskiy)

* pci/doe:
  PCI/DOE: Support discovery version 2

10 months agoMerge branch 'pci/cxl'
Bjorn Helgaas [Thu, 16 May 2024 23:14:09 +0000 (18:14 -0500)]
Merge branch 'pci/cxl'

- Lock the upstream bridge while using it to perform a Secondary Bus Reset
  (Dave Jiang)

- Return failure when attempting Secondary Bus Reset below a CXL Port that
  has SBR masked (Dave Jiang)

- Add a "cxl_bus" reset method that temporarily unmasks SBR (Dave Jiang)

- Add a warning if we reset a CXL type 3 memory device that was in use
  while being reset (Dave Jiang)

* pci/cxl:
  cxl: Add post-reset warning if reset results in loss of previously committed HDM decoders
  PCI/CXL: Add 'cxl_bus' reset method for devices below CXL Ports
  PCI/CXL: Fail bus reset if upstream CXL Port has SBR masked
  PCI: Lock upstream bridge for pci_reset_function()
  PCI/CXL: Move CXL Vendor ID to pci_ids.h

10 months agoMerge branch 'pci/aspm'
Bjorn Helgaas [Thu, 16 May 2024 23:14:09 +0000 (18:14 -0500)]
Merge branch 'pci/aspm'

- Consolidate #defines for link states (L0s, L1, L1.1, etc) to simplify
  ASPM implementation (Ilpo Järvinen)

- Simplify ASPM disable/enable mask calculation (Ilpo Järvinen)

* pci/aspm:
  PCI/ASPM: Clean up ASPM disable/enable mask calculation
  PCI/ASPM: Consolidate link state defines

10 months agoMerge branch 'pci/aer'
Bjorn Helgaas [Thu, 16 May 2024 23:14:08 +0000 (18:14 -0500)]
Merge branch 'pci/aer'

- Mask reporting of Mask Replay Timer Timeout Correctable Errors in the
  bridge above Genesys GL975x SD host controllers; the errors are caused by
  a GL975x hardware defect and they may lead to AER interrupts that prevent
  system suspend (Kai-Heng Feng)

- Update URL of aer-inject tool (Kuppuswamy Sathyanarayanan)

* pci/aer:
  PCI/AER: Update aer-inject tool source URL
  PCI: Mask Replay Timer Timeout errors for Genesys GL975x SD host controller

10 months agoPCI: Do not wait for disconnected devices when resuming
Ilpo Järvinen [Thu, 8 Feb 2024 13:23:21 +0000 (15:23 +0200)]
PCI: Do not wait for disconnected devices when resuming

On runtime resume, pci_dev_wait() is called:

  pci_pm_runtime_resume()
    pci_pm_bridge_power_up_actions()
      pci_bridge_wait_for_secondary_bus()
        pci_dev_wait()

While a device is runtime suspended along with its PCI hierarchy, the
device could get disconnected. In such case, the link will not come up no
matter how long pci_dev_wait() waits for it.

Besides the above mentioned case, there could be other ways to get the
device disconnected while pci_dev_wait() is waiting for the link to come
up.

Make pci_dev_wait() exit if the device is already disconnected to avoid
unnecessary delay.

The use cases of pci_dev_wait() boil down to two:

  1. Waiting for the device after reset
  2. pci_bridge_wait_for_secondary_bus()

The callers in both cases seem to benefit from propagating the
disconnection as error even if device disconnection would be more
analoguous to the case where there is no device in the first place which
return 0 from pci_dev_wait(). In the case 2, it results in unnecessary
marking of the devices disconnected again but that is just harmless extra
work.

Also make sure compiler does not become too clever with dev->error_state
and use READ_ONCE() to force a fetch for the up-to-date value.

Link: https://lore.kernel.org/r/20240208132322.4811-1-ilpo.jarvinen@linux.intel.com
Reported-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Tested-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Signed-off-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
10 months agox86/pci: Skip early E820 check for ECAM region
Bjorn Helgaas [Wed, 17 Apr 2024 20:40:12 +0000 (15:40 -0500)]
x86/pci: Skip early E820 check for ECAM region

Arul, Mateusz, Imcarneiro91, and Aman reported a regression caused by
07eab0901ede ("efi/x86: Remove EfiMemoryMappedIO from E820 map").  On the
Lenovo Legion 9i laptop, that commit removes the ECAM area from E820, which
means the early E820 validation fails, which means we don't enable ECAM in
the "early MCFG" path.

The static MCFG table describes ECAM without depending on the ACPI
interpreter.  Many Legion 9i ACPI methods rely on that, so they fail when
PCI config access isn't available, resulting in the embedded controller,
PS/2, audio, trackpad, and battery devices not being detected.  The _OSC
method also fails, so Linux can't take control of the PCIe hotplug, PME,
and AER features:

  # pci_mmcfg_early_init()

  PCI: ECAM [mem 0xc0000000-0xce0fffff] (base 0xc0000000) for domain 0000 [bus 00-e0]
  PCI: not using ECAM ([mem 0xc0000000-0xce0fffff] not reserved)

  ACPI Error: AE_ERROR, Returned by Handler for [PCI_Config] (20230628/evregion-300)
  ACPI: Interpreter enabled
  ACPI: Ignoring error and continuing table load
  ACPI BIOS Error (bug): Could not resolve symbol [\_SB.PC00.RP01._SB.PC00], AE_NOT_FOUND (20230628/dswload2-162)
  ACPI Error: AE_NOT_FOUND, During name lookup/catalog (20230628/psobject-220)
  ACPI: Skipping parse of AML opcode: OpcodeName unavailable (0x0010)
  ACPI BIOS Error (bug): Could not resolve symbol [\_SB.PC00.RP01._SB.PC00], AE_NOT_FOUND (20230628/dswload2-162)
  ACPI Error: AE_NOT_FOUND, During name lookup/catalog (20230628/psobject-220)
  ...
  ACPI Error: Aborting method \_SB.PC00._OSC due to previous error (AE_NOT_FOUND) (20230628/psparse-529)
  acpi PNP0A08:00: _OSC: platform retains control of PCIe features (AE_NOT_FOUND)

  # pci_mmcfg_late_init()

  PCI: ECAM [mem 0xc0000000-0xce0fffff] (base 0xc0000000) for domain 0000 [bus 00-e0]
  PCI: [Firmware Info]: ECAM [mem 0xc0000000-0xce0fffff] not reserved in ACPI motherboard resources
  PCI: ECAM [mem 0xc0000000-0xce0fffff] is EfiMemoryMappedIO; assuming valid
  PCI: ECAM [mem 0xc0000000-0xce0fffff] reserved to work around lack of ACPI motherboard _CRS

Per PCI Firmware r3.3, sec 4.1.2, ECAM space must be reserved by a PNP0C02
resource, but there's no requirement to mention it in E820, so we shouldn't
look at E820 to validate the ECAM space described by MCFG.

In 2006, 946f2ee5c731 ("[PATCH] i386/x86-64: Check that MCFG points to an
e820 reserved area") added a sanity check of E820 to work around buggy MCFG
tables, but that over-aggressive validation causes failures like this one.

Keep the E820 validation check for machines older than 2016, an arbitrary
ten years after 946f2ee5c731, so machines that depend on it don't break.

Skip the early E820 check for 2016 and newer BIOSes since there's no
requirement to describe ECAM in E820.

Link: https://lore.kernel.org/r/20240417204012.215030-2-helgaas@kernel.org
Fixes: 07eab0901ede ("efi/x86: Remove EfiMemoryMappedIO from E820 map")
Reported-by: Mateusz Kaduk <mateusz.kaduk@gmail.com>
Closes: https://bugzilla.kernel.org/show_bug.cgi?id=218444
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Tested-by: Mateusz Kaduk <mateusz.kaduk@gmail.com>
Reviewed-by: Andy Shevchenko <andy@kernel.org>
Reviewed-by: Hans de Goede <hdegoede@redhat.com>
Reviewed-by: Kuppuswamy Sathyanarayanan <sathyanarayanan.kuppuswamy@linux.intel.com>
Cc: stable@vger.kernel.org
10 months agoPCI: Remove unused pci_enable_device_io()
Heiner Kallweit [Sat, 23 Mar 2024 17:16:36 +0000 (18:16 +0100)]
PCI: Remove unused pci_enable_device_io()

After the last user was removed, remove this PCI core function.  It's very
unlikely that we'll see a new device requiring io space access, even though
memory space access is supported.

Link: https://lore.kernel.org/r/213ebf62-53a3-42b7-8518-ecd5cd6d6b08@gmail.com
Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Reviewed-by: Damien Le Moal <dlemoal@kernel.org>
10 months agoata: pata_cs5520: Remove unnecessary call to pci_enable_device_io()
Heiner Kallweit [Sat, 23 Mar 2024 17:14:45 +0000 (18:14 +0100)]
ata: pata_cs5520: Remove unnecessary call to pci_enable_device_io()

A few lines earlier pcim_enable_device() is called, which includes the
functionality of pci_enable_device_io(). Therefore we can safely remove the
call to pci_enable_device_io().

Link: https://lore.kernel.org/r/5068d0ce-2140-4d3f-b305-e8f0d61eed1f@gmail.com
Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Reviewed-by: Sergey Shtylyov <s.shtylyov@omp.ru>
Acked-by: Damien Le Moal <dlemoal@kernel.org>
10 months agoPCI: Update pci_find_capability() stub return types
Bjorn Helgaas [Wed, 27 Mar 2024 18:02:34 +0000 (13:02 -0500)]
PCI: Update pci_find_capability() stub return types

f646c2a0a668 ("PCI: Return u8 from pci_find_capability() and similar") and
ee8b1c478a9f ("PCI: Return u16 from pci_find_ext_capability() and similar")
updated the return type of the extern declarations, but neglected to update
the type of the stubs used when CONFIG_PCI is not enabled.

Update them to match the extern declarations.

Link: https://lore.kernel.org/r/20240327180234.1529164-1-helgaas@kernel.org
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Reviewed-by: Kuppuswamy Sathyanarayanan <sathyanarayanan.kuppuswamy@linux.intel.com>
10 months agoPCI: Remove PCI_IRQ_LEGACY
Damien Le Moal [Mon, 25 Mar 2024 07:09:39 +0000 (16:09 +0900)]
PCI: Remove PCI_IRQ_LEGACY

Replace the last references to PCI_IRQ_LEGACY with PCI_IRQ_INTX in pci.h
header file. With this change, PCI_IRQ_LEGACY is unused and we can remove
its definition.

Link: https://lore.kernel.org/r/20240325070944.3600338-29-dlemoal@kernel.org
Signed-off-by: Damien Le Moal <dlemoal@kernel.org>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
10 months agoscsi: vmw_pvscsi: Do not use PCI_IRQ_LEGACY instead of PCI_IRQ_LEGACY
Damien Le Moal [Mon, 25 Mar 2024 07:09:38 +0000 (16:09 +0900)]
scsi: vmw_pvscsi: Do not use PCI_IRQ_LEGACY instead of PCI_IRQ_LEGACY

In pvscsi_probe(), initialize irq_flag using PCI_IRQ_ALL_TYPES to remove
the use of the deprecated PCI_IRQ_LEGACY macro.

Link: https://lore.kernel.org/r/20240325070944.3600338-28-dlemoal@kernel.org
Signed-off-by: Damien Le Moal <dlemoal@kernel.org>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Acked-by: Martin K. Petersen <martin.petersen@oracle.com>
10 months agoscsi: pmcraid: Use PCI_IRQ_INTX instead of PCI_IRQ_LEGACY
Damien Le Moal [Mon, 25 Mar 2024 07:09:37 +0000 (16:09 +0900)]
scsi: pmcraid: Use PCI_IRQ_INTX instead of PCI_IRQ_LEGACY

Use the macro PCI_IRQ_INTX instead of the deprecated PCI_IRQ_LEGACY macro.

Link: https://lore.kernel.org/r/20240325070944.3600338-27-dlemoal@kernel.org
Signed-off-by: Damien Le Moal <dlemoal@kernel.org>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Acked-by: Martin K. Petersen <martin.petersen@oracle.com>
10 months agoscsi: mpt3sas: Use PCI_IRQ_INTX instead of PCI_IRQ_LEGACY
Damien Le Moal [Mon, 25 Mar 2024 07:09:36 +0000 (16:09 +0900)]
scsi: mpt3sas: Use PCI_IRQ_INTX instead of PCI_IRQ_LEGACY

Use the macro PCI_IRQ_INTX instead of the deprecated PCI_IRQ_LEGACY macro.

Link: https://lore.kernel.org/r/20240325070944.3600338-26-dlemoal@kernel.org
Signed-off-by: Damien Le Moal <dlemoal@kernel.org>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Acked-by: Martin K. Petersen <martin.petersen@oracle.com>
10 months agoscsi: megaraid_sas: Use PCI_IRQ_INTX instead of PCI_IRQ_LEGACY
Damien Le Moal [Mon, 25 Mar 2024 07:09:35 +0000 (16:09 +0900)]
scsi: megaraid_sas: Use PCI_IRQ_INTX instead of PCI_IRQ_LEGACY

Use the macro PCI_IRQ_INTX instead of the deprecated PCI_IRQ_LEGACY macro.

Link: https://lore.kernel.org/r/20240325070944.3600338-25-dlemoal@kernel.org
Signed-off-by: Damien Le Moal <dlemoal@kernel.org>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Acked-by: Martin K. Petersen <martin.petersen@oracle.com>
10 months agoscsi: ipr: Use PCI_IRQ_INTX instead of PCI_IRQ_LEGACY
Damien Le Moal [Mon, 25 Mar 2024 07:09:34 +0000 (16:09 +0900)]
scsi: ipr: Use PCI_IRQ_INTX instead of PCI_IRQ_LEGACY

Use the macro PCI_IRQ_INTX instead of the deprecated PCI_IRQ_LEGACY macro.

Link: https://lore.kernel.org/r/20240325070944.3600338-24-dlemoal@kernel.org
Signed-off-by: Damien Le Moal <dlemoal@kernel.org>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Acked-by: Martin K. Petersen <martin.petersen@oracle.com>
10 months agoscsi: hpsa: Use PCI_IRQ_INTX instead of PCI_IRQ_LEGACY
Damien Le Moal [Mon, 25 Mar 2024 07:09:33 +0000 (16:09 +0900)]
scsi: hpsa: Use PCI_IRQ_INTX instead of PCI_IRQ_LEGACY

Use the macro PCI_IRQ_INTX instead of the deprecated PCI_IRQ_LEGACY macro.

Link: https://lore.kernel.org/r/20240325070944.3600338-23-dlemoal@kernel.org
Signed-off-by: Damien Le Moal <dlemoal@kernel.org>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Acked-by: Martin K. Petersen <martin.petersen@oracle.com>
10 months agoscsi: arcmsr: Use PCI_IRQ_INTX instead of PCI_IRQ_LEGACY
Damien Le Moal [Mon, 25 Mar 2024 07:09:32 +0000 (16:09 +0900)]
scsi: arcmsr: Use PCI_IRQ_INTX instead of PCI_IRQ_LEGACY

Use the macro PCI_IRQ_INTX instead of the deprecated PCI_IRQ_LEGACY macro.

Link: https://lore.kernel.org/r/20240325070944.3600338-22-dlemoal@kernel.org
Signed-off-by: Damien Le Moal <dlemoal@kernel.org>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Acked-by: Martin K. Petersen <martin.petersen@oracle.com>
10 months agowifi: rtw89: Use PCI_IRQ_INTX instead of PCI_IRQ_LEGACY
Damien Le Moal [Mon, 25 Mar 2024 17:55:18 +0000 (12:55 -0500)]
wifi: rtw89: Use PCI_IRQ_INTX instead of PCI_IRQ_LEGACY

Use the macro PCI_IRQ_INTX instead of the deprecated PCI_IRQ_LEGACY macro.

Link: https://lore.kernel.org/r/20240325070944.3600338-21-dlemoal@kernel.org
Signed-off-by: Damien Le Moal <dlemoal@kernel.org>
[bhelgaas: split to separate patch]
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
10 months agodt-bindings: PCI: rockchip,rk3399-pcie: Add missing maxItems to ep-gpios
Krzysztof Kozlowski [Mon, 1 Apr 2024 10:00:58 +0000 (12:00 +0200)]
dt-bindings: PCI: rockchip,rk3399-pcie: Add missing maxItems to ep-gpios

Properties with GPIOs should define number of actual GPIOs, so add
missing maxItems to ep-gpios.  Otherwise multiple GPIOs could be
provided which is not a true hardware description.

Fixes: aa222f9311e1 ("dt-bindings: PCI: Convert Rockchip RK3399 PCIe to DT schema")
Link: https://lore.kernel.org/linux-pci/20240401100058.15749-1-krzysztof.kozlowski@linaro.org
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Krzysztof Wilczyński <kwilczynski@kernel.org>
Acked-by: Conor Dooley <conor.dooley@microchip.com>
10 months agoRevert "genirq/msi: Provide constants for PCI/IMS support"
Bjorn Helgaas [Wed, 10 Apr 2024 22:13:07 +0000 (17:13 -0500)]
Revert "genirq/msi: Provide constants for PCI/IMS support"

This reverts commit e23d4192bf9b612bce5b24f22719fd3cc6edaa69.

IMS (Interrupt Message Store) support appeared in v6.2, but there are no
users yet.

Remove it for now.  We can add it back when a user comes along.

Link: https://lore.kernel.org/r/20240410221307.2162676-8-helgaas@kernel.org
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Reviewed-by: Kevin Tian <kevin.tian@intel.com>
Reviewed-by: Thomas Gleixner <tglx@linutronix.de>
10 months agoRevert "x86/apic/msi: Enable PCI/IMS"
Bjorn Helgaas [Wed, 10 Apr 2024 22:13:06 +0000 (17:13 -0500)]
Revert "x86/apic/msi: Enable PCI/IMS"

This reverts commit 6e24c887732901140f4e82ba2315c2e15f06f1d6.

IMS (Interrupt Message Store) support appeared in v6.2, but there are no
users yet.

Remove it for now.  We can add it back when a user comes along.

Link: https://lore.kernel.org/r/20240410221307.2162676-7-helgaas@kernel.org
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Reviewed-by: Kevin Tian <kevin.tian@intel.com>
Reviewed-by: Thomas Gleixner <tglx@linutronix.de>
10 months agoRevert "iommu/vt-d: Enable PCI/IMS"
Bjorn Helgaas [Wed, 10 Apr 2024 22:13:05 +0000 (17:13 -0500)]
Revert "iommu/vt-d: Enable PCI/IMS"

This reverts commit 810531a1af5393f010d6508b1cb48e6650fc5e8f.

IMS (Interrupt Message Store) support appeared in v6.2, but there are no
users yet.

Remove it for now.  We can add it back when a user comes along.

Link: https://lore.kernel.org/r/20240410221307.2162676-6-helgaas@kernel.org
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Reviewed-by: Kevin Tian <kevin.tian@intel.com>
Reviewed-by: Thomas Gleixner <tglx@linutronix.de>
10 months agoRevert "iommu/amd: Enable PCI/IMS"
Bjorn Helgaas [Wed, 10 Apr 2024 22:13:04 +0000 (17:13 -0500)]
Revert "iommu/amd: Enable PCI/IMS"

This reverts commit fa5745aca1dc819aee6463a2475b5c277f7cf8f6.

IMS (Interrupt Message Store) support appeared in v6.2, but there are no
users yet.

Remove it for now.  We can add it back when a user comes along.

Link: https://lore.kernel.org/r/20240410221307.2162676-5-helgaas@kernel.org
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Reviewed-by: Kevin Tian <kevin.tian@intel.com>
Reviewed-by: Thomas Gleixner <tglx@linutronix.de>
10 months agoRevert "PCI/MSI: Provide IMS (Interrupt Message Store) support"
Bjorn Helgaas [Wed, 10 Apr 2024 22:13:03 +0000 (17:13 -0500)]
Revert "PCI/MSI: Provide IMS (Interrupt Message Store) support"

This reverts commit 0194425af0c87acaad457989a2c6d90dba58e776.

IMS (Interrupt Message Store) support appeared in v6.2, but there are no
users yet.

Remove it for now.  We can add it back when a user comes along.  If this is
re-added later, the relevant part of 41efa431244f ("PCI/MSI: Provide stubs
for IMS functions") should be squashed into it.

Link: https://lore.kernel.org/r/20240410221307.2162676-4-helgaas@kernel.org
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Reviewed-by: Kevin Tian <kevin.tian@intel.com>
Reviewed-by: Thomas Gleixner <tglx@linutronix.de>
10 months agoRevert "PCI/MSI: Provide pci_ims_alloc/free_irq()"
Bjorn Helgaas [Wed, 10 Apr 2024 22:13:02 +0000 (17:13 -0500)]
Revert "PCI/MSI: Provide pci_ims_alloc/free_irq()"

This reverts commit c9e5bea273834a63b5e9ba90ad94b305ba50704e.

IMS (Interrupt Message Store) support appeared in v6.2, but there are no
users yet.

Remove it for now.  We can add it back when a user comes along.  If this is
re-added later, the relevant part of 41efa431244f ("PCI/MSI: Provide stubs
for IMS functions") should be squashed into it.

Link: https://lore.kernel.org/r/20240410221307.2162676-3-helgaas@kernel.org
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Reviewed-by: Kevin Tian <kevin.tian@intel.com>
Reviewed-by: Thomas Gleixner <tglx@linutronix.de>
10 months agoRevert "PCI/MSI: Provide stubs for IMS functions"
Bjorn Helgaas [Wed, 10 Apr 2024 22:13:01 +0000 (17:13 -0500)]
Revert "PCI/MSI: Provide stubs for IMS functions"

This reverts commit 41efa431244f6498833ff8ee8dde28c4924c5479.

IMS (Interrupt Message Store) support appeared in v6.2, but there are no
users yet.

Remove it for now.  We can add it back when a user comes along.  If this is
re-added later, this could be squashed with these commits:

  0194425af0c8 ("PCI/MSI: Provide IMS (Interrupt Message Store) support")
  c9e5bea27383 ("PCI/MSI: Provide pci_ims_alloc/free_irq()")

which added the non-stub implementations.

Link: https://lore.kernel.org/r/20240410221307.2162676-2-helgaas@kernel.org
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Reviewed-by: Kevin Tian <kevin.tian@intel.com>
Reviewed-by: Thomas Gleixner <tglx@linutronix.de>
10 months agoPCI: rockchip-ep: Remove wrong mask on subsys_vendor_id
Rick Wertenbroek [Wed, 3 Apr 2024 14:45:08 +0000 (16:45 +0200)]
PCI: rockchip-ep: Remove wrong mask on subsys_vendor_id

Remove wrong mask on subsys_vendor_id. Both the Vendor ID and Subsystem
Vendor ID are u16 variables and are written to a u32 register of the
controller. The Subsystem Vendor ID was always 0 because the u16 value
was masked incorrectly with GENMASK(31,16) resulting in all lower 16
bits being set to 0 prior to the shift.

Remove both masks as they are unnecessary and set the register correctly
i.e., the lower 16-bits are the Vendor ID and the upper 16-bits are the
Subsystem Vendor ID.

This is documented in the RK3399 TRM section 17.6.7.1.17

[kwilczynski: removed unnecesary newline]
Fixes: cf590b078391 ("PCI: rockchip: Add EP driver for Rockchip PCIe controller")
Link: https://lore.kernel.org/linux-pci/20240403144508.489835-1-rick.wertenbroek@gmail.com
Signed-off-by: Rick Wertenbroek <rick.wertenbroek@gmail.com>
Signed-off-by: Krzysztof Wilczyński <kwilczynski@kernel.org>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Reviewed-by: Damien Le Moal <dlemoal@kernel.org>
Cc: stable@vger.kernel.org
10 months agodt-bindings: PCI: rcar-gen4-pci-ep: Add R-Car V4H compatible
Yoshihiro Shimoda [Mon, 15 Apr 2024 08:11:30 +0000 (17:11 +0900)]
dt-bindings: PCI: rcar-gen4-pci-ep: Add R-Car V4H compatible

Document bindings for R-Car V4H (R8A779G0) PCIe endpoint module.

Link: https://lore.kernel.org/linux-pci/20240415081135.3814373-3-yoshihiro.shimoda.uh@renesas.com
Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Signed-off-by: Krzysztof Wilczyński <kwilczynski@kernel.org>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Conor Dooley <conor.dooley@microchip.com>
10 months agodt-bindings: PCI: rcar-gen4-pci-host: Add R-Car V4H compatible
Yoshihiro Shimoda [Mon, 15 Apr 2024 08:11:29 +0000 (17:11 +0900)]
dt-bindings: PCI: rcar-gen4-pci-host: Add R-Car V4H compatible

Document bindings for R-Car V4H (R8A779G0) PCIe host module.

Link: https://lore.kernel.org/linux-pci/20240415081135.3814373-2-yoshihiro.shimoda.uh@renesas.com
Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Signed-off-by: Krzysztof Wilczyński <kwilczynski@kernel.org>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Conor Dooley <conor.dooley@microchip.com>
10 months agodt-bindings: PCI: layerscape-pci: Convert to YAML format
Frank Li [Wed, 7 Feb 2024 23:15:49 +0000 (18:15 -0500)]
dt-bindings: PCI: layerscape-pci: Convert to YAML format

Convert layerscape PCIe bind document to the preferred YAML format.

[kwilczynski: commit log]
Link: https://lore.kernel.org/linux-pci/20240207231550.2663689-1-Frank.Li@nxp.com
Signed-off-by: Frank Li <Frank.Li@nxp.com>
Signed-off-by: Krzysztof Wilczyński <kwilczynski@kernel.org>
10 months agodt-bindings: PCI: mediatek,mt7621-pcie: Switch from deprecated pci-bus.yaml
Krzysztof Kozlowski [Sat, 13 Apr 2024 15:16:17 +0000 (17:16 +0200)]
dt-bindings: PCI: mediatek,mt7621-pcie: Switch from deprecated pci-bus.yaml

dtschema package with core schemas deprecated pci-bus.yaml schema in
favor of individual schemas per host, device and pci-pci.

Switch Mediatek MT7621 PCIe host bridge binding to this new schema.

This requires dtschema package newer than v2024.02 to work fully.
v2024.02 will partially work: with a warning.

Link: https://lore.kernel.org/linux-pci/20240413151617.35630-4-krzysztof.kozlowski@linaro.org
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Krzysztof Wilczyński <kwilczynski@kernel.org>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Acked-by: Sergio Paracuellos <sergio.paracuellos@gmail.com>
10 months agodt-bindings: PCI: host-bridges: Switch from deprecated pci-bus.yaml
Krzysztof Kozlowski [Sat, 13 Apr 2024 15:16:16 +0000 (17:16 +0200)]
dt-bindings: PCI: host-bridges: Switch from deprecated pci-bus.yaml

dtschema package with core schemas deprecated pci-bus.yaml schema in
favor of pci-host-bridge.yaml.  Update all bindings to use the latter
one.

The difference between pci-bus.yaml and pci-host-bridge.yaml is only in
lack of "reg" property defined by the latter, which should not have any
effect here, because all these bindings define the "reg".

The change is therefore quite trivial, however it requires dtschema
package v2024.02 or newer.

Link: https://lore.kernel.org/linux-pci/20240413151617.35630-3-krzysztof.kozlowski@linaro.org
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Krzysztof Wilczyński <kwilczynski@kernel.org>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> # Renesas
Reviewed-by: Rob Herring (Arm) <robh@kernel.org>
Acked-by: Sergio Paracuellos <sergio.paracuellos@gmail.com>
10 months agodt-bindings: PCI: mediatek,mt7621: Add missing child node reg
Krzysztof Kozlowski [Sat, 13 Apr 2024 15:16:15 +0000 (17:16 +0200)]
dt-bindings: PCI: mediatek,mt7621: Add missing child node reg

MT7621 PCI host bridge has children which are PCI root ports.  The
children have "reg" property, but do not explicitly define it.  Instead
they rely on pci-bus.yaml schema, but that one has "reg" without any
constraints.

Define the "reg" for the children, so the binding will be more specific
and later will allow dropping reference to deprecated pci-bus.yaml
schema.

Link: https://lore.kernel.org/linux-pci/20240413151617.35630-2-krzysztof.kozlowski@linaro.org
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Krzysztof Wilczyński <kwilczynski@kernel.org>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Acked-by: Rob Herring <robh@kernel.org>
Acked-by: Sergio Paracuellos <sergio.paracuellos@gmail.com>
10 months agodt-bindings: PCI: cdns,cdns-pcie-host: Drop redundant msi-parent and pci-bus.yaml
Krzysztof Kozlowski [Sat, 13 Apr 2024 15:16:14 +0000 (17:16 +0200)]
dt-bindings: PCI: cdns,cdns-pcie-host: Drop redundant msi-parent and pci-bus.yaml

The binding reference common cdns-pcie-host.yaml, which already defines
msi-parent and has a reference to pci-bus.yaml schema.  Drop redundant
pieces here to make it a bit smaller.

Link: https://lore.kernel.org/linux-pci/20240413151617.35630-1-krzysztof.kozlowski@linaro.org
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Krzysztof Wilczyński <kwilczynski@kernel.org>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Rob Herring <robh@kernel.org>
Acked-by: Sergio Paracuellos <sergio.paracuellos@gmail.com>
10 months agodt-bindings: PCI: ti,am65: Fix remaining binding warnings
Jan Kiszka [Thu, 15 Feb 2024 12:55:56 +0000 (13:55 +0100)]
dt-bindings: PCI: ti,am65: Fix remaining binding warnings

This adds the missing num-viewport, phys and phy-name properties to the
schema. Based on driver code, num-viewport is required for the root
complex, phys are optional. Their number corresponds to the number of
lanes. The AM65x supports up to 2 lanes.

Link: https://lore.kernel.org/linux-pci/8032b018-c870-403a-9dd9-63440de1da07@siemens.com
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
Signed-off-by: Krzysztof Wilczyński <kwilczynski@kernel.org>
Reviewed-by: Rob Herring <robh@kernel.org>
11 months agoPCI: Make pcie_bandwidth_capable() static
Ilpo Järvinen [Tue, 7 May 2024 12:17:58 +0000 (15:17 +0300)]
PCI: Make pcie_bandwidth_capable() static

pcie_bandwidth_capable() is only used within pci.c, make it static.

Link: https://lore.kernel.org/r/20240507121758.13849-1-ilpo.jarvinen@linux.intel.com
Signed-off-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
11 months agoPCI/EDR: Align EDR_PORT_LOCATE_DSM with PCI Firmware r3.3
Kuppuswamy Sathyanarayanan [Wed, 8 May 2024 19:31:38 +0000 (14:31 -0500)]
PCI/EDR: Align EDR_PORT_LOCATE_DSM with PCI Firmware r3.3

The "Downstream Port Containment related Enhancements" ECN of Jan 28, 2019
(document 12888 below), defined the EDR_PORT_LOCATE_DSM function with
Revision ID 5 with a return value encoding (Bits 2:0 = Function, Bits 7:3 =
Device, Bits 15:8 = Bus).  When the ECN was integrated into PCI Firmware
r3.3, sec 4.6.13, Bit 31 was added to indicate success or failure.

Check Bit 31 for failure in acpi_dpc_port_get().

Link: https://lore.kernel.org/r/20240501022543.1626025-1-sathyanarayanan.kuppuswamy@linux.intel.com
Link: https://members.pcisig.com/wg/PCI-SIG/document/12888
Fixes: ac1c8e35a326 ("PCI/DPC: Add Error Disconnect Recover (EDR) support")
Signed-off-by: Kuppuswamy Sathyanarayanan <sathyanarayanan.kuppuswamy@linux.intel.com>
[bhelgaas: split into two patches, update commit log]
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Tested-by: Satish Thatchanamurthy <Satish.Thatchanamurt@Dell.com> # one platform
11 months agoPCI/EDR: Align EDR_PORT_DPC_ENABLE_DSM with PCI Firmware r3.3
Kuppuswamy Sathyanarayanan [Wed, 1 May 2024 02:25:43 +0000 (02:25 +0000)]
PCI/EDR: Align EDR_PORT_DPC_ENABLE_DSM with PCI Firmware r3.3

The "Downstream Port Containment related Enhancements" ECN of Jan 28, 2019
(document 12888 below), defined the EDR_PORT_DPC_ENABLE_DSM function with
Revision ID 5 with Arg3 being an integer.  But when the ECN was integrated
into PCI Firmware r3.3, sec 4.6.12, it was defined as Revision ID 6 with
Arg3 being a package containing an integer.

The implementation in acpi_enable_dpc() supplies a package as Arg3 (arg4 in
the code), but it previously specified Revision ID 5.  Align this with PCI
Firmware r3.3 by using Revision ID 6.

If firmware implemented per the ECN, its Revision 5 function would receive
a package as Arg3 when it expects an integer, so acpi_enable_dpc() would
likely fail.  If such firmware exists and lacks a Revision 6 function that
expects a package, we may have to add support for Revision 5.

Link: https://lore.kernel.org/r/20240501022543.1626025-1-sathyanarayanan.kuppuswamy@linux.intel.com
Link: https://members.pcisig.com/wg/PCI-SIG/document/12888
Fixes: ac1c8e35a326 ("PCI/DPC: Add Error Disconnect Recover (EDR) support")
Signed-off-by: Kuppuswamy Sathyanarayanan <sathyanarayanan.kuppuswamy@linux.intel.com>
[bhelgaas: split into two patches, update commit log]
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Tested-by: Satish Thatchanamurthy <Satish.Thatchanamurt@Dell.com> # one platform
11 months agocxl: Add post-reset warning if reset results in loss of previously committed HDM...
Dave Jiang [Thu, 2 May 2024 16:57:34 +0000 (09:57 -0700)]
cxl: Add post-reset warning if reset results in loss of previously committed HDM decoders

Secondary Bus Reset (SBR) is equivalent to a device being hot removed and
inserted again. Doing a SBR on a CXL type 3 device is problematic if the
exported device memory is part of system memory that cannot be offlined.
The event is equivalent to violently ripping out that range of memory from
the kernel. While the hardware requires the "Unmask SBR" bit set in the
Port Control Extensions register and the kernel currently does not unmask
it, user can unmask this bit via setpci or similar tool.

The driver does not have a way to detect whether a reset coming from the
PCI subsystem is a Function Level Reset (FLR) or SBR. The only way to
detect is to note if a decoder is marked as enabled in software but the
decoder control register indicates it's not committed.

Add a helper function to find discrepancy between the decoder software
state versus the hardware register state.

Suggested-by: Dan Williams <dan.j.williams@intel.com>
Link: https://lore.kernel.org/r/20240502165851.1948523-6-dave.jiang@intel.com
Signed-off-by: Dave Jiang <dave.jiang@intel.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Reviewed-by: Dan Williams <dan.j.williams@intel.com>
11 months agoPCI/CXL: Add 'cxl_bus' reset method for devices below CXL Ports
Dave Jiang [Thu, 2 May 2024 16:57:33 +0000 (09:57 -0700)]
PCI/CXL: Add 'cxl_bus' reset method for devices below CXL Ports

By default Secondary Bus Reset (SBR) is masked for CXL Ports (see CXL r3.1,
sec 8.1.5.2).

Add cxl_reset_bus_function() (method "cxl_bus") to set the "Unmask SBR" bit
in the upstream CXL Port before performing the bus reset and restore the
original value afterwards.

This method allows the user to perform a bus reset on a CXL device without
needing to set the "Unmask SBR" bit via a user tool.

Link: https://lore.kernel.org/r/20240502165851.1948523-5-dave.jiang@intel.com
Signed-off-by: Dave Jiang <dave.jiang@intel.com>
[bhelgaas: simplify commit log, invert condition to avoid negation]
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Reviewed-by: Dan Williams <dan.j.williams@intel.com>
11 months agoPCI/CXL: Fail bus reset if upstream CXL Port has SBR masked
Dave Jiang [Thu, 2 May 2024 16:57:32 +0000 (09:57 -0700)]
PCI/CXL: Fail bus reset if upstream CXL Port has SBR masked

Per CXL spec r3.1, sec 8.1.5.2, the Secondary Bus Reset (SBR) bit in the
Bridge Control register of a CXL port has no effect unless the "Unmask SBR"
bit is set.

Return -ENOTTY if we attempt a bus reset on a device below a CXL Port where
"Unmask SBR" is 0.  Otherwise, the bus reset would appear to have succeeded
even though setting the bridge SBR bit had no effect.

Link: https://lore.kernel.org/linux-cxl/20240220203956.GA1502351@bhelgaas/
Link: https://lore.kernel.org/r/20240502165851.1948523-4-dave.jiang@intel.com
Signed-off-by: Dave Jiang <dave.jiang@intel.com>
[bhelgaas: simplify commit log and comments]
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Reviewed-by: Kuppuswamy Sathyanarayanan <sathyanarayanan.kuppuswamy@linux.intel.com>
Reviewed-by: Dan Williams <dan.j.williams@intel.com>
11 months agoPCI: Lock upstream bridge for pci_reset_function()
Dave Jiang [Thu, 2 May 2024 16:57:31 +0000 (09:57 -0700)]
PCI: Lock upstream bridge for pci_reset_function()

Fix a long-standing locking gap for missing pci_cfg_access_lock() while
manipulating bridge reset registers and configuration during
pci_reset_bus_function().

If there is an upstream bridge, lock it before locking the device itself.
pci_dev_lock() calls pci_cfg_access_lock(), which blocks the writing of PCI
config space by user space.

Add lockdep assertion via pci_dev->cfg_access_lock to verify
pci_dev->block_cfg_access is set.

Co-developed-by: Dan Williams <dan.j.williams@intel.com>
Link: https://lore.kernel.org/r/20240502165851.1948523-3-dave.jiang@intel.com
Signed-off-by: Dan Williams <dan.j.williams@intel.com>
Signed-off-by: Dave Jiang <dave.jiang@intel.com>
[bhelgaas: commit log]
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
11 months agoPCI/CXL: Move CXL Vendor ID to pci_ids.h
Dave Jiang [Thu, 2 May 2024 16:57:30 +0000 (09:57 -0700)]
PCI/CXL: Move CXL Vendor ID to pci_ids.h

Move PCI_DVSEC_VENDOR_ID_CXL in CXL private code to PCI_VENDOR_ID_CXL in
pci_ids.h in order to be utilized in PCI subsystem.

While the CXL Vendor ID (0x1e98) is not listed in the PCI SIG "Member
Companies" database at https://pcisig.com/membership/member-companies, the
SIG has confirmed that it is reserved by CXL.

Link: https://lore.kernel.org/r/20240502165851.1948523-2-dave.jiang@intel.com
Suggested-by: Bjorn Helgaas <helgaas@kernel.org>
Link: https://lore.kernel.org/linux-cxl/20240402172323.GA1818777@bhelgaas/
Signed-off-by: Dave Jiang <dave.jiang@intel.com>
[bhelgaas: update commit log]
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Reviewed-by: Kuppuswamy Sathyanarayanan <sathyanarayanan.kuppuswamy@linux.intel.com>
Reviewed-by: Dan Williams <dan.j.williams@intel.com>
11 months agox86/pci: Remove OLPC dead code
Kunwu Chan [Thu, 25 Jan 2024 03:06:23 +0000 (11:06 +0800)]
x86/pci: Remove OLPC dead code

3ef0e1f8cad0 ("x86: olpc: add One Laptop Per Child architecture support")
added a commented-out EHCI config section that has never been used.

Remove this dead code.

Link: https://lore.kernel.org/r/20240125030623.513902-1-chentao@kylinos.cn
Signed-off-by: Kunwu Chan <chentao@kylinos.cn>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
11 months agoPCI: hotplug: Remove obsolete sgi_hotplug TODO notes
Nam Cao [Fri, 3 May 2024 19:23:22 +0000 (21:23 +0200)]
PCI: hotplug: Remove obsolete sgi_hotplug TODO notes

Commit c7532b601e77 ("PCI/hotplug: remove the sgi_hotplug driver") deleted
the driver.

Remove the remaining TODO notes as well.

Link: https://lore.kernel.org/r/26784ee39fbb3fbd0fe96508158d74419018e6ad.1714762038.git.namcao@linutronix.de
Signed-off-by: Nam Cao <namcao@linutronix.de>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
11 months agoPCI: hotplug: Document unchecked return value of pci_hp_add_bridge()
Nam Cao [Fri, 3 May 2024 19:23:21 +0000 (21:23 +0200)]
PCI: hotplug: Document unchecked return value of pci_hp_add_bridge()

Some hotplug drivers do not check the return value of pci_hp_add_bridge().
This may be problematic if the driver proceeds after pci_hp_add_bridge()
fails.

Link: https://lore.kernel.org/r/16a2442ea6ee896987a44df3ed509e4cfde44475.1714762038.git.namcao@linutronix.de
Signed-off-by: Nam Cao <namcao@linutronix.de>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
11 months agoPCI: of_property: Return error for int_map allocation failure
Duoming Zhou [Sun, 3 Mar 2024 10:57:29 +0000 (18:57 +0800)]
PCI: of_property: Return error for int_map allocation failure

Return -ENOMEM from of_pci_prop_intr_map() if kcalloc() fails to prevent a
NULL pointer dereference in this case.

Fixes: 407d1a51921e ("PCI: Create device tree node for bridge")
Link: https://lore.kernel.org/r/20240303105729.78624-1-duoming@zju.edu.cn
Signed-off-by: Duoming Zhou <duoming@zju.edu.cn>
[bhelgaas: commit log]
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
11 months agoPCI/ASPM: Clean up ASPM disable/enable mask calculation
Ilpo Järvinen [Fri, 22 Mar 2024 12:39:52 +0000 (14:39 +0200)]
PCI/ASPM: Clean up ASPM disable/enable mask calculation

With only one set of defines remaining, state can be almost used as-is to
set ->aspm_disable/default. Only CLKPM and L1 PM substates need special
handling.

Remove unnecessary if conditions that can use the state variable bits
directly. Move ASPM mask calculation into pci_calc_aspm_enable_mask() and
pci_calc_aspm_disable_mask() helpers which makes it easier to alter state
variable directly.

Link: https://lore.kernel.org/r/20240322123952.6384-3-ilpo.jarvinen@linux.intel.com
Signed-off-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
11 months agoPCI/ASPM: Consolidate link state defines
Ilpo Järvinen [Fri, 22 Mar 2024 12:39:51 +0000 (14:39 +0200)]
PCI/ASPM: Consolidate link state defines

The linux/pci.h and aspm.c files define their own sets of link state
related defines which are almost the same.

Consolidate the use of defines into those defined by linux/pci.h and expand
PCIE_LINK_STATE_L0S to match earlier ASPM_STATE_L0S that includes both
upstream and downstream bits. Rename also the defines that are internal to
aspm.c to start with PCIE_LINK_STATE for consistency.

While the PCIE_LINK_STATE_L0S BIT(0) -> (BIT(0) | BIT(1)) transformation is
not 1:1, in practice aspm.c already used ASPM_STATE_L0S that has both bits
enabled except during mapping.

While at it, place the PCIE_LINK_STATE_CLKPM define last to have more
logical grouping.

Use static_assert() to ensure PCIE_LINK_STATE_L0S is strictly equal to the
combination of PCIE_LINK_STATE_L0S_UP/DW.

Link: https://lore.kernel.org/r/20240322123952.6384-2-ilpo.jarvinen@linux.intel.com
Signed-off-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
11 months agoPCI: Clean up accessor macro formatting
Ilpo Järvinen [Mon, 29 Apr 2024 09:47:07 +0000 (12:47 +0300)]
PCI: Clean up accessor macro formatting

Clean up formatting of PCI accessor macros:

  - Put return statements on own line

  - Add a few empty lines for better readability

  - Align macro continuation backslashes

  - Correct function call argument indentation level

  - Reorder variable declarations to order of use

  - Drop unnecessary variable initialization

Link: https://lore.kernel.org/r/20240429094707.2529-2-ilpo.jarvinen@linux.intel.com
Signed-off-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com>
[bhelgaas: drop initialization, tweak variables to order of use]
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
11 months agoPCI/ERR: Cleanup misleading indentation inside if conditions
Ilpo Järvinen [Mon, 29 Apr 2024 09:47:06 +0000 (12:47 +0300)]
PCI/ERR: Cleanup misleading indentation inside if conditions

A few if conditions align misleadingly with the following code block.  The
checks are really cascading NULL checks that fit into 80 chars so remove
newlines in between and realign to the if condition indent.

Link: https://lore.kernel.org/r/20240429094707.2529-1-ilpo.jarvinen@linux.intel.com
Signed-off-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
11 months agoPCI/MSI: Make error path handling follow the standard pattern
Andy Shevchenko [Fri, 26 Apr 2024 14:40:39 +0000 (17:40 +0300)]
PCI/MSI: Make error path handling follow the standard pattern

Make error path handling follow the standard pattern, i.e.  checking for
errors first. This makes code much easier to read and understand despite
being a bit longer.

Link: https://lore.kernel.org/r/20240426144039.557907-1-andriy.shevchenko@linux.intel.com
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
11 months agowifi: rtw88: Use PCI_IRQ_INTX instead of PCI_IRQ_LEGACY
Damien Le Moal [Mon, 25 Mar 2024 07:09:31 +0000 (16:09 +0900)]
wifi: rtw88: Use PCI_IRQ_INTX instead of PCI_IRQ_LEGACY

Use the macro PCI_IRQ_INTX instead of the deprecated PCI_IRQ_LEGACY macro.

Link: https://lore.kernel.org/r/20240325070944.3600338-21-dlemoal@kernel.org
Signed-off-by: Damien Le Moal <dlemoal@kernel.org>
[bhelgaas: split to separate patch]
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
11 months agowifi: ath10k: Refer to INTX instead of LEGACY
Damien Le Moal [Mon, 25 Mar 2024 07:09:30 +0000 (16:09 +0900)]
wifi: ath10k: Refer to INTX instead of LEGACY

To be consistent with the deprecation of PCI_IRQ_LEGACY and its
replacement with PCI_IRQ_INTX, rename macros and functions referencing
"legacy irq" to instead use the term "intx irq".

Link: https://lore.kernel.org/r/20240325070944.3600338-20-dlemoal@kernel.org
Signed-off-by: Damien Le Moal <dlemoal@kernel.org>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
11 months agonet: wangxun: Use PCI_IRQ_INTX instead of PCI_IRQ_LEGACY
Damien Le Moal [Mon, 25 Mar 2024 07:09:29 +0000 (16:09 +0900)]
net: wangxun: Use PCI_IRQ_INTX instead of PCI_IRQ_LEGACY

Use the macro PCI_IRQ_INTX instead of the deprecated PCI_IRQ_LEGACY macro.

Link: https://lore.kernel.org/r/20240325070944.3600338-19-dlemoal@kernel.org
Signed-off-by: Damien Le Moal <dlemoal@kernel.org>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
11 months agor8169: Use PCI_IRQ_INTX instead of PCI_IRQ_LEGACY
Damien Le Moal [Mon, 25 Mar 2024 07:09:28 +0000 (16:09 +0900)]
r8169: Use PCI_IRQ_INTX instead of PCI_IRQ_LEGACY

Use the macro PCI_IRQ_INTX instead of the deprecated PCI_IRQ_LEGACY macro.

Link: https://lore.kernel.org/r/20240325070944.3600338-18-dlemoal@kernel.org
Signed-off-by: Damien Le Moal <dlemoal@kernel.org>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Acked-by: Heiner Kallweit <hkallweit1@gmail.com>
11 months agonet: alx: Use PCI_IRQ_INTX instead of PCI_IRQ_LEGACY
Damien Le Moal [Mon, 25 Mar 2024 07:09:27 +0000 (16:09 +0900)]
net: alx: Use PCI_IRQ_INTX instead of PCI_IRQ_LEGACY

Use the macro PCI_IRQ_INTX instead of the deprecated PCI_IRQ_LEGACY macro.

Link: https://lore.kernel.org/r/20240325070944.3600338-17-dlemoal@kernel.org
Signed-off-by: Damien Le Moal <dlemoal@kernel.org>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
11 months agonet: atlantic: Use PCI_IRQ_INTX instead of PCI_IRQ_LEGACY
Damien Le Moal [Mon, 25 Mar 2024 07:09:26 +0000 (16:09 +0900)]
net: atlantic: Use PCI_IRQ_INTX instead of PCI_IRQ_LEGACY

Use the macro PCI_IRQ_INTX instead of the deprecated PCI_IRQ_LEGACY macro.

To be consistent with this change, rename AQ_HW_IRQ_LEGACY and
AQ_CFG_FORCE_LEGACY_INT to AQ_HW_IRQ_INTX and AQ_CFG_FORCE_INTX.

Link: https://lore.kernel.org/r/20240325070944.3600338-16-dlemoal@kernel.org
Signed-off-by: Damien Le Moal <dlemoal@kernel.org>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
11 months agonet: amd-xgbe: Use PCI_IRQ_INTX instead of PCI_IRQ_LEGACY
Damien Le Moal [Mon, 25 Mar 2024 07:09:25 +0000 (16:09 +0900)]
net: amd-xgbe: Use PCI_IRQ_INTX instead of PCI_IRQ_LEGACY

Use the macro PCI_IRQ_INTX instead of the deprecated PCI_IRQ_LEGACY macro.

Link: https://lore.kernel.org/r/20240325070944.3600338-15-dlemoal@kernel.org
Signed-off-by: Damien Le Moal <dlemoal@kernel.org>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
11 months agoVMCI: Use PCI_IRQ_ALL_TYPES to remove PCI_IRQ_LEGACY use
Damien Le Moal [Mon, 25 Mar 2024 07:09:24 +0000 (16:09 +0900)]
VMCI: Use PCI_IRQ_ALL_TYPES to remove PCI_IRQ_LEGACY use

In vmci_guest_probe_device(), remove the reference to PCI_IRQ_LEGACY by
using PCI_IRQ_ALL_TYPES instead of an explicit OR of all IRQ types.

Link: https://lore.kernel.org/r/20240325070944.3600338-14-dlemoal@kernel.org
Signed-off-by: Damien Le Moal <dlemoal@kernel.org>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Acked-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
11 months agoRDMA/vmw_pvrdma: Use PCI_IRQ_INTX instead of PCI_IRQ_LEGACY
Damien Le Moal [Mon, 25 Mar 2024 07:09:23 +0000 (16:09 +0900)]
RDMA/vmw_pvrdma: Use PCI_IRQ_INTX instead of PCI_IRQ_LEGACY

Use the macro PCI_IRQ_INTX instead of the deprecated PCI_IRQ_LEGACY macro.

Link: https://lore.kernel.org/r/20240325070944.3600338-13-dlemoal@kernel.org
Signed-off-by: Damien Le Moal <dlemoal@kernel.org>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
11 months agoIB/qib: Use PCI_IRQ_INTX instead of PCI_IRQ_LEGACY
Damien Le Moal [Mon, 25 Mar 2024 07:09:22 +0000 (16:09 +0900)]
IB/qib: Use PCI_IRQ_INTX instead of PCI_IRQ_LEGACY

Use the macro PCI_IRQ_INTX instead of the deprecated PCI_IRQ_LEGACY macro.

Link: https://lore.kernel.org/r/20240325070944.3600338-12-dlemoal@kernel.org
Signed-off-by: Damien Le Moal <dlemoal@kernel.org>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Acked-by: Dennis Dalessandro <dennis.dalessandro@cornelisnetworks.com>
11 months agodrm/amdgpu: Use PCI_IRQ_INTX instead of PCI_IRQ_LEGACY
Damien Le Moal [Mon, 25 Mar 2024 07:09:21 +0000 (16:09 +0900)]
drm/amdgpu: Use PCI_IRQ_INTX instead of PCI_IRQ_LEGACY

Use the macro PCI_IRQ_INTX instead of the deprecated PCI_IRQ_LEGACY macro.

Link: https://lore.kernel.org/r/20240325070944.3600338-11-dlemoal@kernel.org
Signed-off-by: Damien Le Moal <dlemoal@kernel.org>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
11 months agomfd: intel-lpss: Use PCI_IRQ_INTX instead of PCI_IRQ_LEGACY
Damien Le Moal [Mon, 25 Mar 2024 07:09:20 +0000 (16:09 +0900)]
mfd: intel-lpss: Use PCI_IRQ_INTX instead of PCI_IRQ_LEGACY

Use the macro PCI_IRQ_INTX instead of the deprecated PCI_IRQ_LEGACY macro.

Link: https://lore.kernel.org/r/20240325070944.3600338-10-dlemoal@kernel.org
Signed-off-by: Damien Le Moal <dlemoal@kernel.org>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
11 months agontb: idt: Use PCI_IRQ_INTX instead of PCI_IRQ_LEGACY
Damien Le Moal [Mon, 25 Mar 2024 07:09:19 +0000 (16:09 +0900)]
ntb: idt: Use PCI_IRQ_INTX instead of PCI_IRQ_LEGACY

Use the macro PCI_IRQ_INTX instead of the deprecated PCI_IRQ_LEGACY macro.

Link: https://lore.kernel.org/r/20240325070944.3600338-9-dlemoal@kernel.org
Signed-off-by: Damien Le Moal <dlemoal@kernel.org>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Reviewed-by: Dave Jiang <dave.jiang@intel.com>
11 months agoplatform/x86: intel_ips: Use PCI_IRQ_INTX instead of PCI_IRQ_LEGACY
Damien Le Moal [Mon, 25 Mar 2024 07:09:18 +0000 (16:09 +0900)]
platform/x86: intel_ips: Use PCI_IRQ_INTX instead of PCI_IRQ_LEGACY

Use the macro PCI_IRQ_INTX instead of the deprecated PCI_IRQ_LEGACY macro.

Link: https://lore.kernel.org/r/20240325070944.3600338-8-dlemoal@kernel.org
Signed-off-by: Damien Le Moal <dlemoal@kernel.org>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Acked-by: Hans de Goede <hdegoede@redhat.com>
11 months agotty: 8250_pci: Use PCI_IRQ_INTX instead of PCI_IRQ_LEGACY
Damien Le Moal [Mon, 25 Mar 2024 07:09:17 +0000 (16:09 +0900)]
tty: 8250_pci: Use PCI_IRQ_INTX instead of PCI_IRQ_LEGACY

Use the macro PCI_IRQ_INTX instead of the deprecated PCI_IRQ_LEGACY macro.

Link: https://lore.kernel.org/r/20240325070944.3600338-7-dlemoal@kernel.org
Signed-off-by: Damien Le Moal <dlemoal@kernel.org>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Acked-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
11 months agousb: hcd-pci: Use PCI_IRQ_INTX instead of PCI_IRQ_LEGACY
Damien Le Moal [Mon, 25 Mar 2024 07:09:16 +0000 (16:09 +0900)]
usb: hcd-pci: Use PCI_IRQ_INTX instead of PCI_IRQ_LEGACY

Use the macro PCI_IRQ_INTX instead of the deprecated PCI_IRQ_LEGACY macro.

Link: https://lore.kernel.org/r/20240325070944.3600338-6-dlemoal@kernel.org
Signed-off-by: Damien Le Moal <dlemoal@kernel.org>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Acked-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
11 months agoASoC: Intel: avs: Use PCI_IRQ_INTX instead of PCI_IRQ_LEGACY
Damien Le Moal [Mon, 25 Mar 2024 07:09:15 +0000 (16:09 +0900)]
ASoC: Intel: avs: Use PCI_IRQ_INTX instead of PCI_IRQ_LEGACY

Use the macro PCI_IRQ_INTX instead of the deprecated PCI_IRQ_LEGACY macro.

Link: https://lore.kernel.org/r/20240325070944.3600338-5-dlemoal@kernel.org
Signed-off-by: Damien Le Moal <dlemoal@kernel.org>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Reviewed-by: Amadeusz Sławiński <amadeuszx.slawinski@linux.intel.com>
11 months agoDocumentation: PCI: Use PCI_IRQ_INTX instead of PCI_IRQ_LEGACY
Damien Le Moal [Mon, 25 Mar 2024 07:09:14 +0000 (16:09 +0900)]
Documentation: PCI: Use PCI_IRQ_INTX instead of PCI_IRQ_LEGACY

Change all references to PCI_IRQ_LEGACY to PCI_IRQ_INTX in the PCI
documentation to reflect that PCI_IRQ_LEGACY is deprecated.

Link: https://lore.kernel.org/r/20240325070944.3600338-4-dlemoal@kernel.org
Signed-off-by: Damien Le Moal <dlemoal@kernel.org>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
11 months agoPCI/portdrv: Use PCI_IRQ_INTX instead of PCI_IRQ_LEGACY
Damien Le Moal [Mon, 25 Mar 2024 07:09:13 +0000 (16:09 +0900)]
PCI/portdrv: Use PCI_IRQ_INTX instead of PCI_IRQ_LEGACY

In the PCI Express Port Bus Driver, use the macro PCI_IRQ_INTX instead of
the now deprecated PCI_IRQ_LEGACY macro.

Link: https://lore.kernel.org/r/20240325070944.3600338-3-dlemoal@kernel.org
Signed-off-by: Damien Le Moal <dlemoal@kernel.org>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
11 months agoPCI/MSI: Use PCI_IRQ_INTX instead of PCI_IRQ_LEGACY
Damien Le Moal [Mon, 25 Mar 2024 07:09:12 +0000 (16:09 +0900)]
PCI/MSI: Use PCI_IRQ_INTX instead of PCI_IRQ_LEGACY

In pci_alloc_irq_vectors_affinity(), use the macro PCI_IRQ_INTX instead of
the now deprecated PCI_IRQ_LEGACY macro.

Link: https://lore.kernel.org/r/20240325070944.3600338-2-dlemoal@kernel.org
Signed-off-by: Damien Le Moal <dlemoal@kernel.org>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
11 months agoPCI: Clarify intent of LT wait
Ilpo Järvinen [Tue, 23 Apr 2024 13:08:20 +0000 (16:08 +0300)]
PCI: Clarify intent of LT wait

Clarify the comment relating to the LT wait and the purpose of the check
that implements the implementation note in PCIe r6.1 sec 7.5.3.7.

Suggested-by: Maciej W. Rozycki <macro@orcam.me.uk>
Link: https://lore.kernel.org/r/20240423130820.43824-2-ilpo.jarvinen@linux.intel.com
Signed-off-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
11 months agoPCI: Wait for Link Training==0 before starting Link retrain
Ilpo Järvinen [Tue, 23 Apr 2024 13:08:19 +0000 (16:08 +0300)]
PCI: Wait for Link Training==0 before starting Link retrain

Two changes were made in link retraining logic independent of each other.

The commit e7e39756363a ("PCI/ASPM: Avoid link retraining race") added a
check to pcie_retrain_link() to ensure no Link Training is currently active
to address the Implementation Note in PCIe r6.1 sec 7.5.3.7. At that time
pcie_wait_for_retrain() only checked for the Link Training (LT) bit being
cleared.

The commit 680e9c47a229 ("PCI: Add support for polling DLLLA to
pcie_retrain_link()") generalized pcie_wait_for_retrain() into
pcie_wait_for_link_status() which can wait either for LT or the Data Link
Layer Link Active (DLLLA) bit with 'use_lt' argument and supporting waiting
for either cleared or set using 'active' argument.

In the merge commit 1abb47390350 ("Merge branch 'pci/enumeration'"), those
two divergent branches converged. The merge changed LT bit checking added
in the commit e7e39756363a ("PCI/ASPM: Avoid link retraining race") to now
wait for completion of any ongoing Link Training using DLLLA bit being set
if 'use_lt' is false.

When 'use_lt' is false, the pseudo-code steps of what occurs in
pcie_retrain_link():

1. Wait for DLLLA==1
2. Trigger link to retrain
3. Wait for DLLLA==1

Step 3 waits for the link to come up from the retraining triggered by Step
2. As Step 1 is supposed to wait for any ongoing retraining to end, using
DLLLA also for it does not make sense because link training being active is
still indicated using LT bit, not with DLLLA.

Correct the pcie_wait_for_link_status() parameters in Step 1 to only wait
for LT==0 to ensure there is no ongoing Link Training.

This only impacts the Target Speed quirk, which is the only case where
waiting for DLLLA bit is used. It currently works in the problematic case
by means of link training getting initiated by hardware repeatedly and
respecting the new link parameters set by the caller, which then make
training succeed and bring the link up, setting DLLLA and causing
pcie_wait_for_link_status() to return success. We are not supposed to rely
on luck and need to make sure that LT transitioned through the inactive
state though before we initiate link training by hand via RL (Retrain Link)
bit.

Fixes: 1abb47390350 ("Merge branch 'pci/enumeration'")
Link: https://lore.kernel.org/r/20240423130820.43824-1-ilpo.jarvinen@linux.intel.com
Signed-off-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
11 months agoPCI: Clear Secondary Status errors after enumeration
Vidya Sagar [Tue, 16 Jan 2024 14:32:58 +0000 (20:02 +0530)]
PCI: Clear Secondary Status errors after enumeration

We enumerate devices by attempting config reads to the Vendor ID of each
possible device.  On conventional PCI, if no device responds, the read
terminates with a Master Abort (PCI r3.0, sec 6.1).  On PCIe, the config
read is terminated as an Unsupported Request (PCIe r6.0, sec 2.3.2,
7.5.1.3.7).  In either case, if the read addressed a device below a bridge,
it is logged by setting "Received Master Abort" in the bridge Secondary
Status register.

Clear any errors logged in the Secondary Status register after enumeration.

Link: https://lore.kernel.org/r/20240116143258.483235-1-vidyas@nvidia.com
Signed-off-by: Vidya Sagar <vidyas@nvidia.com>
[bhelgaas: simplify commit log]
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
11 months agoPCI: Annotate pci_cache_line_size variables as __ro_after_init
Heiner Kallweit [Thu, 18 Apr 2024 18:29:21 +0000 (20:29 +0200)]
PCI: Annotate pci_cache_line_size variables as __ro_after_init

Annotate both variables as __ro_after_init, enforcing that they can't be
changed after the init phase.

Link: https://lore.kernel.org/r/52fd058d-6d72-48db-8e61-5fcddcd0aa51@gmail.com
Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
11 months agoPCI: Constify pcibus_class
Heiner Kallweit [Sat, 13 Apr 2024 21:01:17 +0000 (23:01 +0200)]
PCI: Constify pcibus_class

Constify pcibus_class. All users take a const struct class * argument.

Link: https://lore.kernel.org/r/5e01f46f-266f-4fb3-be8a-8cb9e566cd75@gmail.com
Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
11 months agoPCI/AER: Update aer-inject tool source URL
Kuppuswamy Sathyanarayanan [Tue, 16 Apr 2024 05:50:35 +0000 (05:50 +0000)]
PCI/AER: Update aer-inject tool source URL

The aer-inject tool is no longer maintained in the original repository
and is missing a fix related to the musl library. So, with the author's
(Huang Ying) consent, it has been moved to a new repository [1].

Update all references to the repository link.

Link: https://github.com/intel/aer-inject.git
Link: https://lore.kernel.org/r/20240416055035.200085-1-sathyanarayanan.kuppuswamy@linux.intel.com
Signed-off-by: Kuppuswamy Sathyanarayanan <sathyanarayanan.kuppuswamy@linux.intel.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Cc: Huang Ying <ying.huang@intel.com>
11 months agodt-bindings: PCI: ti,j721e-pci-host: Add support for J722S SoC
Siddharth Vadapalli [Wed, 24 Jan 2024 12:29:36 +0000 (17:59 +0530)]
dt-bindings: PCI: ti,j721e-pci-host: Add support for J722S SoC

TI's J722S SoC has one instance of a Gen3 Single-Lane PCIe controller.
The controller on J722S SoC is similar to the one present on TI's AM64
SoC, with the difference being that the controller on AM64 SoC supports
up to Gen2 link speed while the one on J722S SoC supports Gen3 link speed.

Update the bindings with a new compatible for J722S SoC.

Technical Reference Manual of J722S SoC: https://www.ti.com/lit/zip/sprujb3

Link: https://lore.kernel.org/linux-pci/20240124122936.816142-1-s-vadapalli@ti.com
Signed-off-by: Siddharth Vadapalli <s-vadapalli@ti.com>
Signed-off-by: Krzysztof Wilczyński <kwilczynski@kernel.org>
Acked-by: Conor Dooley <conor.dooley@microchip.com>
11 months agodt-bindings: PCI: rcar-pci-host: Add missing IOMMU properties
Geert Uytterhoeven [Thu, 1 Feb 2024 15:52:01 +0000 (16:52 +0100)]
dt-bindings: PCI: rcar-pci-host: Add missing IOMMU properties

make dtbs_check:

    arch/arm64/boot/dts/renesas/r8a77951-salvator-xs.dtb: pcie@fe000000: Unevaluated properties are not allowed ('iommu-map', 'iommu-map-mask' were unexpected)
    from schema $id: http://devicetree.org/schemas/pci/rcar-pci-host.yaml#

Fix this by adding the missing IOMMU-related properties.

[kwilczynski: added missing Fixes: tag]
Fixes: 0d69ce3c2c63 ("dt-bindings: PCI: rcar-pci-host: Convert bindings to json-schema")
Link: https://lore.kernel.org/linux-pci/babc878a93cb6461a5d39331f8ecfa654dfda921.1706802597.git.geert+renesas@glider.be
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Krzysztof Wilczyński <kwilczynski@kernel.org>
Acked-by: Conor Dooley <conor.dooley@microchip.com>
11 months agodt-bindings: PCI: ti,j721e-pci-host: Add device-id for TI's J784S4 SoC
Siddharth Vadapalli [Mon, 1 Apr 2024 11:09:51 +0000 (16:39 +0530)]
dt-bindings: PCI: ti,j721e-pci-host: Add device-id for TI's J784S4 SoC

Add the device-id of 0xb012 for the PCIe controller on the J784S4 SoC as
described in the CTRL_MMR_PCI_DEVICE_ID register's PCI_DEVICE_ID_DEVICE_ID
field. The Register descriptions and the Technical Reference Manual for
J784S4 SoC can be found at: https://www.ti.com/lit/zip/spruj52

Link: https://lore.kernel.org/linux-pci/20240401110951.3816291-1-s-vadapalli@ti.com
Signed-off-by: Siddharth Vadapalli <s-vadapalli@ti.com>
Signed-off-by: Krzysztof Wilczyński <kwilczynski@kernel.org>
Acked-by: Rob Herring <robh@kernel.org>
11 months agoPCI: mt7621: Fix string truncation in mt7621_pcie_parse_port()
Sergio Paracuellos [Thu, 11 Jan 2024 08:27:04 +0000 (09:27 +0100)]
PCI: mt7621: Fix string truncation in mt7621_pcie_parse_port()

The following warning appears when driver is compiled with W=1.

CC      drivers/pci/controller/pcie-mt7621.o
drivers/pci/controller/pcie-mt7621.c: In function ‘mt7621_pcie_probe’:
drivers/pci/controller/pcie-mt7621.c:228:49: error: ‘snprintf’ output may
be truncated before the last format character [-Werror=format-truncation=]
228 |         snprintf(name, sizeof(name), "pcie-phy%d", slot);
    |                                                 ^
drivers/pci/controller/pcie-mt7621.c:228:9: note: ‘snprintf’ output between
10 and 11 bytes into a destination of size 10
228 |         snprintf(name, sizeof(name), "pcie-phy%d", slot);
    |         ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~

Clean this up increasing destination buffer one byte.

[kwilczynski: commit log]
Closes: https://lore.kernel.org/linux-pci/20240110212302.GA2123146@bhelgaas/T/#t
Link: https://lore.kernel.org/linux-pci/20240111082704.2259450-1-sergio.paracuellos@gmail.com
Reported-by: Bjorn Helgaas <helgaas@kernel.org>
Signed-off-by: Sergio Paracuellos <sergio.paracuellos@gmail.com>
Signed-off-by: Krzysztof Wilczyński <kwilczynski@kernel.org>
11 months agoPCI: tegra194: Fix probe path for Endpoint mode
Vidya Sagar [Mon, 8 Apr 2024 09:30:53 +0000 (15:00 +0530)]
PCI: tegra194: Fix probe path for Endpoint mode

Tegra194 PCIe probe path is taking failure path in success case for
Endpoint mode. Return success from the switch case instead of going
into the failure path.

Fixes: c57247f940e8 ("PCI: tegra: Add support for PCIe endpoint mode in Tegra194")
Link: https://lore.kernel.org/linux-pci/20240408093053.3948634-1-vidyas@nvidia.com
Signed-off-by: Vidya Sagar <vidyas@nvidia.com>
Signed-off-by: Krzysztof Wilczyński <kwilczynski@kernel.org>
Reviewed-by: Jon Hunter <jonathanh@nvidia.com>
11 months agoPCI: endpoint: pci-epf-test: Clean up pci_epf_test_unbind()
Niklas Cassel [Wed, 20 Mar 2024 11:31:52 +0000 (12:31 +0100)]
PCI: endpoint: pci-epf-test: Clean up pci_epf_test_unbind()

Clean up pci_epf_test_unbind() by using a continue if we did not allocate
memory for the BAR index. This reduces the indentation level by one.

This makes pci_epf_test_unbind() more similar to pci_epf_test_set_bar().

Link: https://lore.kernel.org/linux-pci/20240320113157.322695-6-cassel@kernel.org
Signed-off-by: Niklas Cassel <cassel@kernel.org>
Signed-off-by: Krzysztof Wilczyński <kwilczynski@kernel.org>
Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
11 months agoPCI: endpoint: pci-epf-test: Simplify pci_epf_test_set_bar() loop
Niklas Cassel [Wed, 20 Mar 2024 11:31:51 +0000 (12:31 +0100)]
PCI: endpoint: pci-epf-test: Simplify pci_epf_test_set_bar() loop

Simplify the loop in pci_epf_test_set_bar().
If we allocated memory for the BAR, we need to call set_bar() for that
BAR, if we did not allocated memory for that BAR, we need to skip.
It is as simple as that. This also matches the logic in
pci_epf_test_unbind().

A 64-bit BAR will still only be one allocation, with the BAR succeeding
the 64-bit BAR being null.

While at it, remove the misleading comment.
A EPC .set_bar() callback should never change the epf_bar->flags.
(E.g. to set a 64-bit BAR if we requested a 32-bit BAR.)

A .set_bar() callback should do what we request it to do.
If it can't satisfy the request, it should return an error.

If platform has a specific requirement, e.g. that a certain BAR has to
be a 64-bit BAR, then it should specify that by setting the .only_64bit
flag for that specific BAR in epc_features->bar[], such that
pci_epf_alloc_space() will return a epf_bar with the 64-bit flag set.
(Such that .set_bar() will receive a request to set a 64-bit BAR.)

Link: https://lore.kernel.org/linux-pci/20240320113157.322695-5-cassel@kernel.org
Signed-off-by: Niklas Cassel <cassel@kernel.org>
Signed-off-by: Krzysztof Wilczyński <kwilczynski@kernel.org>
Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>