linux.git
3 years agoMerge tag 'amd-drm-next-5.18-2022-03-09' of https://gitlab.freedesktop.org/agd5f...
Dave Airlie [Wed, 9 Mar 2022 23:28:38 +0000 (09:28 +1000)]
Merge tag 'amd-drm-next-5.18-2022-03-09' of https://gitlab.freedesktop.org/agd5f/linux into drm-next

amd-drm-next-5.18-2022-03-09:

amdgpu:
- Misc code cleanups
- Misc display fixes
- PSR display fixes
- More RAS cleanup
- Hotplug fix
- Bump minor version for hotplug tests
- SR-IOV fixes
- GC 10.3.7 updates
- Remove some firmwares which are no longer used
- Mode2 reset refactor
- Aldebaran fixes
- Add VCN fwlog feature for VCN debugging
- CS code cleanup
- Fix clang warning
- Fix CS clean up rebase breakage

amdkfd:
- SVM fixes
- SMI event fixes and cleanups
- vmid_pasid mapping fix for gfx10.3

Signed-off-by: Dave Airlie <airlied@redhat.com>
From: Alex Deucher <alexander.deucher@amd.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20220309224439.2178877-1-alexander.deucher@amd.com
3 years agoMerge tag 'drm-msm-next-2022-03-08' of https://gitlab.freedesktop.org/drm/msm into...
Dave Airlie [Wed, 9 Mar 2022 22:30:46 +0000 (08:30 +1000)]
Merge tag 'drm-msm-next-2022-03-08' of https://gitlab.freedesktop.org/drm/msm into drm-next

Follow-up pull req for v5.18 to pull in some important fixes.

Signed-off-by: Dave Airlie <airlied@redhat.com>
From: Rob Clark <robdclark@gmail.com>
Link: https://patchwork.freedesktop.org/patch/msgid/CAF6AEGvwHFHEd+9df-0aBOCfmw+ULvTS3f18sJuq_cvGKLDSjw@mail.gmail.com
3 years agodrm/amdgpu: fix a wrong ib reference
Lang Yu [Mon, 7 Mar 2022 03:47:45 +0000 (11:47 +0800)]
drm/amdgpu: fix a wrong ib reference

It should be p->job->ibs[j] instead of p->job->ibs[i] here.

Fixes: cdc7893fc93f19 ("drm/amdgpu: use job and ib structures directly in CS parsers")
Signed-off-by: Lang Yu <Lang.Yu@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
3 years agodrm/amdkfd: bail out early if no get_atc_vmid_pasid_mapping_info
Yifan Zhang [Wed, 9 Mar 2022 01:59:19 +0000 (09:59 +0800)]
drm/amdkfd: bail out early if no get_atc_vmid_pasid_mapping_info

it makes no sense to continue with an undefined vmid.

Fixes: c8b0507f40deea ("drm/amdkfd: judge get_atc_vmid_pasid_mapping_info before call")
Signed-off-by: Yifan Zhang <yifan1.zhang@amd.com>
Reported-by: Nathan Chancellor <nathan@kernel.org>
Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
3 years agoMerge tag 'exynos-drm-next-v5.18' of git://git.kernel.org/pub/scm/linux/kernel/git...
Dave Airlie [Wed, 9 Mar 2022 19:46:36 +0000 (05:46 +1000)]
Merge tag 'exynos-drm-next-v5.18' of git://git./linux/kernel/git/daeinki/drm-exynos into drm-next

New feature
- Add BGR pixel format support for FIMD device. As for this,
  this patch uses undocumented register, WIN_RGB_ORDER, but
  it is safe because product kernels have been using same
  register.

Signed-off-by: Dave Airlie <airlied@redhat.com>
From: Inki Dae <inki.dae@samsung.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20220304085220.324245-1-inki.dae@samsung.com
3 years agodrm/msm/gpu: Fix crash on devices without devfreq support (v2)
Rob Clark [Tue, 8 Mar 2022 18:48:44 +0000 (10:48 -0800)]
drm/msm/gpu: Fix crash on devices without devfreq support (v2)

Avoid going down devfreq paths on devices where devfreq is not
initialized.

v2: Change has_devfreq() logic [Dmitry]

Reported-by: Linux Kernel Functional Testing <lkft@linaro.org>
Reported-by: Anders Roxell <anders.roxell@linaro.org>
Signed-off-by: Rob Clark <robdclark@chromium.org>
Fixes: 6aa89ae1fb04 ("drm/msm/gpu: Cancel idle/boost work on suspend")
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20220308184844.1121029-1-robdclark@gmail.com
3 years agodrm/msm/adreno: fix cast in adreno_get_param()
Dan Carpenter [Mon, 7 Mar 2022 13:31:05 +0000 (16:31 +0300)]
drm/msm/adreno: fix cast in adreno_get_param()

These casts need to happen before the shift.  The only time it would
matter would be if "rev.core" is >= 128.  In that case the sign bit
would be extended and we do not want that.

Fixes: afab9d91d872 ("drm/msm/adreno: Expose speedbin to userspace")
Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com>
Reviewed-by: Akhil P Oommen <quic_akhilpo@quicinc.com>
Link: https://lore.kernel.org/r/20220307133105.GA17534@kili
Signed-off-by: Rob Clark <robdclark@chromium.org>
3 years agodrm/amdkfd: Add format attribute to kfd_smi_event_add
Philip Yang [Fri, 4 Mar 2022 14:33:27 +0000 (09:33 -0500)]
drm/amdkfd: Add format attribute to kfd_smi_event_add

To enable compiler type-checked against the format string in callers.

All warnings (new ones prefixed by >>):

>> warning: function 'kfd_smi_event_add' might be a candidate for
'gnu_printf' format attribute [-Wsuggest-attribute=format]

Fixes: d58b8a99cbb8 ("drm/amdkfd: Add SMI add event helper")
Reported-by: kernel test robot <lkp@intel.com>
Signed-off-by: Philip Yang <Philip.Yang@amd.com>
Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
3 years agodrm/msm: Fix dirtyfb refcounting
Rob Clark [Fri, 4 Mar 2022 20:21:45 +0000 (12:21 -0800)]
drm/msm: Fix dirtyfb refcounting

refcount_t complains about 0->1 transitions, which isn't *quite* what we
wanted.  So use dirtyfb==1 to mean that the fb is not connected to any
output that requires dirtyfb flushing, so that we can keep the underflow
and overflow checking.

Fixes: 9e4dde28e9cd ("drm/msm: Avoid dirtyfb stalls on video mode displays (v2)")
Signed-off-by: Rob Clark <robdclark@chromium.org>
Link: https://lore.kernel.org/r/20220304202146.845566-1-robdclark@gmail.com
3 years agodrm/msm/a6xx: Fix missing ARRAY_SIZE() check
Rob Clark [Sat, 5 Mar 2022 17:34:03 +0000 (09:34 -0800)]
drm/msm/a6xx: Fix missing ARRAY_SIZE() check

Fixes: f6d62d091cfd ("drm/msm/a6xx: add support for Adreno 660 GPU")
Signed-off-by: Rob Clark <robdclark@chromium.org>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20220305173405.914989-1-robdclark@gmail.com
3 years agodrm/msm: Add MSM_SUBMIT_FENCE_SN_IN
Rob Clark [Thu, 24 Feb 2022 22:23:21 +0000 (14:23 -0800)]
drm/msm: Add MSM_SUBMIT_FENCE_SN_IN

Add a way for userspace to specify the sequence number fence used to
track completion of the submit.  As the seqno fence is simply an
incrementing counter which is local to the submitqueue, it is easy for
userspace to know the next value.

This is useful for native userspace drivers in a vm guest, as the guest
to host roundtrip can have high latency.  Assigning the fence seqno in
the guest userspace allows the guest to continue without waiting for
response from the host.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Link: https://lore.kernel.org/r/20220224222321.60653-1-robdclark@gmail.com
3 years agodrm/msm/a6xx: Zap counters across context switch
Rob Clark [Fri, 4 Mar 2022 00:52:17 +0000 (16:52 -0800)]
drm/msm/a6xx: Zap counters across context switch

Any app controlled perfcntr collection (GL_AMD_performance_monitor, etc)
does not require counters to maintain state across context switches.  So
clear them if systemwide profiling is not active.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Link: https://lore.kernel.org/r/20220304005317.776110-5-robdclark@gmail.com
3 years agodrm/msm: Add SYSPROF param (v2)
Rob Clark [Fri, 4 Mar 2022 00:52:16 +0000 (16:52 -0800)]
drm/msm: Add SYSPROF param (v2)

Add a SYSPROF param for system profiling tools like Mesa's pps-producer
(perfetto) to control behavior related to system-wide performance
counter collection.  In particular, for profiling, one wants to ensure
that GPU context switches do not effect perfcounter state, and might
want to suppress suspend (which would cause counters to lose state).

v2: Swap the order in msm_file_private_set_sysprof() [sboyd] and
    initialize the sysprof_active refcount to one (because the under/
    overflow checking in refcount_t doesn't expect a 0->1 transition)
    meaning that values greater than 1 means sysprof is active.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Link: https://lore.kernel.org/r/20220304005317.776110-4-robdclark@gmail.com
3 years agodrm/msm: Add SET_PARAM ioctl
Rob Clark [Fri, 4 Mar 2022 00:52:15 +0000 (16:52 -0800)]
drm/msm: Add SET_PARAM ioctl

It was always expected to have a use for this some day, so we left a
placeholder.  Now we do.  (And I expect another use in the not too
distant future when we start allowing userspace to allocate GPU iova.)

Signed-off-by: Rob Clark <robdclark@chromium.org>
Link: https://lore.kernel.org/r/20220304005317.776110-3-robdclark@gmail.com
3 years agodrm/msm: Update generated headers
Rob Clark [Fri, 4 Mar 2022 00:52:14 +0000 (16:52 -0800)]
drm/msm: Update generated headers

Update headers from mesa commit:

  commit 7e63fa2bb13cf14b765ad06d046789ee1879b5ef
  Author:     Rob Clark <robclark@freedesktop.org>
  AuthorDate: Wed Mar 2 17:11:10 2022 -0800

      freedreno/registers: Add a couple regs we need for kernel

Signed-off-by: Rob Clark <robdclark@chromium.org>
      Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15221>

Signed-off-by: Rob Clark <robdclark@chromium.org>
[for display bits:]
Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com>
Link: https://lore.kernel.org/r/20220304005317.776110-2-robdclark@gmail.com
3 years agodrm/amdgpu: initialize the vmid_wait with the stub fence
Christian König [Tue, 1 Mar 2022 14:13:15 +0000 (15:13 +0100)]
drm/amdgpu: initialize the vmid_wait with the stub fence

This way we don't need to check for NULL any more.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Andrey Grodzovsky <andrey.grodzovsky@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
3 years agodrm/amdgpu: properly embed the IBs into the job
Christian König [Tue, 1 Mar 2022 08:57:41 +0000 (09:57 +0100)]
drm/amdgpu: properly embed the IBs into the job

We now have standard macros for that.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Andrey Grodzovsky <andrey.grodzovsky@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
3 years agodrm/amdgpu: use job and ib structures directly in CS parsers
Christian König [Tue, 1 Mar 2022 08:51:58 +0000 (09:51 +0100)]
drm/amdgpu: use job and ib structures directly in CS parsers

Instead of providing the ib index provide the job and ib pointers directly to
the patch and parse functions for UVD and VCE.

Also move the set/get functions for IB values to the IB declerations.

Signed-off-by: Christian König <christian.koenig@amd.com>
Acked-by: Andrey Grodzovsky <andrey.grodzovsky@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
3 years agodrm/amdgpu: header cleanup
Christian König [Mon, 21 Feb 2022 12:51:17 +0000 (13:51 +0100)]
drm/amdgpu: header cleanup

No function change, just move a bunch of definitions from amdgpu.h into
separate header files.

Signed-off-by: Christian König <christian.koenig@amd.com>
Acked-by: Andrey Grodzovsky <andrey.grodzovsky@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
3 years agodrm/amd/amdgpu: set disabled vcn to no_schduler
Jingwen Chen [Wed, 2 Mar 2022 09:44:38 +0000 (17:44 +0800)]
drm/amd/amdgpu: set disabled vcn to no_schduler

[Why]
after the reset domain introduced, the sched.ready will be init after
hw_init, which will overwrite the setup in vcn hw_init, and lead to
vcn ib test fail.

[How]
set disabled vcn to no_scheduler

Fixes: 5fd8518d187ed0 ("drm/amdgpu: Move scheduler init to after XGMI is ready")
Signed-off-by: Jingwen Chen <Jingwen.Chen2@amd.com>
Acked-by: Andrey Grodzovsky <andrey.grodzovsky@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
3 years agodrm/amdgpu: install ctx entities with cmpxchg
Christian König [Wed, 23 Feb 2022 13:35:31 +0000 (14:35 +0100)]
drm/amdgpu: install ctx entities with cmpxchg

Since we removed the context lock we need to make sure that not two threads
are trying to install an entity at the same time.

Signed-off-by: Christian König <christian.koenig@amd.com>
Fixes: 461fa7b0ac565e ("drm/amdgpu: remove ctx->lock")
Reviewed-by: Andrey Grodzovsky <andrey.grodzovsky@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
3 years agodrm/amdkfd: implement get_atc_vmid_pasid_mapping_info for gfx10.3
Yifan Zhang [Thu, 3 Mar 2022 07:51:43 +0000 (15:51 +0800)]
drm/amdkfd: implement get_atc_vmid_pasid_mapping_info for gfx10.3

This patch implements get_atc_vmid_pasid_mapping_info for gfx10.3

Signed-off-by: Yifan Zhang <yifan1.zhang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
3 years agodrm/amdkfd: judge get_atc_vmid_pasid_mapping_info before call
Yifan Zhang [Thu, 3 Mar 2022 07:57:38 +0000 (15:57 +0800)]
drm/amdkfd: judge get_atc_vmid_pasid_mapping_info before call

Fix the NULL point issue:

[ 3076.255609] BUG: kernel NULL pointer dereference, address: 0000000000000000
[ 3076.255624] #PF: supervisor instruction fetch in kernel mode
[ 3076.255637] #PF: error_code(0x0010) - not-present page
[ 3076.255649] PGD 0 P4D 0
[ 3076.255660] Oops: 0010 [#1] SMP NOPTI
[ 3076.255669] CPU: 20 PID: 2415 Comm: kfdtest Tainted: G        W  OE     5.11.0-41-generic #45~20.04.1-Ubuntu
[ 3076.255691] Hardware name: AMD Splinter/Splinter-RPL, BIOS VS2326337N.FD 02/07/2022
[ 3076.255706] RIP: 0010:0x0
[ 3076.255718] Code: Unable to access opcode bytes at RIP 0xffffffffffffffd6.
[ 3076.255732] RSP: 0018:ffffb64283e3fc10 EFLAGS: 00010297
[ 3076.255744] RAX: 0000000000000000 RBX: 0000000000000008 RCX: 0000000000000027
[ 3076.255759] RDX: ffffb64283e3fc1e RSI: 0000000000000008 RDI: ffff8c7a87f60000
[ 3076.255776] RBP: ffffb64283e3fc78 R08: ffff8c7d88518ac0 R09: ffffb64283e3fa60
[ 3076.255791] R10: 0000000000000001 R11: 0000000000000001 R12: 000000000000000f
[ 3076.255805] R13: ffff8c7bdcea5800 R14: ffff8c7a9f3f3000 R15: ffff8c7a8696bc00
[ 3076.255820] FS:  0000000000000000(0000) GS:ffff8c7d88500000(0000) knlGS:0000000000000000
[ 3076.255839] CS:  0010 DS: 0000 ES: 0000 CR0: 0000000080050033
[ 3076.255851] CR2: ffffffffffffffd6 CR3: 0000000109e3c000 CR4: 0000000000750ee0
[ 3076.255866] PKRU: 55555554
[ 3076.255873] Call Trace:
[ 3076.255884]  dbgdev_wave_reset_wavefronts+0x72/0x160 [amdgpu]
[ 3076.256025]  process_termination_cpsch.cold+0x26/0x2f [amdgpu]
[ 3076.256182]  ? ktime_get_mono_fast_ns+0x4e/0xa0
[ 3076.256196]  kfd_process_dequeue_from_all_devices+0x49/0x70 [amdgpu]
[ 3076.256328]  kfd_process_notifier_release+0x187/0x2b0 [amdgpu]
[ 3076.256451]  ? mn_itree_inv_end+0xdc/0x110
[ 3076.256463]  __mmu_notifier_release+0x74/0x1f0
[ 3076.256474]  exit_mmap+0x170/0x200
[ 3076.256484]  ? __handle_mm_fault+0x677/0x920
[ 3076.256496]  ? _cond_resched+0x19/0x30
[ 3076.256507]  mmput+0x5d/0x130
[ 3076.256518]  do_exit+0x332/0xaf0
[ 3076.256526]  ? handle_mm_fault+0xd7/0x2b0
[ 3076.256537]  do_group_exit+0x43/0xa0
[ 3076.256548]  __x64_sys_exit_group+0x18/0x20
[ 3076.256559]  do_syscall_64+0x38/0x90
[ 3076.256569]  entry_SYSCALL_64_after_hwframe+0x44/0xa9

Signed-off-by: Yifan Zhang <yifan1.zhang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
3 years agodrm/amdgpu/vcn: Add vcn firmware log
Ruijing Dong [Wed, 2 Mar 2022 20:19:22 +0000 (15:19 -0500)]
drm/amdgpu/vcn: Add vcn firmware log

vcn fwlog is for debugging purpose only,
by default, it is disabled.

Signed-off-by: Ruijing Dong <ruijing.dong@amd.com>
Reviewed-by: Leo Liu <leo.liu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
3 years agodrm/amdgpu/vcn: Update fw shared data structure
Ruijing Dong [Wed, 2 Mar 2022 18:52:49 +0000 (13:52 -0500)]
drm/amdgpu/vcn: Update fw shared data structure

Add fw log in fw shared data structure.

Reviewed-by: Leo Liu <leo.liu@amd.com>
Signed-off-by: Ruijing Dong <ruijing.dong@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
3 years agodrm/amdgpu: Add DFC CAP support for aldebaran
David Yu [Thu, 3 Mar 2022 02:45:11 +0000 (21:45 -0500)]
drm/amdgpu: Add DFC CAP support for aldebaran

Add DFC CAP support for aldebaran

Initialize cap microcode in psp_init_sriov_microcode,
the ta microcode will be  initialized in psp_vxx_init_microcode

Signed-off-by: David Yu <David.Yu@amd.com>
Reviewed-by: Shaoyun.liu <Shaoyun.liu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
3 years agodrm/amdgpu: Set correct DMA mask for aldebaran
Harish Kasiviswanathan [Sun, 20 Feb 2022 22:46:49 +0000 (17:46 -0500)]
drm/amdgpu: Set correct DMA mask for aldebaran

Aldebaran has 48-bit physical address support

Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com>
Signed-off-by: Harish Kasiviswanathan <Harish.Kasiviswanathan@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
3 years agodrm/amdgpu: Refactor mode2 reset logic for v13.0.2
Lijo Lazar [Fri, 25 Feb 2022 09:24:13 +0000 (14:54 +0530)]
drm/amdgpu: Refactor mode2 reset logic for v13.0.2

Use IP version and refactor reset logic to apply to a list of devices.

Signed-off-by: Lijo Lazar <lijo.lazar@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Le Ma <Le.Ma@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
3 years agodrm/amd/display: 3.2.175
Aric Cyr [Mon, 21 Feb 2022 01:45:59 +0000 (20:45 -0500)]
drm/amd/display: 3.2.175

drm/amd/display: 3.2.175

    This version brings along following fixes:
    - Remove invalid RDPCS Programming in DAL
    - Make functional resource functions non-static
    - Reset VIC if HDMI_VIC is present
    - Add frame alternate 3D & restrict HW packed on dongles
    - Reg to turn on/off PSR Power seq in FSM
    - Modify plane removal sequence to avoid hangs
    - Pass HostVM enable flag into DCN3.1 DML
    - DC Validation failures
    - Program OPP before ODM
    - Refactor fixed VS w/a for PHY tests
    - Pass deep sleep disabled allow info to dmub fw
    - Refine the EDID override
    - [FW Promotion] Release 0.0.106.0
    - Add verify_link_cap back for hdmi

Acked-by: Alan Liu <HaoPing.Liu@amd.com>
Signed-off-by: Aric Cyr <aric.cyr@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
3 years agodrm/amd/display: add verify_link_cap back for hdmi
Charlene Liu [Mon, 21 Feb 2022 00:02:20 +0000 (19:02 -0500)]
drm/amd/display: add verify_link_cap back for hdmi

[why]
hdmi specific: add verify link cap after retrive link cap.

Reviewed-by: Alvin Lee <Alvin.Lee2@amd.com>
Acked-by: Alan Liu <HaoPing.Liu@amd.com>
Signed-off-by: Charlene Liu <Charlene.Liu@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
3 years agodrm/amd/display: [FW Promotion] Release 0.0.106.0
Anthony Koo [Sun, 20 Feb 2022 16:37:09 +0000 (11:37 -0500)]
drm/amd/display: [FW Promotion] Release 0.0.106.0

Acked-by: Alan Liu <HaoPing.Liu@amd.com>
Signed-off-by: Anthony Koo <Anthony.Koo@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
3 years agodrm/amd/display: refine the EDID override
jinzh [Thu, 10 Feb 2022 14:50:06 +0000 (22:50 +0800)]
drm/amd/display: refine the EDID override

[Why]
We already get the SBIOS EDID via ACPI on KMD,
but after that, we just use the monitor EDID to set it HDR caps

[How]
Make the SBIOS EDID override to read_edid()
That can change the read EDID caps from the right EDID

Reviewed-by: Aric Cyr <Aric.Cyr@amd.com>
Acked-by: Alan Liu <HaoPing.Liu@amd.com>
Signed-off-by: jinzh <jinzh@github.amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
3 years agodrm/amd/display: Pass deep sleep disabled allow info to dmub fw
Robin Chen [Thu, 17 Feb 2022 11:19:22 +0000 (19:19 +0800)]
drm/amd/display: Pass deep sleep disabled allow info to dmub fw

[Why]
The deep sleep mode need to be disabled in some PSR scenario.

Reviewed-by: Anthony Koo <Anthony.Koo@amd.com>
Acked-by: Alan Liu <HaoPing.Liu@amd.com>
Signed-off-by: Robin Chen <robin.chen@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
3 years agodrm/amd/display: Refactor fixed VS w/a for PHY tests
George Shen [Thu, 17 Feb 2022 21:01:15 +0000 (16:01 -0500)]
drm/amd/display: Refactor fixed VS w/a for PHY tests

[Why/How]
Refactor original w/a to unify naming and
simplify logic. This also re-enables the code
that was previously skipped due to the
disabling of the previous workaround logic.

Reviewed-by: Wenjing Liu <Wenjing.Liu@amd.com>
Reviewed-by: Nevenko Stupar <Nevenko.Stupar@amd.com>
Acked-by: Alan Liu <HaoPing.Liu@amd.com>
Signed-off-by: George Shen <George.Shen@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
3 years agodrm/amd/display: Program OPP before ODM
Wesley Chalmers [Tue, 8 Feb 2022 23:12:49 +0000 (18:12 -0500)]
drm/amd/display: Program OPP before ODM

[WHY]
HW expects OPP to be configured before ODM is enabled.
Failure to do so can cause errors.

Reviewed-by: Aric Cyr <Aric.Cyr@amd.com>
Acked-by: Alan Liu <HaoPing.Liu@amd.com>
Signed-off-by: Wesley Chalmers <Wesley.Chalmers@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
3 years agodrm/amd/display: Pass HostVM enable flag into DCN3.1 DML
Michael Strauss [Wed, 16 Feb 2022 22:01:18 +0000 (17:01 -0500)]
drm/amd/display: Pass HostVM enable flag into DCN3.1 DML

[WHY]
Calculations differ with HostVM enabled/disabled, causing underflow in
configs with high refresh displays + scaling due to lower available BW

[HOW]
Check riommu_active in order to pass correct HostVM enablement to DML

Reviewed-by: Nicholas Kazlauskas <Nicholas.Kazlauskas@amd.com>
Acked-by: Alan Liu <HaoPing.Liu@amd.com>
Signed-off-by: Michael Strauss <michael.strauss@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
3 years agodrm/exynos: fimd: add BGR support for exynos4/5
Martin Jücker [Sat, 29 Jan 2022 22:01:53 +0000 (23:01 +0100)]
drm/exynos: fimd: add BGR support for exynos4/5

In the downstream kernels for exynos4 and exynos5 devices, there is an
undocumented register that controls the order of the RGB output. It can
be set to either normal order or reversed, which enables BGR support for
those SoCs.

This patch enables the BGR support for all the SoCs that were found to
have at least one device with this logic in the corresponding downstream
kernels.

Signed-off-by: Martin Jücker <martin.juecker@gmail.com>
Signed-off-by: Inki Dae <inki.dae@samsung.com>
3 years agodrm/exynos: Search for TE-gpio in DSI panel's node
Marek Szyprowski [Mon, 24 Jan 2022 13:52:46 +0000 (14:52 +0100)]
drm/exynos: Search for TE-gpio in DSI panel's node

TE-gpio, if defined, is placed in the panel's node, not the parent DSI
node. Change the devm_gpiod_get_optional() to gpiod_get_optional() and
pass proper device node to it. The code already has a proper cleanup
path, so it looks that the devm_* variant has been applied accidentally
during the conversion to gpiod API.

Fixes: ee6c8b5afa62 ("drm/exynos: Replace legacy gpio interface for gpiod interface")
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Fixed a typo.
Signed-off-by: Inki Dae <inki.dae@samsung.com>
3 years agodrm/exynos: Don't fail if no TE-gpio is defined for DSI driver
Marek Szyprowski [Fri, 21 Jan 2022 10:00:39 +0000 (11:00 +0100)]
drm/exynos: Don't fail if no TE-gpio is defined for DSI driver

TE-gpio is optional and if it is not found then gpiod_get_optional()
returns NULL. In such case the code will continue and try to convert NULL
gpiod to irq what in turn fails. The failure is then propagated and driver
is not registered.

Fix this by returning early from exynos_dsi_register_te_irq() if no
TE-gpio is found.

Fixes: ee6c8b5afa62 ("drm/exynos: Replace legacy gpio interface for gpiod interface")
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Signed-off-by: Inki Dae <inki.dae@samsung.com>
3 years agodrm/exynos: gsc: Use platform_get_irq() to get the interrupt
Lad Prabhakar [Wed, 22 Dec 2021 19:01:34 +0000 (19:01 +0000)]
drm/exynos: gsc: Use platform_get_irq() to get the interrupt

platform_get_resource(pdev, IORESOURCE_IRQ, ..) relies on static
allocation of IRQ resources in DT core code, this causes an issue
when using hierarchical interrupt domains using "interrupts" property
in the node as this bypassed the hierarchical setup and messed up the
irq chaining.

In preparation for removal of static setup of IRQ resource from DT core
code use platform_get_irq().

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Signed-off-by: Inki Dae <inki.dae@samsung.com>
3 years agodrm/exynos/fimc: Use platform_get_irq() to get the interrupt
Lad Prabhakar [Wed, 22 Dec 2021 19:01:33 +0000 (19:01 +0000)]
drm/exynos/fimc: Use platform_get_irq() to get the interrupt

platform_get_resource(pdev, IORESOURCE_IRQ, ..) relies on static
allocation of IRQ resources in DT core code, this causes an issue
when using hierarchical interrupt domains using "interrupts" property
in the node as this bypassed the hierarchical setup and messed up the
irq chaining.

In preparation for removal of static setup of IRQ resource from DT core
code use platform_get_irq().

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Signed-off-by: Inki Dae <inki.dae@samsung.com>
3 years agodrm/exynos/exynos_drm_fimd: Use platform_get_irq_byname() to get the interrupt
Lad Prabhakar [Wed, 22 Dec 2021 19:01:32 +0000 (19:01 +0000)]
drm/exynos/exynos_drm_fimd: Use platform_get_irq_byname() to get the interrupt

platform_get_resource_byname(pdev, IORESOURCE_IRQ, ..) relies on static
allocation of IRQ resources in DT core code, this causes an issue
when using hierarchical interrupt domains using "interrupts" property
in the node as this bypassed the hierarchical setup and messed up the
irq chaining.

In preparation for removal of static setup of IRQ resource from DT core
code use platform_get_irq_byname().

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Signed-off-by: Inki Dae <inki.dae@samsung.com>
3 years agodrm/exynos: mixer: Use platform_get_irq() to get the interrupt
Lad Prabhakar [Wed, 22 Dec 2021 19:01:31 +0000 (19:01 +0000)]
drm/exynos: mixer: Use platform_get_irq() to get the interrupt

platform_get_resource(pdev, IORESOURCE_IRQ, ..) relies on static
allocation of IRQ resources in DT core code, this causes an issue
when using hierarchical interrupt domains using "interrupts" property
in the node as this bypassed the hierarchical setup and messed up the
irq chaining.

In preparation for removal of static setup of IRQ resource from DT core
code use platform_get_irq().

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Signed-off-by: Inki Dae <inki.dae@samsung.com>
3 years agodrm/exynos/exynos7_drm_decon: Use platform_get_irq_byname() to get the interrupt
Lad Prabhakar [Wed, 22 Dec 2021 19:01:30 +0000 (19:01 +0000)]
drm/exynos/exynos7_drm_decon: Use platform_get_irq_byname() to get the interrupt

platform_get_resource_byname(pdev, IORESOURCE_IRQ, ..) relies on static
allocation of IRQ resources in DT core code, this causes an issue
when using hierarchical interrupt domains using "interrupts" property
in the node as this bypassed the hierarchical setup and messed up the
irq chaining.

In preparation for removal of static setup of IRQ resource from DT core
code use platform_get_irq_byname().

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Signed-off-by: Inki Dae <inki.dae@samsung.com>
3 years agoMerge tag 'drm-msm-next-2022-03-01' of https://gitlab.freedesktop.org/drm/msm into...
Dave Airlie [Fri, 4 Mar 2022 04:30:28 +0000 (14:30 +1000)]
Merge tag 'drm-msm-next-2022-03-01' of https://gitlab.freedesktop.org/drm/msm into drm-next

We're experimenting a bit with the process this time, with Dmitry
collecting display patches and merging them into msm-next with me
handling the gpu/etc side of things.  Summary of interesting new bits
and pieces

* dpu + dp support for sc8180x
* dp support for sm8350
* dpu + dsi support for qcm2290
* 10nm dsi phy tuning support
* bridge support for dp encoder
* gpu support for additional 7c3 SKUs
* assorted cleanups and fixes

Signed-off-by: Dave Airlie <airlied@redhat.com>
From: Rob Clark <robdclark@gmail.com>
Link: https://patchwork.freedesktop.org/patch/msgid/CAF6AEGu=Jdrw6DqYOYPTMks7=zatrsvdR=o6DpjqZ=TQQhFZuw@mail.gmail.com
3 years agoMerge tag 'drm-intel-gt-next-2022-03-03' of git://anongit.freedesktop.org/drm/drm...
Dave Airlie [Fri, 4 Mar 2022 04:16:30 +0000 (14:16 +1000)]
Merge tag 'drm-intel-gt-next-2022-03-03' of git://anongit.freedesktop.org/drm/drm-intel into drm-next

Cross-subsystem Changes:

- drm-next backmerge for buddy allocator changes

Driver Changes:

- Skip i915_perf init for DG2 as it is not yet enabled (Ram)
- Add missing workarounds for DG2 (Clint)
- Add 64K page/align support for platforms like DG2 that require it (Matt A, Ram, Bob)
- Add accelerated migration support for DG2 (Matt A)
- Add flat CCS support for XeHP SDV (Abdiel, Ram)
- Add Compute Command Streamer (CCS) engine support for XeHP SDV (Michel,
  Daniele, Aravind, Matt R)
- Don't support parallel submission on compute / render (Matt B, Matt R)

- Disable i915 build on PREEMPT_RT until RT behaviour fixed (Sebastian)
- Remove RPS interrupt support for TGL+ (Jose)
- Fix S/R with PM_EARLY for non-GTT mappable objects on DG2 (Matt, Lucas)
- Skip stolen memory init if it is fully reserved (Jose)
- Use iosys_map for GuC data structures that may be in LMEM BAR or SMEM (Lucas)
- Do not complain about stale GuC reset notifications for banned contexts (John)

- Move context descriptor fields to intel_lrc.h
- Start adding support for small BAR (Matt A)
- Clarify vma lifetime (Thomas)
- Simplify subplatform detection on TGL (Jose)
- Correct the param count for unset GuC SLPC param (Vinay, Umesh)
- Read RP_STATE_CAP correctly on Gen12 with GuC SLPC (Vinay)
- Initialize GuC submission locks and queues early (Daniele)
- Fix GuC flag query helper function to not modify state (John)

- Drop fake lmem support now we have real hardware available (Lucas)
- Move misplaced W/A to their correct locations (Srinivasan)
- Use get_reset_domain() helper (Tejas)
- Move context descriptor fields to intel_lrc.h (Matt R)
- Selftest improvements (Matt A)

Signed-off-by: Dave Airlie <airlied@redhat.com>
From: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/YiBzY1dM7bKwMQ3H@jlahtine-mobl.ger.corp.intel.com
3 years agoMerge tag 'drm-misc-next-2022-03-03' of git://anongit.freedesktop.org/drm/drm-misc...
Dave Airlie [Fri, 4 Mar 2022 03:41:52 +0000 (13:41 +1000)]
Merge tag 'drm-misc-next-2022-03-03' of git://anongit.freedesktop.org/drm/drm-misc into drm-next

drm-misc-next for v5.18:

UAPI Changes:

Cross-subsystem Changes:
- Improve performance of some fbdev ops, in some cases up to 6x faster.

Core Changes:
- Some small DP fixes.
- Find panels in subnodes of OF devices, and add of_get_drm_panel_display_mode
  to retrieve mode.
- Add drm_object_property_get_default_value and use it for resetting
  zpos in plane state reset, removing the need for individual drivers
  to do it.
- Same for color encoding and color range props.
- Update panic handling todo doc.
- Add todo that format conversion helpers should be sped up similarly to fbdev ops.

Driver Changes:
- Add panel orientation property to simpledrm for quirked panels.
- Assorted small fixes to tiny/repaper, nouveau, stm, omap, ssd130x.
- Add crc support to stm/ltdc.
- Add MIPI DBI compatible SPI driver
- Assorted small fixes to tiny panels and bridge drivers.
- Add AST2600 support to aspeed.

Signed-off-by: Dave Airlie <airlied@redhat.com>
From: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/48fabd78-ade9-f80b-c724-13726c7be69e@linux.intel.com
3 years agoMerge tag 'du-next-20220303' of git://linuxtv.org/pinchartl/media into drm-next
Dave Airlie [Fri, 4 Mar 2022 03:09:15 +0000 (13:09 +1000)]
Merge tag 'du-next-20220303' of git://linuxtv.org/pinchartl/media into drm-next

- R-Car LVDS support for M3-W+ (R8A77961) SoC
- R-Car DU misc fixes and cleanups

Signed-off-by: Dave Airlie <airlied@redhat.com>
From: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Link: https://patchwork.freedesktop.org/patch/msgid/YiCwy3FR3gPng4dN@pendragon.ideasonboard.com
3 years agoMerge tag 'drm/tegra/for-5.18-rc1' of https://gitlab.freedesktop.org/drm/tegra into...
Dave Airlie [Fri, 4 Mar 2022 02:50:47 +0000 (12:50 +1000)]
Merge tag 'drm/tegra/for-5.18-rc1' of https://gitlab.freedesktop.org/drm/tegra into drm-next

drm/tegra: Changes for v5.18-rc1

This contains a couple more minor fixes that didn't seem urgent enough
for v5.17. On top of that this improves YUV format support on older
chips.

Signed-off-by: Dave Airlie <airlied@redhat.com>
From: Thierry Reding <thierry.reding@gmail.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20220301124426.1207653-1-thierry.reding@gmail.com
3 years agodrm: rcar-du: Don't restart group when enabling plane on Gen3
Laurent Pinchart [Mon, 21 Feb 2022 16:54:41 +0000 (18:54 +0200)]
drm: rcar-du: Don't restart group when enabling plane on Gen3

On Gen3 hardware enabling a VSP plane doesn't change any register that
requires DRES to take effect. Avoid a group restart in that case.

Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Reviewed-by: Kieran Bingham <kieran.bingham+renesas@ideasonboard.com>
3 years agodrm: rcar-du: Don't select VSP1 sink on Gen3
Laurent Pinchart [Mon, 21 Feb 2022 16:54:41 +0000 (18:54 +0200)]
drm: rcar-du: Don't select VSP1 sink on Gen3

The VSP1 sink selection through register DEFR8 is only available on Gen2
hardware. Skip it on Gen3.

Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Reviewed-by: Kieran Bingham <kieran.bingham+renesas@ideasonboard.com>
3 years agodrm: rcar-du: Drop LVDS device tree backward compatibility
Laurent Pinchart [Wed, 26 Jan 2022 20:13:23 +0000 (22:13 +0200)]
drm: rcar-du: Drop LVDS device tree backward compatibility

The rcar-du driver goes to great lengths to preserve device tree
backward compatibility for the LVDS encoders by patching old device
trees at runtime.

The last R-Car Gen2 platform was converted to the new bindings commit
edb0c3affe5214a2 ("ARM: dts: r8a7793: Convert to new LVDS DT bindings"),
in v4.17, and the last RZ/G1 platform converted in commit
6a6a797625b5fe85 ("ARM: dts: r8a7743: Convert to new LVDS DT bindings"),
in v5.0. Both are older than commit 58256143cff7c2e0 ("clk: renesas:
Remove R-Car Gen2 legacy DT clock support"), in v5.5, which removes
support for legacy bindings for clocks. The LVDS compatibility code is
thus not needed anymore. Drop it.

Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Reviewed-by: Kieran Bingham <kieran.bingham+renesas@ideasonboard.com>
3 years agodrm: rcar-du: lvds: Add r8a77961 support
Nikita Yushchenko [Fri, 24 Dec 2021 05:23:07 +0000 (08:23 +0300)]
drm: rcar-du: lvds: Add r8a77961 support

The M3-W+ SoC has the same LVDS encoder as other R-Car Gen3 chips.
Add support for M3-W+ (R8A77961) SoC to the LVDS encoder driver.

Signed-off-by: Nikita Yushchenko <nikita.yoush@cogentembedded.com>
Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
3 years agodt-bindings: display: bridge: renesas,lvds: Document r8a77961 bindings
Nikita Yushchenko [Fri, 24 Dec 2021 05:23:09 +0000 (08:23 +0300)]
dt-bindings: display: bridge: renesas,lvds: Document r8a77961 bindings

Document the R-Car M3-W+ (R8A77961) SoC in the R-Car LVDS encoder
bindings.

Signed-off-by: Nikita Yushchenko <nikita.yoush@cogentembedded.com>
Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
3 years agodrm/ssd130x: remove redundant initialization of pointer mode
Colin Ian King [Wed, 2 Mar 2022 17:53:09 +0000 (17:53 +0000)]
drm/ssd130x: remove redundant initialization of pointer mode

Pointer mode is being assigned a value that is never read, it is
being re-assigned later with a new value. The initialization is
redundant and can be removed.

Cleans up clang scan build warning:
drivers/gpu/drm/solomon/ssd130x.c:582:27: warning: Value stored
to 'mode' during its initialization is never read [deadcode.DeadStores]

Signed-off-by: Colin Ian King <colin.i.king@gmail.com>
Acked-by: Javier Martinez Canillas <javierm@redhat.com>
Signed-off-by: Javier Martinez Canillas <javierm@redhat.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20220302175309.1098827-1-colin.i.king@gmail.com
3 years agodt-bindings: display/msm: add missing brace in dpu-qcm2290.yaml
Dmitry Baryshkov [Wed, 2 Mar 2022 00:14:10 +0000 (03:14 +0300)]
dt-bindings: display/msm: add missing brace in dpu-qcm2290.yaml

Add missing brace in dpu-qcm2290.yaml. While we are at it, also fix
indentation for another brace, so it matches the corresponding line.

Reported-by: Rob Herring <robh@kernel.org>
Cc: Loic Poulain <loic.poulain@linaro.org>
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Fixes: 164f69d9d45a ("dt-bindings: msm: disp: add yaml schemas for QCM2290 DPU bindings")
Link: https://lore.kernel.org/r/20220302001410.2264039-1-dmitry.baryshkov@linaro.org
Signed-off-by: Rob Clark <robdclark@chromium.org>
Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com>
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
3 years agodrm/amdgpu: remove redundant null check
Weiguo Li [Wed, 2 Mar 2022 16:17:39 +0000 (00:17 +0800)]
drm/amdgpu: remove redundant null check

Remove the redundant null check since the caller ensures
that 'ctx' is never NULL.

Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Weiguo Li <liwg06@foxmail.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
3 years agodrm/amdgpu/sdma5: drop unused cyan skillfish firmware
Alex Deucher [Tue, 1 Mar 2022 15:54:51 +0000 (10:54 -0500)]
drm/amdgpu/sdma5: drop unused cyan skillfish firmware

Leftover from bring up.  Not used anymore.

Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
3 years agodrm/amdgpu/gfx10: drop unused cyan skillfish firmware
Alex Deucher [Tue, 1 Mar 2022 15:51:54 +0000 (10:51 -0500)]
drm/amdgpu/gfx10: drop unused cyan skillfish firmware

Leftover from bring up.  Not used anymore.

Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
3 years agodrm/amdgpu: remove unused gpu_info firmwares
Alex Deucher [Tue, 1 Mar 2022 15:47:37 +0000 (10:47 -0500)]
drm/amdgpu: remove unused gpu_info firmwares

These were leftover from bring up and are no longer
necessary.  The information is available via
the IP discovery table.

Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
3 years agodrm/amdgpu: Use IP versions in convert_tiling_flags_to_modifier()
Alex Deucher [Mon, 28 Feb 2022 19:31:59 +0000 (14:31 -0500)]
drm/amdgpu: Use IP versions in convert_tiling_flags_to_modifier()

Rather than checking the asic_type.

Reviewed-by: Guchun Chen <guchun.chen@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
3 years agodrm/amd/display: Modify plane removal sequence to avoid hangs.
Dillon Varone [Thu, 10 Feb 2022 23:17:39 +0000 (18:17 -0500)]
drm/amd/display: Modify plane removal sequence to avoid hangs.

Reviewed-by: Aric Cyr <Aric.Cyr@amd.com>
Acked-by: Alan Liu <HaoPing.Liu@amd.com>
Signed-off-by: Dillon Varone <dillon.varone@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
3 years agodrm/amd/pm: new v3 SmuMetrics data structure for Sienna Cichlid
Danijel Slivka [Wed, 2 Mar 2022 10:29:55 +0000 (11:29 +0100)]
drm/amd/pm: new v3 SmuMetrics data structure for Sienna Cichlid

structure changed in smc_fw_version >= 0x3A4900,
    "uint16_t VcnActivityPercentage" replaced with
    "uint16_t VcnUsagePercentage0" and "uint16_t VcnUsagePercentage1"

Signed-off-by: Danijel Slivka <danijel.slivka@amd.com>
Acked-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Evan Quan <evan.quan@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
3 years agodrm/amdgpu: enable gfxoff routine for GC 10.3.7
Prike Liang [Tue, 1 Mar 2022 09:33:09 +0000 (17:33 +0800)]
drm/amdgpu: enable gfxoff routine for GC 10.3.7

Enable gfxoff routine for GC 10.3.7.

Signed-off-by: Prike Liang <Prike.Liang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
3 years agodrm/amdgpu: enable gfx power gating for GC 10.3.7
Prike Liang [Tue, 1 Mar 2022 06:08:24 +0000 (14:08 +0800)]
drm/amdgpu: enable gfx power gating for GC 10.3.7

Enable gfx power gating for GC 10.3.7.

Signed-off-by: Prike Liang <Prike.Liang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
3 years agodrm/amdgpu/nv: enable clock gating for GC 10.3.7 subblock
Prike Liang [Tue, 1 Mar 2022 03:22:23 +0000 (11:22 +0800)]
drm/amdgpu/nv: enable clock gating for GC 10.3.7 subblock

This will enable the following block clock gating.

 - MC
 - SDMA
 - HDP
 - ATHUB
 - IH
 - VCN/JPEG

Signed-off-by: Prike Liang <Prike.Liang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
3 years agodrm/amdgpu: enable gfx clock gating control for GC 10.3.7
Prike Liang [Tue, 1 Mar 2022 02:48:11 +0000 (10:48 +0800)]
drm/amdgpu: enable gfx clock gating control for GC 10.3.7

Enable gfx cg gate/ungate control for GC 10.3.7.

Signed-off-by: Prike Liang <Prike.Liang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
3 years agodrm/amdgpu: fix suspend/resume hang regression
Qiang Yu [Tue, 1 Mar 2022 06:11:59 +0000 (14:11 +0800)]
drm/amdgpu: fix suspend/resume hang regression

Regression has been reported that suspend/resume may hang with
the previous vm ready check commit.

So bring back the evicted list check as a temp fix.

Bug: https://gitlab.freedesktop.org/drm/amd/-/issues/1922
Fixes: c1a66c3bc425 ("drm/amdgpu: check vm ready by amdgpu_vm->evicting flag")
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Qiang Yu <qiang.yu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
3 years agodrm/amdgpu: Move CAP firmware loading to the beginning of PSP firmware list
Yifan Zha [Tue, 1 Mar 2022 05:54:42 +0000 (13:54 +0800)]
drm/amdgpu: Move CAP firmware loading to the beginning of PSP firmware list

[Why]
As PSP needs to verify the signature, CAP firmware must be loaded first when PSP loads firmwares.
Otherwise, when DFC feature is enabled, CP firmwares would be loaded failed.

[ 1149.160480] [drm] MM table gpu addr = 0x800022f000, cpu addr = 00000000a62afcea.
[ 1149.209874] [drm] failed to load ucode CP_CE(0x8)
[ 1149.209878] [drm] psp gfx command LOAD_IP_FW(0x6) failed and response status is (0xFFFF0007)
[ 1149.215914] [drm] failed to load ucode CP_PFP(0x9)
[ 1149.215917] [drm] psp gfx command LOAD_IP_FW(0x6) failed and response status is (0xFFFF0007)
[ 1149.221941] [drm] failed to load ucode CP_ME(0xA)
[ 1149.221944] [drm] psp gfx command LOAD_IP_FW(0x6) failed and response status is (0xFFFF0007)
[ 1149.228082] [drm] failed to load ucode CP_MEC1(0xB)
[ 1149.228085] [drm] psp gfx command LOAD_IP_FW(0x6) failed and response status is (0xFFFF0007)
[ 1149.234209] [drm] failed to load ucode CP_MEC2(0xD)
[ 1149.234212] [drm] psp gfx command LOAD_IP_FW(0x6) failed and response status is (0xFFFF0007)
[ 1149.242379] [drm] failed to load ucode VCN(0x1C)
[ 1149.242382] [drm] psp gfx command LOAD_IP_FW(0x6) failed and response status is (0xFFFF0007)

[How]
Move CAP UCODE ID to the beginning of AMDGPU_UCODE_ID enum list.

Signed-off-by: Yifan Zha <Yifan.Zha@amd.com>
Reviewed-by: Bokun Zhang <Bokun.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
3 years agodrm/amdgpu: Bump minor version for hot plug tests enabling.
Andrey Grodzovsky [Tue, 1 Mar 2022 17:58:23 +0000 (12:58 -0500)]
drm/amdgpu: Bump minor version for hot plug tests enabling.

This will allow to enable the tests only after latest fix
after which the tests passed on my system.

I tested on NV21 standalone and Vega 10 and Polaris as
pair with DRI_PRIME.

It's possible there might be still issues on ASICs i don't
have at my posession but that that the point of enbling
the tests finally - if other people during testing will
encounter errors they will report and I will be able to fix.

The releated merge request for enabling libdrm tests suite  is in
https://gitlab.freedesktop.org/mesa/drm/-/merge_requests/227

Signed-off-by: Andrey Grodzovsky <andrey.grodzovsky@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
3 years agodrm/amdgpu: Fix sigsev when accessing MMIO on hot unplug.
Andrey Grodzovsky [Tue, 1 Mar 2022 00:03:36 +0000 (19:03 -0500)]
drm/amdgpu: Fix sigsev when accessing MMIO on hot unplug.

Protect with drm_dev_enter/exit

Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Andrey Grodzovsky <andrey.grodzovsky@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
3 years agodrm/amdgpu: convert code name to ip version for noretry set
Yifan Zhang [Wed, 2 Mar 2022 19:09:07 +0000 (14:09 -0500)]
drm/amdgpu: convert code name to ip version for noretry set

Use IP version rather than codename for noretry set.

Acked-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Yifan Zhang <yifan1.zhang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
3 years agodrm/amdgpu: move amdgpu_gmc_noretry_set after ip_versions populated
Yifan Zhang [Tue, 1 Mar 2022 10:26:43 +0000 (18:26 +0800)]
drm/amdgpu: move amdgpu_gmc_noretry_set after ip_versions populated

otherwise adev->ip_versions is still empty when amdgpu_gmc_noretry_set
is called.

Reviewed-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Yifan Zhang <yifan1.zhang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
3 years agodrm/amdgpu: Remove redundant .ras_fini initialization in some ras blocks
yipechai [Thu, 17 Feb 2022 07:40:12 +0000 (15:40 +0800)]
drm/amdgpu: Remove redundant .ras_fini initialization in some ras blocks

1. Define amdgpu_ras_block_late_fini_default in amdgpu_ras.c as
   .ras_fini common function, which is called when
   .ras_fini of ras block isn't initialized.
2. Remove the code of using amdgpu_ras_block_late_fini to
   initialize .ras_fini in ras blocks.

Signed-off-by: yipechai <YiPeng.Chai@amd.com>
Reviewed-by: Tao Zhou <tao.zhou1@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
3 years agodrm/amdgpu: Remove redundant calls of amdgpu_ras_block_late_fini in mca ras block
yipechai [Thu, 17 Feb 2022 07:33:24 +0000 (15:33 +0800)]
drm/amdgpu: Remove redundant calls of amdgpu_ras_block_late_fini in mca ras block

Remove redundant calls of amdgpu_ras_block_late_fini in mca ras block.

Signed-off-by: yipechai <YiPeng.Chai@amd.com>
Reviewed-by: Tao Zhou <tao.zhou1@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
3 years agodrm/amdgpu: Remove redundant calls of amdgpu_ras_block_late_fini in sdma ras block
yipechai [Mon, 14 Feb 2022 08:15:19 +0000 (16:15 +0800)]
drm/amdgpu: Remove redundant calls of amdgpu_ras_block_late_fini in sdma ras block

Remove redundant calls of amdgpu_ras_block_late_fini in sdma ras block.

Signed-off-by: yipechai <YiPeng.Chai@amd.com>
Reviewed-by: Tao Zhou <tao.zhou1@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
3 years agodrm/amdgpu: Remove redundant calls of amdgpu_ras_block_late_fini in hdp ras block
yipechai [Thu, 17 Feb 2022 07:02:32 +0000 (15:02 +0800)]
drm/amdgpu: Remove redundant calls of amdgpu_ras_block_late_fini in hdp ras block

Remove redundant calls of amdgpu_ras_block_late_fini in hdp ras block.

Signed-off-by: yipechai <YiPeng.Chai@amd.com>
Reviewed-by: Tao Zhou <tao.zhou1@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
3 years agodrm/amdgpu: Remove redundant calls of amdgpu_ras_block_late_fini in xgmi ras block
yipechai [Mon, 14 Feb 2022 08:10:32 +0000 (16:10 +0800)]
drm/amdgpu: Remove redundant calls of amdgpu_ras_block_late_fini in xgmi ras block

Remove redundant calls of amdgpu_ras_block_late_fini in xgmi ras block.

Signed-off-by: yipechai <YiPeng.Chai@amd.com>
Reviewed-by: Tao Zhou <tao.zhou1@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
3 years agodrm/amdgpu: Remove redundant calls of amdgpu_ras_block_late_fini in umc ras block
yipechai [Mon, 14 Feb 2022 08:07:55 +0000 (16:07 +0800)]
drm/amdgpu: Remove redundant calls of amdgpu_ras_block_late_fini in umc ras block

Remove redundant calls of amdgpu_ras_block_late_fini in umc ras block.

Signed-off-by: yipechai <YiPeng.Chai@amd.com>
Reviewed-by: Tao Zhou <tao.zhou1@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
3 years agodrm/amdgpu: Remove redundant calls of amdgpu_ras_block_late_fini in nbio ras block
yipechai [Mon, 14 Feb 2022 08:04:08 +0000 (16:04 +0800)]
drm/amdgpu: Remove redundant calls of amdgpu_ras_block_late_fini in nbio ras block

Remove redundant calls of amdgpu_ras_block_late_fini in nbio ras block.

Signed-off-by: yipechai <YiPeng.Chai@amd.com>
Reviewed-by: Tao Zhou <tao.zhou1@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
3 years agodrm/amdgpu: Remove redundant calls of amdgpu_ras_block_late_fini in mmhub ras block
yipechai [Mon, 14 Feb 2022 08:01:02 +0000 (16:01 +0800)]
drm/amdgpu: Remove redundant calls of amdgpu_ras_block_late_fini in mmhub ras block

Remove redundant calls of amdgpu_ras_block_late_fini in mmhub ras block.

Signed-off-by: yipechai <YiPeng.Chai@amd.com>
Reviewed-by: Tao Zhou <tao.zhou1@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
3 years agodrm/amdgpu: Remove redundant calls of amdgpu_ras_block_late_fini in gfx ras block
yipechai [Mon, 14 Feb 2022 07:59:35 +0000 (15:59 +0800)]
drm/amdgpu: Remove redundant calls of amdgpu_ras_block_late_fini in gfx ras block

Remove redundant calls of amdgpu_ras_block_late_fini in gfx ras block.

Signed-off-by: yipechai <YiPeng.Chai@amd.com>
Reviewed-by: Tao Zhou <tao.zhou1@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
3 years agodrm/amdgpu: centrally calls the .ras_fini function of all ras blocks
yipechai [Mon, 14 Feb 2022 07:46:32 +0000 (15:46 +0800)]
drm/amdgpu: centrally calls the .ras_fini function of all ras blocks

centrally calls the .ras_fini function of all ras blocks.

Signed-off-by: yipechai <YiPeng.Chai@amd.com>
Reviewed-by: Tao Zhou <tao.zhou1@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
3 years agodrm/amdgpu: Optimize xxx_ras_fini function of each ras block
yipechai [Thu, 17 Feb 2022 06:55:19 +0000 (14:55 +0800)]
drm/amdgpu: Optimize xxx_ras_fini function of each ras block

1. Move the variables of ras block instance members from
   specific xxx_ras_fini to general ras_fini call.
2. Function calls inside the modules only use parameters
   passed from xxx_ras_fini instead of ras block instance
   members.

Signed-off-by: yipechai <YiPeng.Chai@amd.com>
Reviewed-by: Tao Zhou <tao.zhou1@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
3 years agodrm/amdgpu: Modify .ras_fini function pointer parameter
yipechai [Thu, 17 Feb 2022 06:52:20 +0000 (14:52 +0800)]
drm/amdgpu: Modify .ras_fini function pointer parameter

Modify .ras_fini function pointer parameter so that
we can remove redundant intermediate calls in some
ras blocks.

Signed-off-by: yipechai <YiPeng.Chai@amd.com>
Reviewed-by: Tao Zhou <tao.zhou1@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
3 years agodrm/amd/display: Adding a dc_debug option and dmub setting to use PHY FSM for PSR
Shah Dharati [Wed, 16 Feb 2022 19:17:41 +0000 (14:17 -0500)]
drm/amd/display: Adding a dc_debug option and dmub setting to use PHY FSM for PSR

[Why]
PSR Power on/off is done in PSR. Add a dc_debug option
and dmub setting to use PHY implementation of this instead.

[How]
Add a dc_debug option and dmub setting to use
PHY FSM Power up/down for PSR.

Co-authored-by: Shah Dharati <dharati.shah@amd.com>
Reviewed-by: Hansen Dsouza <hansen.dsouza@amd.com>
Acked-by: Alan Liu <HaoPing.Liu@amd.com>
Signed-off-by: Shah Dharati <dharati.shah@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
3 years agodrm/amd/display: Add frame alternate 3D & restrict HW packed on dongles
Dillon Varone [Mon, 14 Feb 2022 15:47:46 +0000 (10:47 -0500)]
drm/amd/display: Add frame alternate 3D & restrict HW packed on dongles

[WHY?]
Some projectors support frame alternate 3D modes at 120Hz, but DAL3 does
not create timings. Most active DP to HDMI dongles do not translate
infoframes properly to use HW packing stereo mode.

[HOW?]
Create frame alternate 3D timings for displays that support it. Disable HW
packing 3D mode on DP active dongles.

Reviewed-by: Martin Leung <Martin.Leung@amd.com>
Acked-by: Alan Liu <HaoPing.Liu@amd.com>
Signed-off-by: Dillon Varone <dillon.varone@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
3 years agodrm/amdgpu: Fix realloc of ptr
Tom Rix [Sun, 27 Feb 2022 15:33:42 +0000 (07:33 -0800)]
drm/amdgpu: Fix realloc of ptr

Clang static analysis reports this error
amdgpu_debugfs.c:1690:9: warning: 1st function call
  argument is an uninitialized value
  tmp = krealloc_array(tmp, i + 1,
        ^~~~~~~~~~~~~~~~~~~~~~~~~~~

realloc uses tmp, so tmp can not be garbage.
And the return needs to be checked.

Fixes: 5ce5a584cb82 ("drm/amdgpu: add debugfs for reset registers list")
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Tom Rix <trix@redhat.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
3 years agodrm/amd/display: Reset VIC if HDMI_VIC is present
Chris Park [Tue, 15 Feb 2022 22:14:16 +0000 (17:14 -0500)]
drm/amd/display: Reset VIC if HDMI_VIC is present

[Why]
HDMI Compliance requires VIC to be set to 0
on 2D mode if HDMI_VIC is present.

[How]
When VIC and HDMI_VIC is both present,
reset VIC to 0.

Reviewed-by: Martin Leung <Martin.Leung@amd.com>
Acked-by: Alan Liu <HaoPing.Liu@amd.com>
Signed-off-by: Chris Park <Chris.Park@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
3 years agodrm/amd/display: Make functional resource functions non-static
Nicholas Kazlauskas [Thu, 3 Feb 2022 17:08:36 +0000 (12:08 -0500)]
drm/amd/display: Make functional resource functions non-static

[Why & How]
To align coding style for how we use this across DCN. The resource
creation ones can remain static, however.

Reviewed-by: Eric Yang <Eric.Yang2@amd.com>
Acked-by: Alan Liu <HaoPing.Liu@amd.com>
Signed-off-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
3 years agodrm/amd/display: Remove invalid RDPCS Programming in DAL
Hansen Dsouza [Sat, 5 Feb 2022 01:24:33 +0000 (20:24 -0500)]
drm/amd/display: Remove invalid RDPCS Programming in DAL

RDPCS programming is done in DMUB remove legacy invalid code

Reviewed-by: Alvin Lee <Alvin.Lee2@amd.com>
Acked-by: Alan Liu <HaoPing.Liu@amd.com>
Signed-off-by: Hansen Dsouza <Hansen.Dsouza@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
3 years agodrm/amdkfd: Add SMI add event helper
Philip Yang [Fri, 25 Feb 2022 17:33:51 +0000 (12:33 -0500)]
drm/amdkfd: Add SMI add event helper

To remove duplicate code, unify event message format and simplify new
event add in the following patches.

Use KFD_SMI_EVENT_MSG_SIZE to define msg size, the same size will be
used in user space to alloc the msg receive buffer.

Signed-off-by: Philip Yang <Philip.Yang@amd.com>
Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
3 years agodrm/amdkfd: Correct SMI event read size
Philip Yang [Thu, 16 Dec 2021 15:59:29 +0000 (10:59 -0500)]
drm/amdkfd: Correct SMI event read size

sizeof(buf) is 8 bytes because it is defined as unsigned char *buf,
each SMI event read only copy max 8 bytes to user buffer. Correct this
by using the buf allocate size.

Signed-off-by: Philip Yang <Philip.Yang@amd.com>
Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
3 years agoRevert "drm/amdkfd: process_info lock not needed for svm"
Philip Yang [Fri, 25 Feb 2022 19:58:03 +0000 (14:58 -0500)]
Revert "drm/amdkfd: process_info lock not needed for svm"

This reverts commit 3abfe30d803e62cc75dec254eefab3b04d69219b.

To fix deadlock in kFDSVMEvictTest when xnack off.

Signed-off-by: Philip Yang <Philip.Yang@amd.com>
Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
3 years agogpu/amd: vega10_hwmgr: fix inappropriate private variable name
Meng Tang [Fri, 25 Feb 2022 09:47:22 +0000 (17:47 +0800)]
gpu/amd: vega10_hwmgr: fix inappropriate private variable name

In file vega10_hwmgr.c, the names of struct vega10_power_state *
and struct pp_power_state * are confusingly used, which may lead
to some confusion.

Status quo is that variables of type struct vega10_power_state *
are named "vega10_ps", "ps", "vega10_power_state". A more
appropriate usage is that struct are named "ps" is used for
variabled of type struct pp_power_state *.

So rename struct vega10_power_state * which are named "ps" and
"vega10_power_state" to "vega10_ps", I also renamed "psa" to
"vega10_psa" and "psb" to "vega10_psb" to make it more clearly.

The rows longer than 100 columns are involved.

Reviewed-by: Evan Quan <evan.quan@amd.com>
Signed-off-by: Meng Tang <tangmeng@uniontech.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
3 years agodrm/amd/display: Don't fill up the logs
Luben Tuikov [Thu, 24 Feb 2022 21:29:52 +0000 (16:29 -0500)]
drm/amd/display: Don't fill up the logs

Don't fill up the logs with:

[253557.859575] [drm:amdgpu_dm_atomic_check [amdgpu]] DSC precompute is not needed.
[253557.892966] [drm:amdgpu_dm_atomic_check [amdgpu]] DSC precompute is not needed.
[253557.926070] [drm:amdgpu_dm_atomic_check [amdgpu]] DSC precompute is not needed.
[253557.959344] [drm:amdgpu_dm_atomic_check [amdgpu]] DSC precompute is not needed.

which prints many times a second, when the kernel is run with
drm.debug=2.

Instead of DRM_DEBUG_DRIVER(), make it DRM_INFO_ONCE().

Cc: Alex Deucher <Alexander.Deucher@amd.com>
Cc: Roman Li <Roman.Li@amd.com>
Cc: Felix Kuehling <felix.kuehling@amd.com>
Cc: Hersen Wu <hersenwu@amd.com>
Cc: Daniel Wheeler <daniel.wheeler@amd.com>
Fixes: 17ce8a6907f7 ("drm/amd/display: Add dsc pre-validation in atomic check")
Signed-off-by: Luben Tuikov <luben.tuikov@amd.com>
Reviewed-by: Roman Li <Roman.Li@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
3 years agodrm/aspeed: Add AST2600 chip support
Tommy Haung [Wed, 2 Mar 2022 02:49:29 +0000 (10:49 +0800)]
drm/aspeed: Add AST2600 chip support

Add AST2600 chip support and setting.

Signed-off-by: Tommy Haung <tommy_huang@aspeedtech.com>
Reviewed-by: Joel Stanley <joel@jms.id.au>
Signed-off-by: Joel Stanley <joel@jms.id.au>
Link: https://patchwork.freedesktop.org/patch/msgid/20220302024930.18758-5-tommy_huang@aspeedtech.com
3 years agodrm/aspeed: Update INTR_STS handling
Tommy Haung [Wed, 2 Mar 2022 02:49:28 +0000 (10:49 +0800)]
drm/aspeed: Update INTR_STS handling

Add interrupt clear register define for further chip support.

Signed-off-by: Tommy Haung <tommy_huang@aspeedtech.com>
Reviewed-by: Joel Stanley <joel@jms.id.au>
Signed-off-by: Joel Stanley <joel@jms.id.au>
Link: https://patchwork.freedesktop.org/patch/msgid/20220302024930.18758-4-tommy_huang@aspeedtech.com
3 years agodrm: Add TODO item for optimizing format helpers
Thomas Zimmermann [Wed, 23 Feb 2022 19:38:04 +0000 (20:38 +0100)]
drm: Add TODO item for optimizing format helpers

Add a TODO item for optimizing blitting and format-conversion helpers
in DRM and fbdev. There's always demand for faster graphics output.

v4:
* fix typos (Sam)

Signed-off-by: Thomas Zimmermann <tzimmermann@suse.de>
Reviewed-by: Javier Martinez Canillas <javierm@redhat.com>
Acked-by: Sam Ravnborg <sam@ravnborg.org>
Link: https://patchwork.freedesktop.org/patch/msgid/20220223193804.18636-6-tzimmermann@suse.de
3 years agofbdev: Improve performance of cfb_imageblit()
Thomas Zimmermann [Wed, 23 Feb 2022 19:38:03 +0000 (20:38 +0100)]
fbdev: Improve performance of cfb_imageblit()

Improve the performance of cfb_imageblit() by manually unrolling
the inner blitting loop and moving some invariants out. The compiler
failed to do this automatically. This change keeps cfb_imageblit()
in sync with sys_imagebit().

A microbenchmark measures the average number of CPU cycles
for cfb_imageblit() after a stabilizing period of a few minutes
(i7-4790, FullHD, simpledrm, kernel with debugging).

cfb_imageblit(), new: 15724 cycles
cfb_imageblit(): old: 30566 cycles

In the optimized case, cfb_imageblit() is now ~2x faster than before.

v3:
* fix commit description (Pekka)

Signed-off-by: Thomas Zimmermann <tzimmermann@suse.de>
Reviewed-by: Javier Martinez Canillas <javierm@redhat.com>
Acked-by: Sam Ravnborg <sam@ravnborg.org>
Link: https://patchwork.freedesktop.org/patch/msgid/20220223193804.18636-5-tzimmermann@suse.de