linux.git
4 years agoMerge tag 'imx-dt64-5.13' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo...
Arnd Bergmann [Thu, 1 Apr 2021 19:41:48 +0000 (21:41 +0200)]
Merge tag 'imx-dt64-5.13' of git://git./linux/kernel/git/shawnguo/linux into arm/dt

i.MX arm64 device tree update for 5.13:

- A series from Dong Aisheng to update i.MX8Q device trees for adopting
  SS (SubSystems) based bindings.
- New board support:  Kontron pitx-imx8m, Engicam i.Core MX8M Mini.
- A series from Adrien Grassein to add various peripheral support for
  imx8mm-nitrogen-r2 board.
- A series from Guido Günther to update librem5-devkit device tree.
- A number of patches from Michael Walle to add Root Complex Event
  Collector interrupt, update MTD partitions and add rtc0 alias for
  ls1028a-kontron-sl28 board.
- Add EQOS MAC support for phyBOARD-Pollux-i.MX8MP.
- Add 2x2 SFP+ cage support for clearfog-itx boards.
- Small and random update for various boards.

* tag 'imx-dt64-5.13' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux: (55 commits)
  arm64: dts: fsl-ls1028a-kontron-sl28: add rtc0 alias
  arm64: dts: ls1028a: move rtc alias to individual boards
  arm64: dts: fsl-ls1028a-kontron-sl28: combine unused partitions
  arm64: dts: fsl-ls1028a-kontron-sl28: move MTD partitions
  arm64: dts: imx8mp-evk: Improve the Ethernet PHY description
  arm64: dts: imx8mq-librem5-r3: Mark buck3 as always on
  arm64: dts: imx8mq-librem5: Hog the correct gpio
  arm64: dts: lx2160a-clearfog-itx: add SFP support
  arm64: dts: imx8mp-phyboard-pollux-rdk: Change debug UART
  arm64: dts: imx8mn: Reorder flexspi clock-names entry
  arm64: dts: imx8mm: Reorder flexspi clock-names entry
  arm64: dts: ls1028a: set up the real link speed for ENETC port 2
  arm64: dts: imx8mm-nitrogen-r2: add ecspi2 support
  arm64: dts: imx: add imx8qm mek support
  arm64: dts: imx: add imx8qm common dts file
  arm64: dts: imx8qm: add dma ss support
  arm64: dts: imx8: split adma ss into dma and audio ss
  arm64: dts: imx8qm: add conn ss support
  arm64: dts: imx8qm: add lsio ss support
  arm64: dts: imx8: switch to new lpcg clock binding
  ...

Link: https://lore.kernel.org/r/20210331041019.31345-5-shawnguo@kernel.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
4 years agoMerge tag 'imx-dt-5.13' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo...
Arnd Bergmann [Thu, 1 Apr 2021 19:37:35 +0000 (21:37 +0200)]
Merge tag 'imx-dt-5.13' of git://git./linux/kernel/git/shawnguo/linux into arm/dt

i.MX device tree change for 5.13:

- New board support: i.MX7D based reMarkable2.
- Clean up imx6ql-pfla02 hog group by moving pins into corresponded
  client groups.
- Add Netronix embedded controller for imx50-kobo-aura.
- A series from Sebastian Reichel to improve GE Bx50v3 device trees.
- Support I2C bus recovery for imx6qdl-wandboard by adding SCL/SDA
  GPIOs.
- Remove unnecessary #address-cells/#size-cells from imx6qdl-gw boards.
- Various small and random device tree update.

* tag 'imx-dt-5.13' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux: (21 commits)
  ARM: dts: imx6: pbab01: Set USB OTG port to peripheral
  ARM: dts: imx6: pfla02: Fix USB vbus enable pinmuxing
  ARM: imx7d-remarkable2: Initial device tree for reMarkable2
  ARM: dts: imx7d-mba7: Remove unsupported PCI properties
  ARM: dts: imx6qdl-gw*: Remove unnecessary #address-cells/#size-cells
  ARM: dts: imx6dl-plybas: Fix gpio-keys W=1 warnings
  ARM: dts: imx: bx50v3: Define GPIO line names
  ARM: dts: imx: bx50v3: i2c GPIOs are open drain
  ARM: dts: imx6q-ba16: improve PHY information
  ARM: dts: imx6q-ba16: add USB OTG VBUS enable GPIO
  ARM: dts: ls1021a: mark crypto engine dma coherent
  ARM: dts: colibri-imx6ull: Change drive strength for usdhc2
  ARM: dts: imx6ql-pfla02: Move "hog" pins into corresponded pin groups
  ARM: dts: imx6qdl-phytec-pbab01: Select synchronous mode for AUDMUX
  ARM: dts: imx6qdl-ts7970: Drop redundant "fsl,mode" option
  ARM: dts: imx53-qsb: Describe the esdhc1 card detect pin
  ARM: dts: ls1021a: Harmonize DWC USB3 DT nodes name
  ARM: dts: imx6qdl-wandboard: add scl/sda gpios definitions for i2c bus recovery
  ARM: dts: imx: Mark IIM as syscon on i.MX51/i.MX53
  ARM: dts: imx6sl-tolino-shine2hd: Add Netronix embedded controller
  ...

Link: https://lore.kernel.org/r/20210331041019.31345-4-shawnguo@kernel.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
4 years agoMerge tag 'imx-bindgins-5.13' of git://git.kernel.org/pub/scm/linux/kernel/git/shawng...
Arnd Bergmann [Thu, 1 Apr 2021 19:36:44 +0000 (21:36 +0200)]
Merge tag 'imx-bindgins-5.13' of git://git./linux/kernel/git/shawnguo/linux into arm/dt

i.MX bindings update for 5.13:

- Add vendor prefix for reMarkable.
- Add compatible for reMarkable 2 e-Ink tablet, Kontron pITX-imx8m
  board, Engicam i.Core MX8M Mini devices.
- Add compatbile 'fsl,imx8qm-mu' for i.MX mailbox bindings.
- One correction on example clock-names in imx8qxp-lpcg bindings.

* tag 'imx-bindgins-5.13' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux:
  dt-bindings: arm: fsl: Add the reMarkable 2 e-Ink tablet
  dt-bindings: Add vendor prefix for reMarkable
  dt-bindings: mailbox: mu: add imx8qm support
  dt-bindings: arm: fsl: add imx8qm boards compatible string
  dt-bindings: arm: fsl: add Kontron pITX-imx8m board
  dt-bindings: arm: fsl: Add Engicam i.Core MX8M Mini EDIMM2.2 Starter Kit
  dt-bindings: arm: fsl: Add Engicam i.Core MX8M Mini C.TOUCH 2.0
  dt-bindings: clock: imx8qxp-lpcg: correct the example clock-names

Link: https://lore.kernel.org/r/20210331041019.31345-3-shawnguo@kernel.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
4 years agoMerge tag 'arm-soc/for-5.13/devicetre-arm64' of https://github.com/Broadcom/stblinux...
Arnd Bergmann [Thu, 1 Apr 2021 19:35:38 +0000 (21:35 +0200)]
Merge tag 'arm-soc/for-5.13/devicetre-arm64' of https://github.com/Broadcom/stblinux into arm/dt

This pull request contains Broadcom ARM64-based SoCs Device Tree changes
for 5.13, please pull the following:

- Rafal continues to add support for the 4908 SoCs and describes the USB
  PHY, firmware flash partitions and Ethernet switch and Ethernet
  controller. He also adds support for the TP-Link Archer C2300 V1
  router and upates the Netgear R8000P and Asus GT-AC5300 routers network
  ports description.

* tag 'arm-soc/for-5.13/devicetre-arm64' of https://github.com/Broadcom/stblinux:
  arm64: dts: broadcom: bcm4908: add Ethernet MAC addr
  arm64: dts: broadcom: bcm4908: add Ethernet TX irq
  arm64: dts: broadcom: bcm4908: set Asus GT-AC5300 port 7 PHY mode
  arm64: dts: broadcom: bcm4908: add TP-Link Archer C2300 V1
  dt-bindings: arm: bcm: document TP-Link Archer C2300 binding
  arm64: dts: broadcom: bcm4908: fix switch parent node name
  arm64: dts: broadcom: bcm4908: describe firmware partitions
  arm64: dts: broadcom: bcm4908: add remaining Netgear R8000P LEDs
  arm64: dts: broadcom: bcm4908: describe Netgear R8000P switch
  arm64: dts: broadcom: bcm4908: describe Ethernet controller
  arm64: dts: broadcom: bcm4908: describe USB PHY

Link: https://lore.kernel.org/r/20210330184006.1451315-2-f.fainelli@gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
4 years agoMerge tag 'arm-soc/for-5.13/devicetree' of https://github.com/Broadcom/stblinux into...
Arnd Bergmann [Thu, 1 Apr 2021 19:34:48 +0000 (21:34 +0200)]
Merge tag 'arm-soc/for-5.13/devicetree' of https://github.com/Broadcom/stblinux into arm/dt

This pull request contains Broadcom ARM-based SoCs Device Tree changes
for 5.13, please pull the following:

- Rafal fixes YAML warnings for the memory nodes of BCM5301X nodes and
  adds support for the NVMEM NVRAM node on Linksys and Luxul WLAN
  routers. He also fixes up the partitions for the Linksys EA9400 to
  use the newly introduced parser compatible and sets the power LED to
  its default state.

* tag 'arm-soc/for-5.13/devicetree' of https://github.com/Broadcom/stblinux:
  ARM: dts: BCM5301X: Set Linksys EA9500 power LED
  ARM: dts: BCM5301X: Fix Linksys EA9500 partitions
  ARM: dts: BCM5301X: Describe NVMEM NVRAM on Linksys & Luxul routers
  ARM: dts: BCM5301X: fix "reg" formatting in /memory node

Link: https://lore.kernel.org/r/20210330184006.1451315-1-f.fainelli@gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
4 years agoMerge tag 'socfpga_dts_update_for_v5.13' of git://git.kernel.org/pub/scm/linux/kernel...
Arnd Bergmann [Thu, 1 Apr 2021 19:33:43 +0000 (21:33 +0200)]
Merge tag 'socfpga_dts_update_for_v5.13' of git://git./linux/kernel/git/dinguyen/linux into arm/dt

SoCFPGA DTS updates for v5.13
- Patches from Krzysztof Kozlowski that fixes dtc warnings
  and dtbs_check warnings
- Adjust the "cnds,read-delay" value for the Agilex devkit to 2

* tag 'socfpga_dts_update_for_v5.13' of git://git.kernel.org/pub/scm/linux/kernel/git/dinguyen/linux:
  arm64: dts: intel: adjust qpsi read-delay property
  arm64: dts: intel: socfpga_agilex_socdk_nand: align LED node names with dtschema
  arm64: dts: intel: socfpga_agilex: align node names with dtschema
  arm64: dts: intel: socfpga_agilex: use defined for GIC interrupts
  arm64: dts: intel: socfpga_agilex: move usbphy out of soc node
  arm64: dts: intel: socfpga_agilex: remove default status=okay
  arm64: dts: intel: socfpga_agilex: move timer out of soc node
  arm64: dts: intel: socfpga_agilex: move clocks out of soc node
  arm64: dts: intel: socfpga: override clocks by label

Link: https://lore.kernel.org/r/20210330110430.558182-2-dinguyen@kernel.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
4 years agoMerge tag 'omap-for-v5.13/dts-genpd-signed' of git://git.kernel.org/pub/scm/linux...
Arnd Bergmann [Thu, 1 Apr 2021 19:26:02 +0000 (21:26 +0200)]
Merge tag 'omap-for-v5.13/dts-genpd-signed' of git://git./linux/kernel/git/tmlind/linux-omap into arm/dt

Devicetree changes for omaps for genpd support for v5.13

In order to move omap4/5 and dra7 to probe with devicetree data and genpd,
we need to add the missing interconnect target module configuration for
the drivers that do not still have it. This is similar to what we have
already done earlier for am3 and 4 earlier.

These patches are very much similar for all the three SoCs here. The dra7
changes were already available for v5.12 merge window, but were considered
too late to add for v5.12. The patches for omap4 and 5 follow the same
pattern, except for PCIe that is available only on dra7.

We do the changes one driver at a time, and still keep the legacy property
for "ti,hwmods" mostly around, except for cases when already not needed.
We will be dropping the custom property and related legacy data in a
follow-up series.

* tag 'omap-for-v5.13/dts-genpd-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap: (53 commits)
  ARM: dts: Configure simple-pm-bus for omap5 l3
  ARM: dts: Configure simple-pm-bus for omap5 l4_cfg
  ARM: dts: Configure simple-pm-bus for omap5 l4_per
  ARM: dts: Configure simple-pm-bus for omap5 l4_wkup
  ARM: dts: Move omap5 l3-noc to a separate node
  ARM: dts: Move omap5 mmio-sram out of l3 interconnect
  ARM: dts: Configure interconnect target module for omap5 sata
  ARM: dts: Configure interconnect target module for omap5 gpmc
  ARM: dts: Configure interconnect target module for omap5 mpu
  ARM: dts: Configure interconnect target module for omap5 emif
  ARM: dts: Configure interconnect target module for omap5 dmm
  ARM: dts: Prepare for simple-pm-bus for omap4 l3
  ARM: dts: Configure simple-pm-bus for omap4 l4_cfg
  ARM: dts: Configure simple-pm-bus for omap4 l4_per
  ARM: dts: Configure simple-pm-bus for omap4 l4_wkup
  ARM: dts: Move omap4 l3-noc to a separate node
  ARM: dts: Move omap4 mmio-sram out of l3 interconnect
  ARM: dts: Configure interconnect target module for omap4 mpu
  ARM: dts: Configure interconnect target module for omap4 debugss
  ARM: dts: Configure interconnect target module for omap4 emif
  ...

Link: https://lore.kernel.org/r/pull-1617004205-537424@atomide.com-2
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
4 years agoARM: mstar: Add mpll to base dtsi
Daniel Palmer [Mon, 1 Mar 2021 12:35:42 +0000 (21:35 +0900)]
ARM: mstar: Add mpll to base dtsi

All of the currently known MStar/SigmaStar ARMv7 SoCs have at least
one MPLL and it seems to always be at the same place so add it to
the base dtsi.

Signed-off-by: Daniel Palmer <daniel@0x0f.com>
Link: https://lore.kernel.org/r/20210301123542.2800643-4-daniel@0x0f.com'
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
4 years agoARM: mstar: Add the external clocks to the base dsti
Daniel Palmer [Mon, 1 Mar 2021 12:35:41 +0000 (21:35 +0900)]
ARM: mstar: Add the external clocks to the base dsti

All of the currently known MStar/SigmaStar ARMv7 SoCs have an "xtal"
clock input that is usually 24MHz and an "RTC xtal" that is usually 32KHz.

The xtal input has to be connected to something so it's enabled by default.

The MSC313 and MSC313E do not bring the RTC clock input out to the pins
so it's impossible to connect it. The SSC8336 does bring the input
out to the pins but it's not always actually connected to something.

The RTC node needs to always be present because in the future the nodes
for the clock muxes will refer to it even if it's not usable.

The RTC node is disabled by default and should be enabled at the board
level if the RTC input is wired up.

Signed-off-by: Daniel Palmer <daniel@0x0f.com>
Link: https://lore.kernel.org/r/20210301123542.2800643-3-daniel@0x0f.com'
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
4 years agoARM: mstar: Select MSTAR_MSC313_MPLL
Daniel Palmer [Mon, 1 Mar 2021 12:35:40 +0000 (21:35 +0900)]
ARM: mstar: Select MSTAR_MSC313_MPLL

All of the ARCH_MSTARV7 chips have an MPLL as the source for
peripheral clocks so select MSTAR_MSC313_MPLL.

Signed-off-by: Daniel Palmer <daniel@0x0f.com>
Link: https://lore.kernel.org/r/20210301123542.2800643-2-daniel@0x0f.com'
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
4 years agoarm64: dts: intel: adjust qpsi read-delay property
Dinh Nguyen [Tue, 23 Mar 2021 15:55:15 +0000 (10:55 -0500)]
arm64: dts: intel: adjust qpsi read-delay property

The "cnds,read-delay" value needs to be 2 for the Agilex devkit.

Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
4 years agoarm64: dts: intel: socfpga_agilex_socdk_nand: align LED node names with dtschema
Krzysztof Kozlowski [Mon, 8 Mar 2021 17:09:45 +0000 (18:09 +0100)]
arm64: dts: intel: socfpga_agilex_socdk_nand: align LED node names with dtschema

Align the LED node names with dtschema to silence dtbs_check warnings
like:

    leds: 'hps0', 'hps1', 'hps2' do not match any of the regexes: '(^led-[0-9a-f]$|led)', 'pinctrl-[0-9]+'

Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
4 years agoarm64: dts: intel: socfpga_agilex: align node names with dtschema
Krzysztof Kozlowski [Mon, 8 Mar 2021 17:09:43 +0000 (18:09 +0100)]
arm64: dts: intel: socfpga_agilex: align node names with dtschema

Align the NAND, GIC and UART node names with dtschema to silence
dtbs_check warnings like:

    arch/arm64/boot/dts/intel/socfpga_agilex_socdk.dt.yaml:
        intc@fffc1000: $nodename:0: 'intc@fffc1000' does not match '^interrupt-controller(@[0-9a-f,]+)*$'
    arch/arm64/boot/dts/intel/socfpga_agilex_socdk.dt.yaml:
        serial0@ffc02000: $nodename:0: 'serial0@ffc02000' does not match '^serial(@[0-9a-f,]+)*$'

Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
4 years agoarm64: dts: intel: socfpga_agilex: use defined for GIC interrupts
Krzysztof Kozlowski [Mon, 8 Mar 2021 17:09:42 +0000 (18:09 +0100)]
arm64: dts: intel: socfpga_agilex: use defined for GIC interrupts

Use human-readable defines for GIC interrupt type and flag, instead of
hard-coding the numbers.  It makes review easier.  No functional change.

Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
4 years agoarm64: dts: intel: socfpga_agilex: move usbphy out of soc node
Krzysztof Kozlowski [Mon, 8 Mar 2021 17:09:41 +0000 (18:09 +0100)]
arm64: dts: intel: socfpga_agilex: move usbphy out of soc node

The usual usb-nop-xceiv USB phy node should be under root node, to fix
dtc warning:

    arch/arm64/boot/dts/intel/socfpga_agilex.dtsi:472.21-476.5:
        Warning (simple_bus_reg): /soc/usbphy@0: missing or empty reg/ranges property

Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
4 years agoarm64: dts: intel: socfpga_agilex: remove default status=okay
Krzysztof Kozlowski [Mon, 8 Mar 2021 17:09:40 +0000 (18:09 +0100)]
arm64: dts: intel: socfpga_agilex: remove default status=okay

New nodes are okay by default.

Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
4 years agoarm64: dts: intel: socfpga_agilex: move timer out of soc node
Krzysztof Kozlowski [Mon, 8 Mar 2021 17:09:39 +0000 (18:09 +0100)]
arm64: dts: intel: socfpga_agilex: move timer out of soc node

The ARM architected timer is part of ARM CPU design therefore by
convention it should not be inside the soc node.  This also fixes dtc
warning like:

    arch/arm64/boot/dts/intel/socfpga_agilex.dtsi:410.9-416.5:
        Warning (simple_bus_reg): /soc/timer: missing or empty reg/ranges property

Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
4 years agoarm64: dts: intel: socfpga_agilex: move clocks out of soc node
Krzysztof Kozlowski [Mon, 8 Mar 2021 17:09:38 +0000 (18:09 +0100)]
arm64: dts: intel: socfpga_agilex: move clocks out of soc node

The clocks are usually not part of the SoC but provided on the board
(external oscillators).  Moving them out of soc node fixes dtc warning:

    arch/arm64/boot/dts/intel/socfpga_agilex.dtsi:111.10-137.5:
        Warning (simple_bus_reg): /soc/clocks: missing or empty reg/ranges property

Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
4 years agoarm64: dts: intel: socfpga: override clocks by label
Krzysztof Kozlowski [Mon, 8 Mar 2021 17:09:37 +0000 (18:09 +0100)]
arm64: dts: intel: socfpga: override clocks by label

Using full paths to extend or override a device tree node is error
prone.  If there was a typo error, a new node will be created instead of
extending the existing node.  This will lead to run-time errors that
could be hard to detect.

A mistyped label on the other hand, will cause a dtc compile error
(during build time).

Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
4 years agoARM: dts: imx6: pbab01: Set USB OTG port to peripheral
Stefan Riedmueller [Mon, 29 Mar 2021 13:01:02 +0000 (15:01 +0200)]
ARM: dts: imx6: pbab01: Set USB OTG port to peripheral

Due to a hardware bug preventing the correct detection if the ID pin
the USB OTG port cannot be used in otg mode. It can either be set to
host or peripheral. Set it to peripheral so vbus is disabled by default.

Signed-off-by: Stefan Riedmueller <s.riedmueller@phytec.de>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
4 years agoARM: dts: imx6: pfla02: Fix USB vbus enable pinmuxing
Stefan Riedmueller [Mon, 29 Mar 2021 13:01:01 +0000 (15:01 +0200)]
ARM: dts: imx6: pfla02: Fix USB vbus enable pinmuxing

The pinmuxing for the enable pin of the usbh1 node is wrong. It needs to
be muxed as GPIO. While at it, move the pinctrl to the vbus regulator
since it is actually the regulator enable pin.

Signed-off-by: Stefan Riedmueller <s.riedmueller@phytec.de>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
4 years agoarm64: dts: broadcom: bcm4908: add Ethernet MAC addr
Rafał Miłecki [Mon, 29 Mar 2021 15:45:14 +0000 (17:45 +0200)]
arm64: dts: broadcom: bcm4908: add Ethernet MAC addr

On most BCM4908 devices MAC address can be read from the bootloader
binary section containing device settings. Use NVMEM to describe that.

Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
4 years agoARM: dts: BCM5301X: Set Linksys EA9500 power LED
Rafał Miłecki [Mon, 29 Mar 2021 08:04:09 +0000 (10:04 +0200)]
ARM: dts: BCM5301X: Set Linksys EA9500 power LED

Set Linux default trigger to default on, just like it's normally done
for power LEDs.

Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
4 years agoARM: dts: BCM5301X: Fix Linksys EA9500 partitions
Rafał Miłecki [Mon, 29 Mar 2021 05:54:30 +0000 (07:54 +0200)]
ARM: dts: BCM5301X: Fix Linksys EA9500 partitions

Partitions are basically fixed indeed but firmware ones don't have
hardcoded function ("firmware" vs "failsafe"). Actual function depends
on bootloader configuration. Use a proper binding for that.

While at it fix numbers formatting to avoid:
arch/arm/boot/dts/bcm47094-linksys-panamera.dt.yaml: partitions: 'partition@1F00000' does not match any of the regexes: '^partition@[0-9a-f]+$', 'pinctrl-[0-9]+'
        From schema: Documentation/devicetree/bindings/mtd/partitions/linksys,ns-partitions.yaml

Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
4 years agoarm64: dts: fsl-ls1028a-kontron-sl28: add rtc0 alias
Michael Walle [Tue, 23 Mar 2021 15:07:57 +0000 (16:07 +0100)]
arm64: dts: fsl-ls1028a-kontron-sl28: add rtc0 alias

For completeness, add the rtc0 alias.

Signed-off-by: Michael Walle <michael@walle.cc>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
4 years agoarm64: dts: ls1028a: move rtc alias to individual boards
Michael Walle [Tue, 23 Mar 2021 15:07:56 +0000 (16:07 +0100)]
arm64: dts: ls1028a: move rtc alias to individual boards

The aliases are board-specific and shouldn't be included in the common
SoC dtsi. Move them over to the boards.

Signed-off-by: Michael Walle <michael@walle.cc>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
4 years agoarm64: dts: fsl-ls1028a-kontron-sl28: combine unused partitions
Michael Walle [Thu, 18 Mar 2021 17:18:56 +0000 (18:18 +0100)]
arm64: dts: fsl-ls1028a-kontron-sl28: combine unused partitions

The failsafe partitions for the DP firmware and for AT-F are unused. If
AT-F will ever be supported in the failsafe mode, then it will be a FIT
image. Thus fold the unused partitions into the failsafe bootloader one
to have enough storage if the bootloader image will grow.

While at it, remove the reserved partition. It served no purpose other
than having no hole in the map.

Signed-off-by: Michael Walle <michael@walle.cc>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
4 years agoarm64: dts: fsl-ls1028a-kontron-sl28: move MTD partitions
Michael Walle [Thu, 18 Mar 2021 17:18:55 +0000 (18:18 +0100)]
arm64: dts: fsl-ls1028a-kontron-sl28: move MTD partitions

Move the MTD partitions to the partitions subnode. This is the new way
to specify the partitions, see
  Documentation/devicetree/bindings/mtd/jedec,spi-nor.yaml

Signed-off-by: Michael Walle <michael@walle.cc>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
4 years agoarm64: dts: imx8mp-evk: Improve the Ethernet PHY description
Fabio Estevam [Thu, 18 Mar 2021 11:13:30 +0000 (08:13 -0300)]
arm64: dts: imx8mp-evk: Improve the Ethernet PHY description

According to the datasheet RTL8211, it must be asserted low for at least
10ms and at least 72ms "for internal circuits settling time" before
accessing the PHY registers.

Add properties to describe such requirements.

Reported-by: Joakim Zhang <qiangqing.zhang@nxp.com>
Signed-off-by: Fabio Estevam <festevam@gmail.com>
Tested-by: Joakim Zhang <qiangqing.zhang@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
4 years agoarm64: dts: imx8mq-librem5-r3: Mark buck3 as always on
Sebastian Krzyszkowiak [Mon, 15 Mar 2021 08:35:30 +0000 (09:35 +0100)]
arm64: dts: imx8mq-librem5-r3: Mark buck3 as always on

Commit 99e71c029213 ("arm64: dts: imx8mq-librem5: Don't mark buck3 as always on")
removed always-on marking from GPU regulator, which is great for power
saving - however it introduces additional i2c0 traffic which can be deadly
for devices from the Dogwood batch.

To workaround the i2c0 shutdown issue on Dogwood, this commit marks
buck3 as always-on again - but only for Dogwood (r3).

Signed-off-by: Sebastian Krzyszkowiak <sebastian.krzyszkowiak@puri.sm>
Signed-off-by: Martin Kepplinger <martin.kepplinger@puri.sm>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
4 years agoarm64: dts: imx8mq-librem5: Hog the correct gpio
Guido Günther [Mon, 15 Mar 2021 08:35:29 +0000 (09:35 +0100)]
arm64: dts: imx8mq-librem5: Hog the correct gpio

There was an additional alias in the specifier it hogged line 27
instead of line 1.

Signed-off-by: Guido Günther <agx@sigxcpu.org>
Signed-off-by: Martin Kepplinger <martin.kepplinger@puri.sm>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
4 years agoarm64: dts: lx2160a-clearfog-itx: add SFP support
Russell King [Tue, 9 Mar 2021 16:36:58 +0000 (16:36 +0000)]
arm64: dts: lx2160a-clearfog-itx: add SFP support

Add 2x2 SFP+ cage support for clearfog-itx boards.

Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
4 years agoarm64: dts: imx8mp-phyboard-pollux-rdk: Change debug UART
Teresa Remmet [Thu, 11 Mar 2021 06:14:46 +0000 (07:14 +0100)]
arm64: dts: imx8mp-phyboard-pollux-rdk: Change debug UART

With the first redesign the debug UART had changed from
UART2 to UART1.
As the first hardware revision is considered as alpha and
will not be supported in future. The old setup will not
be preserved.

Signed-off-by: Teresa Remmet <t.remmet@phytec.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
4 years agoarm64: dts: imx8mn: Reorder flexspi clock-names entry
Kuldeep Singh [Tue, 9 Mar 2021 11:14:25 +0000 (16:44 +0530)]
arm64: dts: imx8mn: Reorder flexspi clock-names entry

Reorder flexspi clock-names entry to make it compliant with bindings.

Signed-off-by: Kuldeep Singh <kuldeep.singh@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
4 years agoarm64: dts: imx8mm: Reorder flexspi clock-names entry
Kuldeep Singh [Tue, 9 Mar 2021 11:14:24 +0000 (16:44 +0530)]
arm64: dts: imx8mm: Reorder flexspi clock-names entry

Reorder flexspi clock-names entry to make it compliant with bindings.

Signed-off-by: Kuldeep Singh <kuldeep.singh@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
4 years agoarm64: dts: ls1028a: set up the real link speed for ENETC port 2
Vladimir Oltean [Mon, 8 Mar 2021 13:08:34 +0000 (15:08 +0200)]
arm64: dts: ls1028a: set up the real link speed for ENETC port 2

In NXP LS1028A there is a MAC-to-MAC internal link between enetc_port2
and mscc_felix_port4. This link operates at 2.5Gbps and is described as
such for the mscc_felix_port4 node.

The reason for the discrepancy is a limitation in the PHY library
support for fixed-link nodes. Due to the fact that the PHY library
registers a software PHY which emulates the clause 22 register map, the
drivers/net/phy/fixed_phy.c driver only supports speeds up to 1Gbps.

The mscc_felix_port4 node is probed by DSA, which does not use the PHY
library directly, but phylink, and phylink has a different representation
for fixed-link nodes, one that does not have the limitation of not being
able to represent speeds > 1Gbps.

Since the enetc driver was converted to phylink too as of commit
71b77a7a27a3 ("enetc: Migrate to PHYLINK and PCS_LYNX"), the limitation
has been practically lifted there too, and we can describe the real link
speed in the device tree now.

Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
4 years agoarm64: dts: imx8mm-nitrogen-r2: add ecspi2 support
Adrien Grassein [Mon, 8 Mar 2021 12:55:18 +0000 (13:55 +0100)]
arm64: dts: imx8mm-nitrogen-r2: add ecspi2 support

Add the description for ecspi2 support.

Signed-off-by: Adrien Grassein <adrien.grassein@gmail.com>
Reviewed-by: Krzysztof Kozlowski <krzk@kernel.org>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Reviewed-by: Marco Felsch <m.felsch@pengutronix.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
4 years agoarm64: dts: imx: add imx8qm mek support
Dong Aisheng [Mon, 8 Mar 2021 03:14:30 +0000 (11:14 +0800)]
arm64: dts: imx: add imx8qm mek support

The i.MX8QuadMax is a Dual (2x) Cortex-A72 and Quad (4x) Cortex-A53
proccessor with powerful graphic and multimedia features.
This patch adds i.MX8QuadMax MEK board support.

Note that MX8QM needs a special workaround for TLB flush due to a SoC
errata, otherwise there may be random crash if enable both clusters of
A72 and A53. As the errata workaround is still not in mainline, so we
disable A72 cluster first for MX8QM MEK.

Cc: Rob Herring <robh+dt@kernel.org>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: devicetree@vger.kernel.org
Cc: Sascha Hauer <kernel@pengutronix.de>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
4 years agoarm64: dts: imx: add imx8qm common dts file
Dong Aisheng [Mon, 8 Mar 2021 03:14:29 +0000 (11:14 +0800)]
arm64: dts: imx: add imx8qm common dts file

The i.MX8QuadMax is a Dual (2x) Cortex-A72 and Quad (4x) Cortex-A53
proccessor with powerful graphic and multimedia features. It uses
the same architecture as MX8QXP, so many SS can be reused.
This patch adds i.MX8QuadMax SoC dtsi file.

Cc: Rob Herring <robh+dt@kernel.org>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: devicetree@vger.kernel.org
Cc: Sascha Hauer <kernel@pengutronix.de>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
4 years agoarm64: dts: imx8qm: add dma ss support
Dong Aisheng [Mon, 8 Mar 2021 03:14:28 +0000 (11:14 +0800)]
arm64: dts: imx8qm: add dma ss support

The DMA SS of MX8QM is mostly the same as the DMA part in MX8QXP ADMA SS
while it has one more instance for each of LPUART, ADC and LPI2C. And unlike
MX8QXP that flexcan clocks are shared between multiple CAN instances,
MX8QM has separate flexcan clock slice.

So we reuse the most part of common imx8-ss-dma.dtsi and add new things
based on it.

Cc: Rob Herring <robh+dt@kernel.org>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: devicetree@vger.kernel.org
Cc: Sascha Hauer <kernel@pengutronix.de>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
4 years agoarm64: dts: imx8: split adma ss into dma and audio ss
Dong Aisheng [Mon, 8 Mar 2021 03:14:27 +0000 (11:14 +0800)]
arm64: dts: imx8: split adma ss into dma and audio ss

amda ss is consisted of dma and audio ss in qxp which are
also used in qm.
Let's split them into two ss for better code reuse.

Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
4 years agoarm64: dts: imx8qm: add conn ss support
Dong Aisheng [Mon, 8 Mar 2021 03:14:26 +0000 (11:14 +0800)]
arm64: dts: imx8qm: add conn ss support

The CONN SS of MX8QM is mostly the same as MX8QXP except it has one more
USB HSIC module support. So we can fully reuse the exist CONN SS dtsi.
Add <soc>-ss-conn.dtsi with compatible string updated according to
imx8-ss-conn.dtsi.

Cc: Rob Herring <robh+dt@kernel.org>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: devicetree@vger.kernel.org
Cc: Sascha Hauer <kernel@pengutronix.de>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
4 years agoarm64: dts: imx8qm: add lsio ss support
Dong Aisheng [Mon, 8 Mar 2021 03:14:25 +0000 (11:14 +0800)]
arm64: dts: imx8qm: add lsio ss support

The LSIO SS of MX8QM is exactly the same as MX8QXP. So we can fully
reuse the exist LSIO SS dtsi. Add <soc>-ss-lsio.dtsi with compatible
string updated according to imx8-ss-lsio.dtsi.

Cc: Rob Herring <robh+dt@kernel.org>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: devicetree@vger.kernel.org
Cc: Sascha Hauer <kernel@pengutronix.de>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
4 years agoarm64: dts: imx8: switch to new lpcg clock binding
Dong Aisheng [Mon, 8 Mar 2021 03:14:24 +0000 (11:14 +0800)]
arm64: dts: imx8: switch to new lpcg clock binding

switch to new lpcg clock binding

Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
4 years agoarm64: dts: imx8: switch to two cell scu clock binding
Dong Aisheng [Mon, 8 Mar 2021 03:14:23 +0000 (11:14 +0800)]
arm64: dts: imx8: switch to two cell scu clock binding

switch to two cell scu clock binding

Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
4 years agoarm64: dts: imx8: add adma lpcg clocks
Dong Aisheng [Mon, 8 Mar 2021 03:14:22 +0000 (11:14 +0800)]
arm64: dts: imx8: add adma lpcg clocks

Add adma lpcg clocks

Cc: Rob Herring <robh+dt@kernel.org>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: devicetree@vger.kernel.org
Cc: Sascha Hauer <kernel@pengutronix.de>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
4 years agoarm64: dts: imx8: add conn lpcg clocks
Dong Aisheng [Mon, 8 Mar 2021 03:14:21 +0000 (11:14 +0800)]
arm64: dts: imx8: add conn lpcg clocks

Add conn lpcg clocks

Cc: Rob Herring <robh+dt@kernel.org>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: devicetree@vger.kernel.org
Cc: Sascha Hauer <kernel@pengutronix.de>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
4 years agoarm64: dts: imx8: add lsio lpcg clocks
Dong Aisheng [Mon, 8 Mar 2021 03:14:20 +0000 (11:14 +0800)]
arm64: dts: imx8: add lsio lpcg clocks

Add lsio lpcg clocks

Cc: Rob Herring <robh+dt@kernel.org>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: devicetree@vger.kernel.org
Cc: Sascha Hauer <kernel@pengutronix.de>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
4 years agoarm64: dts: imx8qxp: orginize dts in subsystems
Dong Aisheng [Mon, 8 Mar 2021 03:14:19 +0000 (11:14 +0800)]
arm64: dts: imx8qxp: orginize dts in subsystems

MX8 SoC is comprised of a few HW subsystems while some of them can be
reused in the different SoCs. So let's re-orginize them into subsystems
in device tree as well for the possible reuse of the common part.

Note, as there's still no devices of hsio subsys, so removed it
first instead of creating a subsys headfile with no devices.
They will be added back when new devices added.

Cc: Rob Herring <robh+dt@kernel.org>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: devicetree@vger.kernel.org
Cc: Sascha Hauer <kernel@pengutronix.de>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
4 years agoarm64: dts: imx8qxp: move scu pd node before scu clock node
Dong Aisheng [Mon, 8 Mar 2021 03:14:18 +0000 (11:14 +0800)]
arm64: dts: imx8qxp: move scu pd node before scu clock node

SCU clock depends on SCU Power domain. Moving scu pd node before
scu clock can save a hundred of defer probes of all system devices
which depends on power domain and clocks.

Cc: Rob Herring <robh+dt@kernel.org>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: devicetree@vger.kernel.org
Cc: Sascha Hauer <kernel@pengutronix.de>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
4 years agoarm64: dts: imx8qxp: add fallback compatible string for scu pd
Dong Aisheng [Mon, 8 Mar 2021 03:14:17 +0000 (11:14 +0800)]
arm64: dts: imx8qxp: add fallback compatible string for scu pd

According to binding doc, add the fallback compatible string for
scu pd.

Cc: Rob Herring <robh+dt@kernel.org>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: devicetree@vger.kernel.org
Cc: Sascha Hauer <kernel@pengutronix.de>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
4 years agoarm64: dts: imx8mp: add wdog2/3 nodes
Peng Fan [Sun, 7 Mar 2021 10:30:03 +0000 (18:30 +0800)]
arm64: dts: imx8mp: add wdog2/3 nodes

There is wdog[2,3] in i.MX8MP, so add them.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
4 years agoarm64: dts: fsl: add support for Kontron pitx-imx8m board
Heiko Thiery [Wed, 3 Mar 2021 21:10:05 +0000 (22:10 +0100)]
arm64: dts: fsl: add support for Kontron pitx-imx8m board

The Kontron pitx-imx8m board is based on an i.MX8MQ soc.

Signed-off-by: Heiko Thiery <heiko.thiery@gmail.com>
Reviewed-by: Krzysztof Kozlowski <krzk@kernel.org>
Reviewed-by: Michael Walle <michael@walle.cc>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
4 years agoARM: imx7d-remarkable2: Initial device tree for reMarkable2
Alistair Francis [Mon, 22 Mar 2021 13:09:27 +0000 (09:09 -0400)]
ARM: imx7d-remarkable2: Initial device tree for reMarkable2

The reMarkable2 (https://remarkable.com) is an e-ink tablet based on
the imx7d SoC.

This commit is based on the DTS provide by reMarkable but ported to the
latest kernel (instead of 4.14). I have removed references to
non-upstream devices and have changed the UART so that the console can
be accessed without having to open up the device via the OTG pogo pins.

Currently the kernel boots, but there is no support for the display.

WiFi is untested (no display or UART RX makes it hard to test), but
should work with the current upstream driver. As it's untested it's not
included in this commit.

Signed-off-by: Alistair Francis <alistair@alistair23.me>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
4 years agodt-bindings: arm: fsl: Add the reMarkable 2 e-Ink tablet
Alistair Francis [Mon, 22 Mar 2021 13:09:26 +0000 (09:09 -0400)]
dt-bindings: arm: fsl: Add the reMarkable 2 e-Ink tablet

Signed-off-by: Alistair Francis <alistair@alistair23.me>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
4 years agodt-bindings: Add vendor prefix for reMarkable
Alistair Francis [Mon, 22 Mar 2021 13:09:25 +0000 (09:09 -0400)]
dt-bindings: Add vendor prefix for reMarkable

reMarkable AS produces eInk tablets

Signed-off-by: Alistair Francis <alistair@alistair23.me>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
4 years agoARM: dts: BCM5301X: Describe NVMEM NVRAM on Linksys & Luxul routers
Rafał Miłecki [Wed, 10 Mar 2021 21:04:46 +0000 (22:04 +0100)]
ARM: dts: BCM5301X: Describe NVMEM NVRAM on Linksys & Luxul routers

Provide access to NVRAM which contains device environment variables.

Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
4 years agoARM: dts: BCM5301X: fix "reg" formatting in /memory node
Rafał Miłecki [Tue, 9 Mar 2021 12:55:00 +0000 (13:55 +0100)]
ARM: dts: BCM5301X: fix "reg" formatting in /memory node

This fixes warnings/errors like:
arch/arm/boot/dts/bcm4708-buffalo-wzr-1750dhp.dt.yaml: /: memory@0:reg:0: [0, 1342177282281701376402653184] is too long
        From schema: /lib/python3.6/site-packages/dtschema/schemas/reg.yaml

Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
4 years agoMerge tag 'renesas-arm-dt-for-v5.13-tag1' of git://git.kernel.org/pub/scm/linux/kerne...
Arnd Bergmann [Tue, 23 Mar 2021 17:22:41 +0000 (18:22 +0100)]
Merge tag 'renesas-arm-dt-for-v5.13-tag1' of git://git./linux/kernel/git/geert/renesas-devel into arm/dt

Renesas ARM DT updates for v5.13

  - OV7725 camera support for the iWave RainboW Qseven board (G21D), and
    its camera expansion board,
  - Add mmc aliases to fix /dev/mmcblkN order,
  - HDMI Display support for the R-Car Starter Kit Pro with R-Car M3-W+,
  - Support for running upstream kernels on the RZA2MEVB board, using
    the SDRAM present on the sub-board,
  - I2C EEPROM support for the Falcon development board,
  - Timer, thermal sensor, and CAN support for the R-Car V3U SoC.
  - Miscellaneous fixes and improvements.

* tag 'renesas-arm-dt-for-v5.13-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel:
  arm64: dts: renesas: r8a77980: Fix vin4-7 endpoint binding
  arm64: dts: renesas: r8a77961: Add CAN nodes
  arm64: dts: renesas: r8a779a0: Add CMT support
  arm64: dts: renesas: r8a779a0: Add thermal support
  arm64: dts: renesas: r8a779a0: Add TMU support
  arm64: dts: renesas: falcon: Add Ethernet sub-board
  arm64: dts: renesas: falcon: Add CSI/DSI sub-board
  arm64: dts: renesas: falcon: Add I2C EEPROM nodes
  ARM: dts: rza2mevb: Upstream Linux requires SDRAM
  arm64: dts: renesas: Consolidate Salvator-X(S) HDMI0 handling
  arm64: dts: renesas: Add mmc aliases into board dts files
  arm64: dts: renesas: r8a77961-ulcb: add HDMI Display support
  ARM: dts: renesas: Add mmc aliases into R-Car Gen2 board dts files
  arm64: dts: renesas: Group tuples in pin control properties
  arm64: dts: renesas: Group tuples in playback and capture properties
  ARM: dts: renesas: Group tuples in pin control properties
  ARM: dts: renesas: Group tuples in playback and capture properties
  ARM: dts: renesas: Group tuples in APMU cpus properties
  ARM: dts: r8a7742-iwg21d-q7-dbcm-ca: Add support for 8-bit ov7725 sensors
  ARM: dts: r8a7742-iwg21d-q7-dbcm-ca: Separate out ov5640 nodes

Link: https://lore.kernel.org/r/20210319085146.2709844-3-geert+renesas@glider.be
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
4 years agoarm64: dts: broadcom: bcm4908: add Ethernet TX irq
Rafał Miłecki [Wed, 17 Mar 2021 08:16:31 +0000 (09:16 +0100)]
arm64: dts: broadcom: bcm4908: add Ethernet TX irq

This hardware supports two interrupts, one per DMA channel (RX and TX).

Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
4 years agoarm64: dts: renesas: r8a77980: Fix vin4-7 endpoint binding
Vladimir Barinov [Fri, 12 Mar 2021 17:47:35 +0000 (18:47 +0100)]
arm64: dts: renesas: r8a77980: Fix vin4-7 endpoint binding

This fixes the bindings in media framework:
The CSI40 is endpoint number 2
The CSI41 is endpoint number 3

Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
Reviewed-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
Signed-off-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
Link: https://lore.kernel.org/r/20210312174735.2118212-1-niklas.soderlund+renesas@ragnatech.se
Fixes: 3182aa4e0bf4d0ee ("arm64: dts: renesas: r8a77980: add CSI2/VIN support")
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
4 years agoARM: dts: imx7d-mba7: Remove unsupported PCI properties
Fabio Estevam [Mon, 8 Mar 2021 19:11:14 +0000 (16:11 -0300)]
ARM: dts: imx7d-mba7: Remove unsupported PCI properties

disable-gpio' and 'power-on-gpio' are not valid properties
according to Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.txt.

Remove the unsupported properties.

Signed-off-by: Fabio Estevam <festevam@gmail.com>
Reviewed-by: Bruno Thomsen <bruno.thomsen@gmail.com>
Reviewed-by: Matthias Schiffer <matthias.schiffer@ew.tq-group.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
4 years agoARM: dts: imx6qdl-gw*: Remove unnecessary #address-cells/#size-cells
Tim Harvey [Mon, 8 Mar 2021 18:59:40 +0000 (15:59 -0300)]
ARM: dts: imx6qdl-gw*: Remove unnecessary #address-cells/#size-cells

Remove the unnecessary #address-cells/#size-cells to avoid warnings
from W=1 build like this:

arch/arm/boot/dts/imx6qdl-gw52xx.dtsi:33.12-78.4: Warning (avoid_unnecessary_addr_size): /gpio-keys: unnecessary #address-cells/#size-cells without "ranges" or child "reg" property

Signed-off-by: Tim Harvey <tharvey@gateworks.com>
[fabio: Make the warning messages more succint]
Signed-off-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
4 years agoARM: dts: imx6dl-plybas: Fix gpio-keys W=1 warnings
Fabio Estevam [Mon, 8 Mar 2021 18:59:39 +0000 (15:59 -0300)]
ARM: dts: imx6dl-plybas: Fix gpio-keys W=1 warnings

Remove the unnecessary #address-cells/#size-cells and rename the node
names to fix the following W=1 dtc warnings:

arch/arm/boot/dts/imx6dl-plybas.dts:26.13-30.5: Warning (unit_address_vs_reg): /gpio_keys/button@20: node has a unit name, but no reg or ranges property
arch/arm/boot/dts/imx6dl-plybas.dts:32.13-36.5: Warning (unit_address_vs_reg): /gpio_keys/button@21: node has a unit name, but no reg or ranges property
arch/arm/boot/dts/imx6dl-plybas.dts:20.12-37.4: Warning (avoid_unnecessary_addr_size): /gpio_keys: unnecessary #address-cells/#size-cells without "ranges" or child "reg" property

Signed-off-by: Fabio Estevam <festevam@gmail.com>
Reviewed-by: Oleksij Rempel <o.rempel@pengutronix.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
4 years agoARM: dts: imx: bx50v3: Define GPIO line names
Ian Ray [Mon, 8 Mar 2021 15:18:29 +0000 (16:18 +0100)]
ARM: dts: imx: bx50v3: Define GPIO line names

Define GPIO line names for b450v3, b650v3, and b850v3.

Signed-off-by: Ian Ray <ian.ray@ge.com>
Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
4 years agoARM: dts: imx: bx50v3: i2c GPIOs are open drain
Sebastian Reichel [Mon, 8 Mar 2021 15:18:28 +0000 (16:18 +0100)]
ARM: dts: imx: bx50v3: i2c GPIOs are open drain

Explicitly mark I2C GPIOs as open drain to fix the following
kernel message being printed:

enforced open drain please flag it properly in DT/ACPI DSDT/board file

Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
4 years agoARM: dts: imx6q-ba16: improve PHY information
Sebastian Reichel [Mon, 8 Mar 2021 15:18:27 +0000 (16:18 +0100)]
ARM: dts: imx6q-ba16: improve PHY information

Add PHY voltage supply information fixing the following kernel message:

2188000.ethernet supply phy not found, using dummy regulator

Also add PHY clock information to avoid depending on the bootloader
programming correct values.

The bootloader also sets some reserved registers in the PHY as
advised by Qualcomm, which is not supported by the bindings/kernel
driver, so the reset GPIO has not been added intentionally.

Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
4 years agoARM: dts: imx6q-ba16: add USB OTG VBUS enable GPIO
Sebastian Reichel [Mon, 8 Mar 2021 15:18:26 +0000 (16:18 +0100)]
ARM: dts: imx6q-ba16: add USB OTG VBUS enable GPIO

Add VBUS regulator GPIO information, so that USB OTG port can
also be used in host mode.

Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
4 years agoARM: dts: ls1021a: mark crypto engine dma coherent
Horia Geantă [Sun, 7 Mar 2021 20:56:29 +0000 (22:56 +0200)]
ARM: dts: ls1021a: mark crypto engine dma coherent

Crypto engine (CAAM) on LS1021A platform is configured HW-coherent,
mark accordingly the DT node.

Signed-off-by: Horia Geantă <horia.geanta@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
4 years agoARM: dts: colibri-imx6ull: Change drive strength for usdhc2
Philippe Schenker [Thu, 4 Mar 2021 09:31:39 +0000 (10:31 +0100)]
ARM: dts: colibri-imx6ull: Change drive strength for usdhc2

The current setting reflects about 86 Ohms of source-impedance
on the SDIO signals where the WiFi board is hooked up. PCB traces are
routed with 50 Ohms impedance and there are no serial resistors on
those traces.

This commit changes the source-impedance to 52 Ohms to better match our
hardware design.

The impedances given in this commit message refer to 3.3V operation.

Signed-off-by: Philippe Schenker <philippe.schenker@toradex.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
4 years agoARM: dts: imx6ql-pfla02: Move "hog" pins into corresponded pin groups
Alexander Shiyan [Mon, 15 Feb 2021 05:20:19 +0000 (08:20 +0300)]
ARM: dts: imx6ql-pfla02: Move "hog" pins into corresponded pin groups

Move the "hog" pins to the corresponding pin groups for SPI, ENET, PMIC,
LEDs, so that these pins can be used for different purposes when the
respective drivers are disabled.

Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
4 years agoARM: dts: imx6qdl-phytec-pbab01: Select synchronous mode for AUDMUX
Alexander Shiyan [Sun, 14 Feb 2021 06:30:38 +0000 (09:30 +0300)]
ARM: dts: imx6qdl-phytec-pbab01: Select synchronous mode for AUDMUX

Board uses 4-wire synchronous mode for audio,
so add SYN bit for PTCR AUDMUX registers.

Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
4 years agoARM: dts: imx6qdl-ts7970: Drop redundant "fsl,mode" option
Alexander Shiyan [Sun, 14 Feb 2021 06:12:43 +0000 (09:12 +0300)]
ARM: dts: imx6qdl-ts7970: Drop redundant "fsl,mode" option

The operating mode is used for the AC97 interface only,
so lets drop the excess fsl,mode item from SSI node.

Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
4 years agoARM: dts: imx53-qsb: Describe the esdhc1 card detect pin
Fabio Estevam [Sun, 14 Feb 2021 01:41:55 +0000 (22:41 -0300)]
ARM: dts: imx53-qsb: Describe the esdhc1 card detect pin

The micro SD card slot uses GPIO3_13 as card detect pin, so describe
it in the devicetree.

This was noticed when converting imx53-qsb board to driver model
in U-Boot as the micro SD card was not getting detected.

Signed-off-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
4 years agoarm64: dts: freescale: Add support EQOS MAC on phyBOARD-Pollux-i.MX8MP
Marek Vasut [Sun, 28 Feb 2021 21:18:34 +0000 (22:18 +0100)]
arm64: dts: freescale: Add support EQOS MAC on phyBOARD-Pollux-i.MX8MP

The board has both MACs routed out, enable the EQOS.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Dong Aisheng <aisheng.dong@nxp.com>
Cc: Heiko Schocher <hs@denx.de>
Cc: NXP Linux Team <linux-imx@nxp.com>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Teresa Remmet <t.remmet@phytec.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
4 years agoarm64: dts: imx8mp: add eqos node and alias
Marek Vasut [Sun, 28 Feb 2021 21:18:33 +0000 (22:18 +0100)]
arm64: dts: imx8mp: add eqos node and alias

Add EQOS GMAC node per Documentation/devicetree/bindings/net/imx-dwmac.txt ,
leave out the nvmem entries as that is not yet available, so the MAC has to
be passed in via DT by the bootloader.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Dong Aisheng <aisheng.dong@nxp.com>
Cc: Heiko Schocher <hs@denx.de>
Cc: NXP Linux Team <linux-imx@nxp.com>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Teresa Remmet <t.remmet@phytec.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
4 years agoarm64: dts: imx8mm: Add Engicam i.Core MX8M Mini EDIMM2.2 Starter Kit
Jagan Teki [Thu, 25 Feb 2021 19:24:04 +0000 (00:54 +0530)]
arm64: dts: imx8mm: Add Engicam i.Core MX8M Mini EDIMM2.2 Starter Kit

Engicam EDIMM2.2 Starter Kit is an EDIMM 2.2 Form Factor Capacitive
Evaluation Board.

Genaral features:
- LCD 7" C.Touch
- microSD slot
- Ethernet 1Gb
- Wifi/BT
- 2x LVDS Full HD interfaces
- 3x USB 2.0
- 1x USB 3.0
- HDMI Out
- Mini PCIe
- MIPI CSI
- 2x CAN
- Audio Out

i.Core MX8M Mini is an EDIMM SoM based on NXP i.MX8M Mini from Engicam.

i.Core MX8M Mini needs to mount on top of this Evaluation board for
creating complete i.Core MX8M Mini EDIMM2.2 Starter Kit.

PCIe, DSI, CSI nodes will add it into imx8mm-engicam-edimm2.2.dtsi once
Mainline Linux supported.

Add support for it.

Signed-off-by: Matteo Lisi <matteo.lisi@engicam.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
4 years agoarm64: dts: imx8mm: Add Engicam i.Core MX8M Mini C.TOUCH 2.0
Jagan Teki [Thu, 25 Feb 2021 19:24:02 +0000 (00:54 +0530)]
arm64: dts: imx8mm: Add Engicam i.Core MX8M Mini C.TOUCH 2.0

Engicam C.TOUCH 2.0 is an EDIMM compliant general purpose Carrier
board.

Genaral features:
- Ethernet 10/100
- Wifi/BT
- USB Type A/OTG
- Audio Out
- CAN
- LVDS panel connector

i.Core MX8M Mini is an EDIMM SoM based on NXP i.MX8M Mini from Engicam.

i.Core MX8M Mini needs to mount on top of this Carrier board for
creating complete i.Core MX8M Mini C.TOUCH 2.0 board.

Add support for it.

Signed-off-by: Matteo Lisi <matteo.lisi@engicam.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Krzysztof Kozlowski <krzk@kernel.org>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
4 years agoarm64: dts: imx8mm: Add Engicam i.Core MX8M Mini SoM
Jagan Teki [Thu, 25 Feb 2021 19:24:01 +0000 (00:54 +0530)]
arm64: dts: imx8mm: Add Engicam i.Core MX8M Mini SoM

i.Core MX8M Mini is an EDIMM SoM based on NXP i.MX8M Mini
from Engicam.

General features:
- NXP i.MX8M Mini
- Up to 2GB LDDR4
- 8/16GB eMMC
- Gigabit Ethernet
- USB 2.0 Host/OTG
- PCIe Gen2 interface
- I2S
- MIPI DSI to LVDS
- rest of i.MX8M Mini features

i.Core MX8M Mini needs to mount on top of Engicam baseboards
for creating complete platform solutions.

Add support for it.

Signed-off-by: Matteo Lisi <matteo.lisi@engicam.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Krzysztof Kozlowski <krzk@kernel.org>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
4 years agoarm64: dts: imx8qxp: correct usdhc clock-names sequence
Peng Fan [Thu, 25 Feb 2021 03:10:02 +0000 (11:10 +0800)]
arm64: dts: imx8qxp: correct usdhc clock-names sequence

Per dt-bindings, the clock-names sequence should be ipg ahb per to pass
dtbs_check.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
4 years agoarm64: dts: imx8mm-nitrogen-r2: add audio
Adrien Grassein [Tue, 23 Feb 2021 19:16:51 +0000 (20:16 +0100)]
arm64: dts: imx8mm-nitrogen-r2: add audio

Add audio description and pin muxing.

Signed-off-by: Adrien Grassein <adrien.grassein@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
4 years agoarm64: dts: imx8mm-nitrogen-r2: add FlexSPI
Adrien Grassein [Tue, 23 Feb 2021 19:16:50 +0000 (20:16 +0100)]
arm64: dts: imx8mm-nitrogen-r2: add FlexSPI

Add FlexSPI description an pin muxing.

Signed-off-by: Adrien Grassein <adrien.grassein@gmail.com>
Reviewed-by: Krzysztof Kozlowski <krzk@kernel.org>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
4 years agoarm64: dts: imx8mm-nitrogen-r2: add PWMs
Adrien Grassein [Tue, 23 Feb 2021 19:16:49 +0000 (20:16 +0100)]
arm64: dts: imx8mm-nitrogen-r2: add PWMs

Add description for the four PWMs.

Signed-off-by: Adrien Grassein <adrien.grassein@gmail.com>
Reviewed-by: Krzysztof Kozlowski <krzk@kernel.org>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
4 years agoarm64: dts: imx8mm-nitrogen-r2: rework UART 2
Adrien Grassein [Tue, 23 Feb 2021 19:16:48 +0000 (20:16 +0100)]
arm64: dts: imx8mm-nitrogen-r2: rework UART 2

Remove useless clocks in UART 2

Signed-off-by: Adrien Grassein <adrien.grassein@gmail.com>
Reviewed-by: Krzysztof Kozlowski <krzk@kernel.org>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
4 years agoarm64: dts: imx8mm-nitrogen-r2: add UARTs
Adrien Grassein [Tue, 23 Feb 2021 19:16:47 +0000 (20:16 +0100)]
arm64: dts: imx8mm-nitrogen-r2: add UARTs

Add description and pin muxing for UARTs.

Signed-off-by: Adrien Grassein <adrien.grassein@gmail.com>
Reviewed-by: Krzysztof Kozlowski <krzk@kernel.org>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
4 years agoarm64: dts: imx8mm-nitrogen-r2: add USB support
Adrien Grassein [Tue, 23 Feb 2021 19:16:46 +0000 (20:16 +0100)]
arm64: dts: imx8mm-nitrogen-r2: add USB support

Add description of USB.
usbotg2 seems to not working on all boards (including ones
from variscite).

Signed-off-by: Adrien Grassein <adrien.grassein@gmail.com>
Reviewed-by: Krzysztof Kozlowski <krzk@kernel.org>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
4 years agoarm64: dts: imx8mm-nitrogen-r2: rework USDHC1
Adrien Grassein [Tue, 23 Feb 2021 19:16:45 +0000 (20:16 +0100)]
arm64: dts: imx8mm-nitrogen-r2: rework USDHC1

Add VMMC and VQMMC description for USDHC1 (eMMC).
There are comming directly from the alimentation
stage, so add the vref_3V3 fixed regulator.

Signed-off-by: Adrien Grassein <adrien.grassein@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
4 years agoarm64: dts: imx8mm-nitrogen-r2: add wifi/bt chip
Adrien Grassein [Tue, 23 Feb 2021 19:16:44 +0000 (20:16 +0100)]
arm64: dts: imx8mm-nitrogen-r2: add wifi/bt chip

Add usdhc3 description which corresponds to the wifi/bt chip

Signed-off-by: Adrien Grassein <adrien.grassein@gmail.com>
Reviewed-by: Krzysztof Kozlowski <krzk@kernel.org>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
4 years agoarm64: dts: librem5-devkit: Move headphone detection to sound card
Guido Günther [Sun, 21 Feb 2021 11:07:11 +0000 (12:07 +0100)]
arm64: dts: librem5-devkit: Move headphone detection to sound card

This allows for automatic output source switching in userspace. Enable
the pullup on the GPIO to actually make it trigger and mark it as
active-high since detection is reversed otherwise.

Signed-off-by: Guido Günther <agx@sigxcpu.org>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
4 years agoarm64: dts: librem5-devkit: Add mux for built-in vs headset mic
Guido Günther [Sun, 21 Feb 2021 11:07:10 +0000 (12:07 +0100)]
arm64: dts: librem5-devkit: Add mux for built-in vs headset mic

Add mux so we can select either headset or built-in microphone input.

Signed-off-by: Guido Günther <agx@sigxcpu.org>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
4 years agoarm64: dts: librem5-devkit: "Drop Line In Jack"
Guido Günther [Sun, 21 Feb 2021 11:07:08 +0000 (12:07 +0100)]
arm64: dts: librem5-devkit: "Drop Line In Jack"

The SGTL500s LINEINL and LINEINR are N/C.

Signed-off-by: Guido Günther <agx@sigxcpu.org>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
4 years agoarm64: dts: librem5-devkit: Add speaker amplifier
Guido Günther [Sun, 21 Feb 2021 11:07:07 +0000 (12:07 +0100)]
arm64: dts: librem5-devkit: Add speaker amplifier

Wire up the amplifier that drives the builtin speaker.

Signed-off-by: Guido Günther <agx@sigxcpu.org>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
4 years agoarm64: dts: librem5-devkit: Use a less generic codec name
Guido Günther [Sun, 21 Feb 2021 11:07:06 +0000 (12:07 +0100)]
arm64: dts: librem5-devkit: Use a less generic codec name

The codec is currently named after the chip but it should be named like
the device itself since otherwise it's impossible to distinguish it from
other devices using the same codec (e.g. in alsa's UCM).

Signed-off-by: Guido Günther <agx@sigxcpu.org>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
4 years agoarm64: dts: imx8mq-librem5-r2: set nearlevel to 120
Martin Kepplinger [Fri, 19 Feb 2021 10:04:39 +0000 (11:04 +0100)]
arm64: dts: imx8mq-librem5-r2: set nearlevel to 120

On Birch I can never reach 220 and hence the display would never
turn off. Tests suggest 120 to be a good threshold value for all Birch
devices.

Signed-off-by: Martin Kepplinger <martin.kepplinger@puri.sm>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
4 years agoarm64: dts: librem5: protect some partitions of the nor-flash
Angus Ainslie [Fri, 19 Feb 2021 10:04:38 +0000 (11:04 +0100)]
arm64: dts: librem5: protect some partitions of the nor-flash

These sections should be read only as they contain important data.

Signed-off-by: Angus Ainslie <angus@akkea.ca>
Signed-off-by: Martin Kepplinger <martin.kepplinger@puri.sm>
Reviewed-by: Krzysztof Kozlowski <krzk@kernel.org>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
4 years agoarm64: dts: librem5: Drop assigned-clocks from SAI2
Guido Günther [Fri, 19 Feb 2021 10:04:36 +0000 (11:04 +0100)]
arm64: dts: librem5: Drop assigned-clocks from SAI2

IMX8MQ_AUDIO_PLL1 and IMX8MQ_AUDIO_PLL2 are setup to the same rates
right on the clock controller.

Signed-off-by: Guido Günther <agx@sigxcpu.org>
Signed-off-by: Martin Kepplinger <martin.kepplinger@puri.sm>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
4 years agoarm64: dts: imx8mq-librem5-devkit: Drop buck3 startup-ramp-delay
Guido Günther [Fri, 19 Feb 2021 10:04:35 +0000 (11:04 +0100)]
arm64: dts: imx8mq-librem5-devkit: Drop buck3 startup-ramp-delay

The PMIC driver now sets appropriate default delays.

Signed-off-by: Guido Günther <agx@sigxcpu.org>
Signed-off-by: Martin Kepplinger <martin.kepplinger@puri.sm>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
4 years agoarm64: dts: imx8mn-beacon: Enable SDR104 on WiFi SDIO interface
Adam Ford [Sun, 14 Feb 2021 20:17:42 +0000 (14:17 -0600)]
arm64: dts: imx8mn-beacon: Enable SDR104 on WiFi SDIO interface

Enable 100Mhz and 200MHz pinmux and corrsesponding voltage supplies
to enable SDR104 on usdhc1 connecting the WiFi chip.

Signed-off-by: Adam Ford <aford173@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
4 years agoarm64: dts: ls1028a: add interrupt to Root Complex Event Collector
Michael Walle [Tue, 9 Feb 2021 00:52:59 +0000 (01:52 +0100)]
arm64: dts: ls1028a: add interrupt to Root Complex Event Collector

The legacy interrupt INT_A is hardwired to the event collector. RCEC is
bascially supported starting with v5.11. Having a correct interrupt, will
make RCEC at least probe correctly.

There are still issues with how RCEC is implemented in the RCiEP on the
LS1028A. RCEC will report an error, but it cannot find the correct
subdevice.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Tested-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
4 years agoarm64: dts: imx8mm-nitrogen-r2: Pass the i2c3 unit name
Fabio Estevam [Mon, 8 Feb 2021 14:33:27 +0000 (11:33 -0300)]
arm64: dts: imx8mm-nitrogen-r2: Pass the i2c3 unit name

Pass the i2c3 unit name to fix the following W=1 build warning:

arch/arm64/boot/dts/freescale/imx8mm-nitrogen-r2.dts:159.8-172.5: Warning (unit_address_vs_reg): /soc@0/bus@30800000/i2c@30a40000/i2cmux@70/i2c3: node has a reg or ranges property, but no unit name

Signed-off-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>