qemu.git
8 weeks agohw: Declare various const data as 'const'
Philippe Mathieu-Daudé [Mon, 10 Feb 2025 08:49:30 +0000 (09:49 +0100)]
hw: Declare various const data as 'const'

Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20250210133134.90879-7-philmd@linaro.org>

8 weeks agotests/functional: Remove sleep() kludges from microblaze tests
Philippe Mathieu-Daudé [Thu, 6 Feb 2025 12:58:38 +0000 (13:58 +0100)]
tests/functional: Remove sleep() kludges from microblaze tests

Commit f0ec14c78c4 ("tests/avocado: Fix console data loss") fixed
QEMUMachine's problem with console, we don't need to use the sleep()
kludges.

Suggested-by: Thomas Huth <thuth@redhat.com>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Thomas Huth <thuth@redhat.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20250206131052.30207-15-philmd@linaro.org>

8 weeks agotests/functional: Allow microblaze tests to take a machine name argument
Philippe Mathieu-Daudé [Thu, 6 Feb 2025 10:47:13 +0000 (11:47 +0100)]
tests/functional: Allow microblaze tests to take a machine name argument

Make microblaze tests a bit more generic.

Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Thomas Huth <thuth@redhat.com>
Message-Id: <20250206131052.30207-14-philmd@linaro.org>

8 weeks agotests/functional: Explicit endianness of microblaze assets
Philippe Mathieu-Daudé [Wed, 25 Sep 2024 20:16:12 +0000 (22:16 +0200)]
tests/functional: Explicit endianness of microblaze assets

The archive used in test_microblaze_s3adsp1800.py (testing a
big-endian target) contains a big-endian kernel. Rename using
the _BE suffix.

Similarly, the archive in test_microblazeel_s3adsp1800 (testing
a little-endian target) contains a little-endian kernel. Rename
using _LE suffix.

These changes will help when adding cross-endian kernel tests.

Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Thomas Huth <thuth@redhat.com>
Message-Id: <20250206131052.30207-13-philmd@linaro.org>

8 weeks agohw/net/smc91c111: Ignore attempt to pop from empty RX fifo
Peter Maydell [Fri, 7 Feb 2025 15:11:57 +0000 (15:11 +0000)]
hw/net/smc91c111: Ignore attempt to pop from empty RX fifo

The SMC91C111 includes an MMU Command register which permits
the guest to remove entries from the RX FIFO. The datasheet
does not specify what happens if the guest tries to do this
when the FIFO is already empty; there are no status registers
containing error bits which might be applicable.

Currently we don't guard at all against pop of an empty
RX FIFO, with the result that we allow the guest to drive
the rx_fifo_len index to negative values, which will cause
smc91c111_receive() to write to the rx_fifo[] array out of
bounds when we receive the next packet.

Instead ignore attempts to pop an empty RX FIFO.

Cc: qemu-stable@nongnu.org
Fixes: 80337b66a8e7 ("NIC emulation for qemu arm-softmmu")
Resolves: https://gitlab.com/qemu-project/qemu/-/issues/2780
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-ID: <20250207151157.3151776-1-peter.maydell@linaro.org>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
8 weeks agohw/riscv/opentitan: Include missing 'exec/address-spaces.h' header
Philippe Mathieu-Daudé [Thu, 6 Feb 2025 15:24:25 +0000 (16:24 +0100)]
hw/riscv/opentitan: Include missing 'exec/address-spaces.h' header

opentitan_machine_init() calls get_system_memory(),
which is declared in "exec/address-spaces.h". Include
it in order to avoid when refactoring unrelated headers:

  hw/riscv/opentitan.c:83:29: error: call to undeclared function 'get_system_memory'
     83 |     MemoryRegion *sys_mem = get_system_memory();
        |                             ^

Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Message-Id: <20250206181827.41557-4-philmd@linaro.org>

8 weeks agohw/boards: Ensure machine setting auto_create_sdcard expose a SD Bus
Philippe Mathieu-Daudé [Tue, 4 Feb 2025 13:42:01 +0000 (14:42 +0100)]
hw/boards: Ensure machine setting auto_create_sdcard expose a SD Bus

Using the auto_create_sdcard feature without SD Bus is irrelevant.

Reviewed-by: Thomas Huth <thuth@redhat.com>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-Id: <20250204200934.65279-8-philmd@linaro.org>

8 weeks agohw/riscv: Remove all invalid uses of auto_create_sdcard=true
Philippe Mathieu-Daudé [Tue, 4 Feb 2025 15:47:50 +0000 (16:47 +0100)]
hw/riscv: Remove all invalid uses of auto_create_sdcard=true

MachineClass::auto_create_sdcard is only useful to automatically
create a SD card, attach a IF_SD block drive to it and plug the
card onto a SD bus. None of the RISCV machines modified by this
commit try to use the IF_SD interface.

Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Thomas Huth <thuth@redhat.com>
Message-Id: <20250204200934.65279-7-philmd@linaro.org>

8 weeks agohw/arm: Remove all invalid uses of auto_create_sdcard=true
Philippe Mathieu-Daudé [Tue, 4 Feb 2025 15:59:18 +0000 (16:59 +0100)]
hw/arm: Remove all invalid uses of auto_create_sdcard=true

MachineClass::auto_create_sdcard is only useful to automatically
create a SD card, attach a IF_SD block drive to it and plug the
card onto a SD bus. None of the ARM machines modified by this
commit try to use the IF_SD interface.

Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Thomas Huth <thuth@redhat.com>
Message-Id: <20250204200934.65279-6-philmd@linaro.org>

8 weeks agohw/boards: Do not create unusable default if=sd drives
Philippe Mathieu-Daudé [Tue, 4 Feb 2025 12:17:43 +0000 (13:17 +0100)]
hw/boards: Do not create unusable default if=sd drives

A number of machines create an if=sd drive by default even though
they lack an SD bus, and therefore cannot use the drive.

This drive is created when the machine sets flag
@auto_create_sdcard.

See for example running HMP "info block" on the HPPA C3700 machine:

  $ qemu-system-hppa -M C3700 -monitor stdio -S
  (qemu) info block

  floppy0: [not inserted]
      Removable device: not locked, tray closed

  sd0: [not inserted]
      Removable device: not locked, tray closed

  $ qemu-system-hppa -M C3700 -sd /bin/sh
  qemu-system-hppa: -sd /bin/sh: machine type does not support if=sd,bus=0,unit=0

Delete that from machines that lack an SD bus.

Note, only the ARM and RISCV targets use such feature:

 $ git grep -wl IF_SD hw | cut -d/ -f-2 | sort -u
 hw/arm
 hw/riscv
 $

Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Thomas Huth <thuth@redhat.com>
Message-Id: <20250204200934.65279-5-philmd@linaro.org>

8 weeks agohw/boards: Rename no_sdcard -> auto_create_sdcard
Philippe Mathieu-Daudé [Mon, 25 Nov 2024 17:26:48 +0000 (18:26 +0100)]
hw/boards: Rename no_sdcard -> auto_create_sdcard

Invert the 'no_sdcard' logic, renaming it as the more explicit
"auto_create_sdcard". Machines are supposed to create a SD Card
drive when this flag is set. In many cases it doesn't make much
sense (as boards don't expose SD Card host controller), but this
is patch only aims to expose that nonsense; so no logical change
intended (mechanical patch using gsed).

Most of the changes are:

  -    mc->no_sdcard = ON_OFF_AUTO_OFF;
  +    mc->auto_create_sdcard = true;

Except in
 . hw/core/null-machine.c
 . hw/arm/xilinx_zynq.c
 . hw/s390x/s390-virtio-ccw.c
where the disabled option is manually removed (since default):

  -    mc->no_sdcard = ON_OFF_AUTO_ON;
  +    mc->auto_create_sdcard = false;
  -    mc->auto_create_sdcard = false;

and in system/vl.c we change the 'default_sdcard' type to boolean.

Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Thomas Huth <thuth@redhat.com>
Message-Id: <20250204200934.65279-4-philmd@linaro.org>

8 weeks agohw/boards: Explicit no_sdcard=false as ON_OFF_AUTO_OFF
Philippe Mathieu-Daudé [Mon, 25 Nov 2024 14:26:15 +0000 (15:26 +0100)]
hw/boards: Explicit no_sdcard=false as ON_OFF_AUTO_OFF

Update MachineClass::no_sdcard default implicit AUTO
initialization to explicit OFF. This flag is consumed
in system/vl.c::qemu_disable_default_devices(). Use
this place to assert we don't have anymore AUTO state.

In hw/ppc/e500.c we add the ppce500_machine_class_init()
method to initialize once all the inherited classes.

Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Thomas Huth <thuth@redhat.com>
Message-Id: <20250204200934.65279-3-philmd@linaro.org>

8 weeks agohw/boards: Convert no_sdcard flag to OnOffAuto tri-state
Philippe Mathieu-Daudé [Mon, 25 Nov 2024 14:16:54 +0000 (15:16 +0100)]
hw/boards: Convert no_sdcard flag to OnOffAuto tri-state

MachineClass::no_sdcard is initialized as false by default.
To catch all uses, convert it to a tri-state, having the
current default (false) becoming AUTO.

No logical change intended.

Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Thomas Huth <thuth@redhat.com>
Message-Id: <20250204200934.65279-2-philmd@linaro.org>

8 weeks agohw/xen: Have legacy Xen backend inherit from DYNAMIC_SYS_BUS_DEVICE
Philippe Mathieu-Daudé [Sat, 25 Jan 2025 13:52:12 +0000 (14:52 +0100)]
hw/xen: Have legacy Xen backend inherit from DYNAMIC_SYS_BUS_DEVICE

Because the legacy Xen backend devices can optionally be plugged on the
TYPE_PLATFORM_BUS_DEVICE, have it inherit TYPE_DYNAMIC_SYS_BUS_DEVICE.
Remove the implicit TYPE_XENSYSDEV instance_size.

Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Alexander Graf <graf@amazon.com>
Tested-by: Bernhard Beschow <shentey@gmail.com>
Reviewed-by: Bernhard Beschow <shentey@gmail.com>
Message-Id: <20250125181343.59151-10-philmd@linaro.org>

8 weeks agohw/xen: Prefer QOM cast for XenLegacyDevice
Bernhard Beschow [Mon, 27 Jan 2025 09:41:29 +0000 (10:41 +0100)]
hw/xen: Prefer QOM cast for XenLegacyDevice

Makes the code less sensitive regarding changes in the class hierarchy which
will be performed in the next patch.

Signed-off-by: Bernhard Beschow <shentey@gmail.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-ID: <20250127094129.15941-1-shentey@gmail.com>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
8 weeks agohw/tpm: Have TPM TIS sysbus device inherit from DYNAMIC_SYS_BUS_DEVICE
Philippe Mathieu-Daudé [Sat, 25 Jan 2025 13:43:24 +0000 (14:43 +0100)]
hw/tpm: Have TPM TIS sysbus device inherit from DYNAMIC_SYS_BUS_DEVICE

Because the TPM TIS sysbus device can be optionally plugged on the
TYPE_PLATFORM_BUS_DEVICE, have it inherit TYPE_DYNAMIC_SYS_BUS_DEVICE.

Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Alexander Graf <graf@amazon.com>
Reviewed-by: Clément Mathieu--Drif <clement.mathieu--drif@eviden.com>
Reviewed-by: Stefan Berger <stefanb@linux.ibm.com>
Message-Id: <20250125181343.59151-9-philmd@linaro.org>

8 weeks agohw/net: Have eTSEC device inherit from DYNAMIC_SYS_BUS_DEVICE
Philippe Mathieu-Daudé [Sat, 25 Jan 2025 17:36:57 +0000 (18:36 +0100)]
hw/net: Have eTSEC device inherit from DYNAMIC_SYS_BUS_DEVICE

Because the network eTSEC device can be optionally plugged on the
TYPE_PLATFORM_BUS_DEVICE, have it inherit TYPE_DYNAMIC_SYS_BUS_DEVICE.

Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Alexander Graf <graf@amazon.com>
Reviewed-by: Clément Mathieu--Drif <clement.mathieu--drif@eviden.com>
Tested-by: Bernhard Beschow <shentey@gmail.com>
Acked-by: Bernhard Beschow <shentey@gmail.com>
Message-Id: <20250125181343.59151-8-philmd@linaro.org>

8 weeks agohw/i386: Have X86_IOMMU devices inherit from DYNAMIC_SYS_BUS_DEVICE
Philippe Mathieu-Daudé [Sat, 25 Jan 2025 17:36:50 +0000 (18:36 +0100)]
hw/i386: Have X86_IOMMU devices inherit from DYNAMIC_SYS_BUS_DEVICE

Do not explain why _X86_IOMMU devices are user_creatable,
have them inherit TYPE_DYNAMIC_SYS_BUS_DEVICE, to explicit
they can optionally be plugged on TYPE_PLATFORM_BUS_DEVICE.

Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Alexander Graf <graf@amazon.com>
Reviewed-by: Clément Mathieu--Drif <clement.mathieu--drif@eviden.com>
Message-Id: <20250125181343.59151-7-philmd@linaro.org>

8 weeks agohw/display: Have RAMFB device inherit from DYNAMIC_SYS_BUS_DEVICE
Philippe Mathieu-Daudé [Sat, 25 Jan 2025 17:36:43 +0000 (18:36 +0100)]
hw/display: Have RAMFB device inherit from DYNAMIC_SYS_BUS_DEVICE

Because the RAM FB device can be optionally plugged on the
TYPE_PLATFORM_BUS_DEVICE, have it inherit TYPE_DYNAMIC_SYS_BUS_DEVICE.

Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Alexander Graf <graf@amazon.com>
Reviewed-by: Clément Mathieu--Drif <clement.mathieu--drif@eviden.com>
Message-Id: <20250125181343.59151-6-philmd@linaro.org>

8 weeks agohw/vfio: Have VFIO_PLATFORM devices inherit from DYNAMIC_SYS_BUS_DEVICE
Philippe Mathieu-Daudé [Sat, 25 Jan 2025 12:48:29 +0000 (13:48 +0100)]
hw/vfio: Have VFIO_PLATFORM devices inherit from DYNAMIC_SYS_BUS_DEVICE

Do not explain why VFIO_PLATFORM devices are user_creatable,
have them inherit TYPE_DYNAMIC_SYS_BUS_DEVICE, to make explicit
that they can optionally be plugged on TYPE_PLATFORM_BUS_DEVICE.

Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Alexander Graf <graf@amazon.com>
Message-Id: <20250125181343.59151-5-philmd@linaro.org>

8 weeks agohw/sysbus: Introduce TYPE_DYNAMIC_SYS_BUS_DEVICE
Philippe Mathieu-Daudé [Sat, 25 Jan 2025 13:36:42 +0000 (14:36 +0100)]
hw/sysbus: Introduce TYPE_DYNAMIC_SYS_BUS_DEVICE

Some TYPE_SYS_BUS_DEVICEs can be optionally dynamically
plugged on the TYPE_PLATFORM_BUS_DEVICE.
Rather than sometimes noting that with comment around
the 'user_creatable = true' line in each DeviceRealize
handler, introduce an abstract TYPE_DYNAMIC_SYS_BUS_DEVICE
class.

Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Alexander Graf <graf@amazon.com>
Reviewed-by: Clément Mathieu--Drif <clement.mathieu--drif@eviden.com>
Message-Id: <20250125181343.59151-4-philmd@linaro.org>

8 weeks agohw/sysbus: Declare QOM types using DEFINE_TYPES() macro
Philippe Mathieu-Daudé [Sat, 25 Jan 2025 17:24:31 +0000 (18:24 +0100)]
hw/sysbus: Declare QOM types using DEFINE_TYPES() macro

When multiple QOM types are registered in the same file,
it is simpler to use the the DEFINE_TYPES() macro. In
particular because type array declared with such macro
are easier to review.

Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Alexander Graf <graf@amazon.com>
Reviewed-by: Clément Mathieu--Drif <clement.mathieu--drif@eviden.com>
Reviewed-by: Bernhard Beschow <shentey@gmail.com>
Message-Id: <20250125181343.59151-3-philmd@linaro.org>

8 weeks agohw/sysbus: Use sizeof(BusState) in main_system_bus_create()
Philippe Mathieu-Daudé [Sat, 25 Jan 2025 17:24:39 +0000 (18:24 +0100)]
hw/sysbus: Use sizeof(BusState) in main_system_bus_create()

Rather than using the obscure system_bus_info.instance_size,
directly use sizeof(BusState).

Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Alexander Graf <graf@amazon.com>
Reviewed-by: Clément Mathieu--Drif<clement.mathieu--drif@eviden.com>
Message-Id: <20250125181343.59151-2-philmd@linaro.org>

8 weeks agohw/core/machine: Reject thread level cache
Zhao Liu [Fri, 10 Jan 2025 14:51:11 +0000 (22:51 +0800)]
hw/core/machine: Reject thread level cache

Currently, neither i386 nor ARM have real hardware support for per-
thread cache, and there is no clear demand for this specific cache
topology.

Additionally, since ARM even can't support this special cache topology
in device tree, it is unnecessary to support it at this moment, even
though per-thread cache might have potential scheduling benefits for
VMs without CPU affinity.

Therefore, disable thread-level cache topology in the general machine
part. At present, i386 has not enabled SMP cache, so disabling the
thread parameter does not pose compatibility issues.

In the future, if there is a clear demand for this feature, the correct
approach would be to add a new control field in MachineClass.smp_props
and enable it only for the machines that require it.

Signed-off-by: Zhao Liu <zhao1.liu@intel.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-ID: <20250110145115.1574345-2-zhao1.liu@intel.com>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
8 weeks agohw/intc/apic: Fixes magic number use, removes outdated comment
Phil Dennis-Jordan [Mon, 9 Dec 2024 20:36:28 +0000 (21:36 +0100)]
hw/intc/apic: Fixes magic number use, removes outdated comment

This changes replaces the use of an explicit literal constant for
the APIC base address mask with the existing symbolic constant
intended for this purpose.

Additionally, we remove the comment about not being able to
re-enable the APIC after disabling it. This is no longer
the case after the APIC implementation's state machine was
modified in 9.0.

Signed-off-by: Phil Dennis-Jordan <phil@philjordan.eu>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-ID: <20241209203629.74436-11-phil@philjordan.eu>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
8 weeks agohw/arm/xlnx-zynqmp: Use &error_abort for programming errors
Philippe Mathieu-Daudé [Fri, 8 Nov 2024 15:24:50 +0000 (15:24 +0000)]
hw/arm/xlnx-zynqmp: Use &error_abort for programming errors

When a property value is static (not provided by QMP or CLI),
error shouldn't happen, otherwise it is a programming error.
Therefore simplify and use &error_abort as this can't fail.

Reported-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Anton Johansson <anjo@rev.ng>
Message-Id: <20241108154317.12129-11-philmd@linaro.org>

8 weeks agobackends/tpm: Use qemu_hexdump_line() to avoid sprintf()
Philippe Mathieu-Daudé [Fri, 12 Apr 2024 07:33:30 +0000 (00:33 -0700)]
backends/tpm: Use qemu_hexdump_line() to avoid sprintf()

sprintf() is deprecated on Darwin since macOS 13.0 / XCode 14.1.
Using qemu_hexdump_line() both fixes the deprecation warning and
simplifies the code base.

Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Stefan Berger <stefanb@linux.ibm.com>
[rth: Keep the linebreaks every 16 bytes]
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-ID: <20240412073346.458116-12-richard.henderson@linaro.org>
[PMD: Rebased]

2 months agoMerge tag 'pull-trivial-patches' of https://gitlab.com/mjt0k/qemu into staging
Stefan Hajnoczi [Fri, 14 Feb 2025 13:19:05 +0000 (08:19 -0500)]
Merge tag 'pull-trivial-patches' of https://gitlab.com/mjt0k/qemu into staging

trivial patches for 2025-02-14

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# gpg: Signature made Fri 14 Feb 2025 00:54:14 EST
# gpg:                using RSA key 64AA2AB531D56903366BFEF982AA4A243B1E9478
# gpg: Good signature from "Michael Tokarev <mjt@debian.org>" [unknown]
# gpg:                 aka "Michael Tokarev <mjt@corpit.ru>" [unknown]
# gpg:                 aka "Michael Tokarev <mjt@tls.msk.ru>" [unknown]
# gpg: WARNING: This key is not certified with a trusted signature!
# gpg:          There is no indication that the signature belongs to the owner.
# Primary key fingerprint: 9D8B E14E 3F2A 9DD7 9199  28F1 61AD 3D98 ECDF 2C8E
#      Subkey fingerprint: 64AA 2AB5 31D5 6903 366B  FEF9 82AA 4A24 3B1E 9478

* tag 'pull-trivial-patches' of https://gitlab.com/mjt0k/qemu:
  make-release: don't rely on $CWD when excluding subproject directories
  target/riscv: Fix minor whitespace issue in riscv_cpu_properties
  qemu/timer: Clarify timer_new*() must be freed with timer_free()
  overall: Remove unnecessary g_strdup_printf() calls

Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
2 months agoMerge tag 'for-upstream' of https://gitlab.com/bonzini/qemu into staging
Stefan Hajnoczi [Fri, 14 Feb 2025 13:18:56 +0000 (08:18 -0500)]
Merge tag 'for-upstream' of https://gitlab.com/bonzini/qemu into staging

* rust: more qdev bindings
* rust: HPET device model with timer and GPIO bindings
* rust: small cleanups and fixes; run doctests during CI
* ui/sdl2: reenable the SDL2 Windows keyboard hook procedure

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# gpg:                using RSA key F13338574B662389866C7682BFFBD25F78C7AE83
# gpg:                issuer "pbonzini@redhat.com"
# gpg: Good signature from "Paolo Bonzini <bonzini@gnu.org>" [full]
# gpg:                 aka "Paolo Bonzini <pbonzini@redhat.com>" [full]
# Primary key fingerprint: 46F5 9FBD 57D6 12E7 BFD4  E2F7 7E15 100C CD36 69B1
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* tag 'for-upstream' of https://gitlab.com/bonzini/qemu: (27 commits)
  ui/sdl2: reenable the SDL2 Windows keyboard hook procedure
  rust: fix doctests
  rust: vmstate: remove redundant link targets
  rust: qemu_api: add a documentation header for all modules
  i386: enable rust hpet for pc when rust is enabled
  rust/timer/hpet: add qom and qdev APIs support
  rust/timer/hpet: add basic HPET timer and HPETState
  rust/timer/hpet: define hpet_fw_cfg
  rust: add bindings for timer
  rust: add bindings for memattrs
  rust: add bindings for gpio_{in|out} initialization
  rust/irq: Add a helper to convert [InterruptSource] to pointer
  rust/qdev: add the macro to define bit property
  i386/fw_cfg: move hpet_cfg definition to hpet.c
  rust: pl011: convert pl011_create to safe Rust
  rust: chardev, qdev: add bindings to qdev_prop_set_chr
  rust: irq: define ObjectType for IRQState
  rust: bindings for MemoryRegionOps
  rust: bindings: add Send and Sync markers for types that have bindings
  rust: qdev: switch from legacy reset to Resettable
  ...

Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
2 months agomake-release: don't rely on $CWD when excluding subproject directories
Michael Roth [Thu, 13 Feb 2025 23:53:20 +0000 (17:53 -0600)]
make-release: don't rely on $CWD when excluding subproject directories

The current logic scans qemu.git/subprojects/ from *.wrap files to
determine whether or not to include the associated directories in the
release tarballs. However, the script assumes that it is being run from
the top-level of the source directory, which may not always be the case.
In particular, when generating releases via, e.g.:

  make qemu-9.2.1.tar.xz

the $CWD will either be an arbitrary external build directory, or
qemu.git/build, and the exclusions will not be processed as expected.
Fix this by using the $src parameter passed to the script as the root
directory for the various subproject/ paths referenced by this logic.

Also, the error case at the beginning of the subproject_dir() will not
result in the error message being printed, and will instead produce an
error message about "error" not being a valid command. Fix this by using
basic shell commands.

Fixes: be27b5149c86 ("make-release: only leave tarball of wrap-file subprojects")
Cc: Paolo Bonzini <pbonzini@redhat.com>
Cc: Michael Tokarev <mjt@tls.msk.ru>
Cc: qemu-stable@nongnu.org
Signed-off-by: Michael Roth <michael.roth@amd.com>
Signed-off-by: Michael Tokarev <mjt@tls.msk.ru>
2 months agotarget/riscv: Fix minor whitespace issue in riscv_cpu_properties
Rob Bradford [Fri, 7 Feb 2025 15:28:23 +0000 (15:28 +0000)]
target/riscv: Fix minor whitespace issue in riscv_cpu_properties

The mvendorid/mimpid/marchid properties have the wrong amount of
whitespace ahead of them.

Signed-off-by: Rob Bradford <rbradford@rivosinc.com>
Reviewed-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
Signed-off-by: Michael Tokarev <mjt@tls.msk.ru>
2 months agoqemu/timer: Clarify timer_new*() must be freed with timer_free()
Philippe Mathieu-Daudé [Sat, 25 Jan 2025 18:24:24 +0000 (19:24 +0100)]
qemu/timer: Clarify timer_new*() must be freed with timer_free()

There was not mention QEMUTimer created with timer_new*() must
be released with timer_free() instead of g_free(), because then
active timers are removed from the active list. Update the
documentation mentioning timer_free().

Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Daniel P. Berrangé <berrange@redhat.com>
Reviewed-by: Michael Tokarev <mjt@tls.msk.ru>
Signed-off-by: Michael Tokarev <mjt@tls.msk.ru>
2 months agooverall: Remove unnecessary g_strdup_printf() calls
Philippe Mathieu-Daudé [Thu, 30 Jan 2025 10:57:43 +0000 (11:57 +0100)]
overall: Remove unnecessary g_strdup_printf() calls

Replace g_strdup_printf("%s", value) -> g_strdup(value)
to avoid unnecessary string formatting.

Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Daniel P. Berrangé <berrange@redhat.com>
Reviewed-by: Stefan Hajnoczi <stefanha@redhat.com>
Reviewed-by: Michael Tokarev <mjt@tls.msk.ru>
Signed-off-by: Michael Tokarev <mjt@tls.msk.ru>
2 months agoMerge tag 'tracing-pull-request' of https://gitlab.com/stefanha/qemu into staging
Stefan Hajnoczi [Thu, 13 Feb 2025 16:23:57 +0000 (11:23 -0500)]
Merge tag 'tracing-pull-request' of https://gitlab.com/stefanha/qemu into staging

Pull request

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# gpg:                using RSA key 8695A8BFD3F97CDAAC35775A9CA4ABB381AB73C8
# gpg: Good signature from "Stefan Hajnoczi <stefanha@redhat.com>" [ultimate]
# gpg:                 aka "Stefan Hajnoczi <stefanha@gmail.com>" [ultimate]
# Primary key fingerprint: 8695 A8BF D3F9 7CDA AC35  775A 9CA4 ABB3 81AB 73C8

* tag 'tracing-pull-request' of https://gitlab.com/stefanha/qemu:
  scripts: improve error from qemu-trace-stap on missing 'stap'

Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
2 months agoui/sdl2: reenable the SDL2 Windows keyboard hook procedure
Volker Rümelin [Tue, 31 Dec 2024 11:59:50 +0000 (12:59 +0100)]
ui/sdl2: reenable the SDL2 Windows keyboard hook procedure

Windows only:

The libSDL2 Windows message loop needs the libSDL2 Windows low
level keyboard hook procedure to grab the left and right Windows
keys correctly. Reenable the SDL2 Windows keyboard hook procedure.

Since SDL2 2.30.4 the SDL2 keyboard hook procedure also filters
out the special left Control key event for every Alt Gr key event
on keyboards with an international layout. This means the QEMU low
level keyboard hook procedure is no longer needed. Remove the QEMU
Windows keyboard hook procedure.

Resolves: https://gitlab.com/qemu-project/qemu/-/issues/2139
Resolves: https://gitlab.com/qemu-project/qemu/-/issues/2323
Signed-off-by: Volker Rümelin <vr_qemu@t-online.de>
Link: https://lore.kernel.org/r/20241231115950.6732-1-vr_qemu@t-online.de
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2 months agorust: fix doctests
Paolo Bonzini [Tue, 11 Feb 2025 12:55:53 +0000 (13:55 +0100)]
rust: fix doctests

Doctests were not being run by CI, and have broken. Fix them.

Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2 months agorust: vmstate: remove redundant link targets
Paolo Bonzini [Thu, 30 Jan 2025 09:55:16 +0000 (10:55 +0100)]
rust: vmstate: remove redundant link targets

Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2 months agorust: qemu_api: add a documentation header for all modules
Paolo Bonzini [Thu, 30 Jan 2025 10:11:18 +0000 (11:11 +0100)]
rust: qemu_api: add a documentation header for all modules

Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2 months agoi386: enable rust hpet for pc when rust is enabled
Zhao Liu [Mon, 10 Feb 2025 03:00:51 +0000 (11:00 +0800)]
i386: enable rust hpet for pc when rust is enabled

Add HPET configuration in PC's Kconfig options, and select HPET device
(Rust version) if Rust is supported.

Signed-off-by: Zhao Liu <zhao1.liu@intel.com>
Link: https://lore.kernel.org/r/20250210030051.2562726-11-zhao1.liu@intel.com
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2 months agorust/timer/hpet: add qom and qdev APIs support
Zhao Liu [Mon, 10 Feb 2025 03:00:50 +0000 (11:00 +0800)]
rust/timer/hpet: add qom and qdev APIs support

Implement QOM & QAPI support for HPET device.

Signed-off-by: Zhao Liu <zhao1.liu@intel.com>
Link: https://lore.kernel.org/r/20250210030051.2562726-10-zhao1.liu@intel.com
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2 months agorust/timer/hpet: add basic HPET timer and HPETState
Zhao Liu [Mon, 10 Feb 2025 03:00:49 +0000 (11:00 +0800)]
rust/timer/hpet: add basic HPET timer and HPETState

Add the HPETTimer and HPETState (HPET timer block), along with their
basic methods and register definitions.

This is in preparation for supporting the QAPI interfaces.

Note, wrap all items in HPETState that may be changed in the callback
called by C code into the BqlCell/BqlRefCell.

Signed-off-by: Zhao Liu <zhao1.liu@intel.com>
Link: https://lore.kernel.org/r/20250210030051.2562726-9-zhao1.liu@intel.com
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2 months agorust/timer/hpet: define hpet_fw_cfg
Zhao Liu [Mon, 10 Feb 2025 03:00:48 +0000 (11:00 +0800)]
rust/timer/hpet: define hpet_fw_cfg

Define HPETFwEntry structure with the same memory layout as
hpet_fw_entry in C.

Further, define the global hpet_cfg variable in Rust which is the
same as the C version. This hpet_cfg variable in Rust will replace
the C version one and allows both Rust code and C code to access it.

The Rust version of hpet_cfg is self-contained, avoiding unsafe
access to C code.

Signed-off-by: Zhao Liu <zhao1.liu@intel.com>
Link: https://lore.kernel.org/r/20250210030051.2562726-8-zhao1.liu@intel.com
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2 months agorust: add bindings for timer
Zhao Liu [Mon, 10 Feb 2025 03:00:47 +0000 (11:00 +0800)]
rust: add bindings for timer

Add timer bindings to help handle idiomatic Rust callbacks.

Additionally, wrap QEMUClockType in ClockType binding to avoid unsafe
calls in device code.

Signed-off-by: Zhao Liu <zhao1.liu@intel.com>
Link: https://lore.kernel.org/r/20250210030051.2562726-7-zhao1.liu@intel.com
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2 months agorust: add bindings for memattrs
Zhao Liu [Sat, 25 Jan 2025 12:51:32 +0000 (20:51 +0800)]
rust: add bindings for memattrs

The MemTxAttrs structure contains bitfield members, and bindgen is
unable to generate an equivalent macro definition for
MEMTXATTRS_UNSPECIFIED.

Therefore, manually define a global constant variable
MEMTXATTRS_UNSPECIFIED to support calls from Rust code.

Signed-off-by: Zhao Liu <zhao1.liu@intel.com>
Link: https://lore.kernel.org/r/20250125125137.1223277-6-zhao1.liu@intel.com
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2 months agorust: add bindings for gpio_{in|out} initialization
Zhao Liu [Mon, 10 Feb 2025 03:00:45 +0000 (11:00 +0800)]
rust: add bindings for gpio_{in|out} initialization

Wrap qdev_init_gpio_{in|out} as methods in DeviceMethods. And for
qdev_init_gpio_in, based on FnCall, it can support idiomatic Rust
callback without the need for C style wrapper.

Signed-off-by: Zhao Liu <zhao1.liu@intel.com>
Link: https://lore.kernel.org/r/20250210030051.2562726-5-zhao1.liu@intel.com
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2 months agorust/irq: Add a helper to convert [InterruptSource] to pointer
Zhao Liu [Mon, 10 Feb 2025 03:00:44 +0000 (11:00 +0800)]
rust/irq: Add a helper to convert [InterruptSource] to pointer

This is useful when taking an InterruptSource slice and passing it to C
function.

Suggested-by: Paolo Bonzini <pbonzini@redhat.com>
Signed-off-by: Zhao Liu <zhao1.liu@intel.com>
Link: https://lore.kernel.org/r/20250210030051.2562726-4-zhao1.liu@intel.com
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2 months agorust/qdev: add the macro to define bit property
Zhao Liu [Mon, 10 Feb 2025 03:00:43 +0000 (11:00 +0800)]
rust/qdev: add the macro to define bit property

HPET device (Rust device) needs to define the bit type property.

Add a variant of define_property macro to define bit type property.

Signed-off-by: Zhao Liu <zhao1.liu@intel.com>
Link: https://lore.kernel.org/r/20250210030051.2562726-3-zhao1.liu@intel.com
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2 months agoi386/fw_cfg: move hpet_cfg definition to hpet.c
Zhao Liu [Mon, 10 Feb 2025 03:00:42 +0000 (11:00 +0800)]
i386/fw_cfg: move hpet_cfg definition to hpet.c

HPET device needs to access and update hpet_cfg variable, but now it is
defined in hw/i386/fw_cfg.c and Rust code can't access it.

Move hpet_cfg definition to hpet.c (and rename it to hpet_fw_cfg). This
allows Rust HPET device implements its own global hpet_fw_cfg variable,
and will further reduce the use of unsafe C code access and calls in the
Rust HPET implementation.

Signed-off-by: Zhao Liu <zhao1.liu@intel.com>
Link: https://lore.kernel.org/r/20250210030051.2562726-2-zhao1.liu@intel.com
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2 months agorust: pl011: convert pl011_create to safe Rust
Paolo Bonzini [Mon, 10 Feb 2025 15:11:58 +0000 (16:11 +0100)]
rust: pl011: convert pl011_create to safe Rust

Not a major change but, as a small but significant step in creating
qdev bindings, show how pl011_create can be written without "unsafe"
calls (apart from converting pointers to references).

This also provides a starting point for creating Error** bindings.

Reviewed-by: Zhao Liu <zhao1.liu@intel.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2 months agorust: chardev, qdev: add bindings to qdev_prop_set_chr
Paolo Bonzini [Mon, 3 Feb 2025 10:04:07 +0000 (11:04 +0100)]
rust: chardev, qdev: add bindings to qdev_prop_set_chr

Because the argument to the function is an Owned<Chardev>, this also
adds an ObjectType implementation to Chardev.

Reviewed-by: Zhao Liu <zhao1.liu@intel.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2 months agorust: irq: define ObjectType for IRQState
Paolo Bonzini [Mon, 3 Feb 2025 10:04:07 +0000 (11:04 +0100)]
rust: irq: define ObjectType for IRQState

This is a small preparation in order to use an Owned<IRQState> for the argument
to sysbus_connect_irq.

Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2 months agorust: bindings for MemoryRegionOps
Paolo Bonzini [Fri, 17 Jan 2025 17:14:25 +0000 (18:14 +0100)]
rust: bindings for MemoryRegionOps

Reviewed-by: Zhao Liu <zhao1.liu@intel.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2 months agorust: bindings: add Send and Sync markers for types that have bindings
Paolo Bonzini [Fri, 13 Dec 2024 16:09:35 +0000 (17:09 +0100)]
rust: bindings: add Send and Sync markers for types that have bindings

This is needed for the MemoryRegionOps<T> to be declared as static;
Rust requires static elements to be Sync.

Reviewed-by: Zhao Liu <zhao1.liu@intel.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2 months agorust: qdev: switch from legacy reset to Resettable
Paolo Bonzini [Fri, 17 Jan 2025 10:26:48 +0000 (11:26 +0100)]
rust: qdev: switch from legacy reset to Resettable

Reviewed-by: Zhao Liu <zhao1.liu@intel.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2 months agorust: qdev: make ObjectImpl a supertrait of DeviceImpl
Paolo Bonzini [Tue, 7 Jan 2025 11:01:18 +0000 (12:01 +0100)]
rust: qdev: make ObjectImpl a supertrait of DeviceImpl

In practice it has to be implemented always in order to access an
implementation of ClassInitImpl<ObjectClass>.  Make the relationship
explicit in the code.

Reviewed-by: Zhao Liu <zhao1.liu@intel.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2 months agorust: qom: allow initializing interface vtables
Paolo Bonzini [Fri, 17 Jan 2025 10:23:14 +0000 (11:23 +0100)]
rust: qom: allow initializing interface vtables

Unlike regular classes, interface vtables can only be obtained via
object_class_dynamic_cast.  Provide a wrapper that allows accessing
the vtable and pass it to a ClassInitImpl implementation, for example
ClassInitImpl<ResettableClass>.

Reviewed-by: Zhao Liu <zhao1.liu@intel.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2 months agorust: qdev: add clock creation
Paolo Bonzini [Fri, 17 Jan 2025 10:21:26 +0000 (11:21 +0100)]
rust: qdev: add clock creation

Add a Rust version of qdev_init_clock_in, which can be used in
instance_init.  There are a couple differences with the C
version:

- in Rust the object keeps its own reference to the clock (in addition to
  the one embedded in the NamedClockList), and the reference is dropped
  automatically by instance_finalize(); this is encoded in the signature
  of DeviceClassMethods::init_clock_in, which makes the lifetime of the
  clock independent of that of the object it holds.  This goes unnoticed
  in the C version and is due to the existence of aliases.

- also, anything that happens during instance_init uses the pinned_init
  framework to operate on a partially initialized object, and is done
  through class methods (i.e. through DeviceClassMethods rather than
  DeviceMethods) because the device does not exist yet.  Therefore, Rust
  code *must* create clocks from instance_init, which is stricter than C.

Reviewed-by: Zhao Liu <zhao1.liu@intel.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2 months agorust: callbacks: allow passing optional callbacks as ()
Paolo Bonzini [Fri, 6 Dec 2024 16:08:49 +0000 (17:08 +0100)]
rust: callbacks: allow passing optional callbacks as ()

In some cases, callbacks are optional.  Using "Some(function)" and "None"
does not work well, because when someone writes "None" the compiler does
not know what to use for "F" in "Option<F>".

Therefore, adopt () to mean a "null" callback.  It is possible to enforce
that a callback is valid by adding a "let _: () = F::ASSERT_IS_SOME" before
the invocation of F::call.

Reviewed-by: Zhao Liu <zhao1.liu@intel.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2 months agorust: qom: add object creation functionality
Paolo Bonzini [Thu, 31 Oct 2024 13:27:36 +0000 (14:27 +0100)]
rust: qom: add object creation functionality

The basic object lifecycle test can now be implemented using safe code!

Reviewed-by: Zhao Liu <zhao1.liu@intel.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2 months agorust: qom: add reference counting functionality
Paolo Bonzini [Fri, 17 Jan 2025 11:00:01 +0000 (12:00 +0100)]
rust: qom: add reference counting functionality

Add a smart pointer that allows to add and remove references from
QOM objects.  It's important to note that while all QOM objects have a
reference count, in practice not all of them have their lifetime guarded
by it.  Embedded objects, specifically, are confined to the lifetime of
the owner.

When writing Rust bindings this is important, because embedded objects are
*never* used through the "Owned<>" smart pointer that is introduced here.

Reviewed-by: Zhao Liu <zhao1.liu@intel.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2 months agorust: docs: document naming convention
Paolo Bonzini [Thu, 13 Feb 2025 11:12:43 +0000 (12:12 +0100)]
rust: docs: document naming convention

As agreed in the "vtables and procedural macros" thread on
the mailing list.

Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2 months agoscripts: improve error from qemu-trace-stap on missing 'stap'
Daniel P. Berrangé [Fri, 6 Dec 2024 11:45:24 +0000 (11:45 +0000)]
scripts: improve error from qemu-trace-stap on missing 'stap'

If the 'stap' binary is missing in $PATH, a huge trace is thrown

  $ qemu-trace-stap list /usr/bin/qemu-system-x86_64
  Traceback (most recent call last):
  File "/usr/bin/qemu-trace-stap", line 169, in <module>
  main()
  File "/usr/bin/qemu-trace-stap", line 165, in main
  args.func(args)
  File "/usr/bin/qemu-trace-stap", line 83, in cmd_run
  subprocess.call(stapargs)
  File "/usr/lib64/python3.12/subprocess.py", line 389, in call
  with Popen(*popenargs, **kwargs) as p:
  ^^^^^^^^^^^^^^^^^^^^^^^^^^^
  File "/usr/lib64/python3.12/subprocess.py", line 1026, in {}init{}
  self._execute_child(args, executable, preexec_fn, close_fds,
  File "/usr/lib64/python3.12/subprocess.py", line 1955, in _execute_child
  raise child_exception_type(errno_num, err_msg, err_filename)
  FileNotFoundError: [Errno 2] No such file or directory: 'stap'

With this change the user now gets

  $ qemu-trace-stap list /usr/bin/qemu-system-x86_64
  Unable to find 'stap' in $PATH

Signed-off-by: Daniel P. Berrangé <berrange@redhat.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-id: 20241206114524.1666664-1-berrange@redhat.com
Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
2 months agoMerge tag 'pull-loongarch-20250212' of https://gitlab.com/bibo-mao/qemu into staging
Stefan Hajnoczi [Wed, 12 Feb 2025 14:16:36 +0000 (09:16 -0500)]
Merge tag 'pull-loongarch-20250212' of https://gitlab.com/bibo-mao/qemu into staging

loongarch queue

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# gpg: Good signature from "bibo mao <maobibo@loongson.cn>" [unknown]
# gpg: WARNING: This key is not certified with a trusted signature!
# gpg:          There is no indication that the signature belongs to the owner.
# Primary key fingerprint: 7044 3A00 19C0 E97A 31C7  13C4 8E86 8FB7 A176 9D4C
#      Subkey fingerprint: 0D86 42A3 A265 9F80 B0B3  D1A4 1F7B 0C12 51AC E7D1

* tag 'pull-loongarch-20250212' of https://gitlab.com/bibo-mao/qemu:
  hw/loongarch/virt: CPU irq line connection improvement
  hw/loongarch/virt: Remove unused ipistate
  hw/loongarch/virt: Set iocsr address space when CPU is created
  hw/loongarch/virt: Add separate file for fdt building
  hw/loongarch/virt: Rename function prefix name
  hw/loongarch/virt: Rename filename acpi-build with virt-acpi-build

Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
2 months agoMerge tag 'pull-nbd-2025-02-11' of https://repo.or.cz/qemu/ericb into staging
Stefan Hajnoczi [Wed, 12 Feb 2025 13:48:44 +0000 (08:48 -0500)]
Merge tag 'pull-nbd-2025-02-11' of https://repo.or.cz/qemu/ericb into staging

NBD patches for 2025-02-11

- Add --handshake-limit option to qemu-nbd

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# gpg:                using RSA key 71C2CC22B1C4602927D2F3AAA7A16B4A2527436A
# gpg: Good signature from "Eric Blake <eblake@redhat.com>" [full]
# gpg:                 aka "Eric Blake (Free Software Programmer) <ebb9@byu.net>" [full]
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# Primary key fingerprint: 71C2 CC22 B1C4 6029 27D2  F3AA A7A1 6B4A 2527 436A

* tag 'pull-nbd-2025-02-11' of https://repo.or.cz/qemu/ericb:
  nbd/server: Allow users to adjust handshake limit in QMP
  qemu-nbd: Allow users to adjust handshake limit

Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
2 months agoMerge tag 'pull-target-arm-20250211' of https://git.linaro.org/people/pmaydell/qemu...
Stefan Hajnoczi [Wed, 12 Feb 2025 13:48:33 +0000 (08:48 -0500)]
Merge tag 'pull-target-arm-20250211' of https://git.linaro.org/people/pmaydell/qemu-arm into staging

target-arm queue:
 * target/alpha: Don't corrupt error_code with unknown softfloat flags
 * target/arm: Implement FEAT_AFP and FEAT_RPRES

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# gpg:                issuer "peter.maydell@linaro.org"
# gpg: Good signature from "Peter Maydell <peter.maydell@linaro.org>" [full]
# gpg:                 aka "Peter Maydell <pmaydell@gmail.com>" [full]
# gpg:                 aka "Peter Maydell <pmaydell@chiark.greenend.org.uk>" [full]
# gpg:                 aka "Peter Maydell <peter@archaic.org.uk>" [unknown]
# Primary key fingerprint: E1A5 C593 CD41 9DE2 8E83  15CF 3C25 25ED 1436 0CDE

* tag 'pull-target-arm-20250211' of https://git.linaro.org/people/pmaydell/qemu-arm: (68 commits)
  target/arm: Sink fp_status and fpcr access into do_fmlal*
  target/arm: Read fz16 from env->vfp.fpcr
  target/arm: Simplify DO_VFP_cmp in vfp_helper.c
  target/arm: Simplify fp_status indexing in mve_helper.c
  target/arm: Remove fp_status_a32
  target/arm: Remove fp_status_a64
  target/arm: Remove fp_status_f16_a32
  target/arm: Remove fp_status_f16_a64
  target/arm: Remove ah_fp_status
  target/arm: Remove ah_fp_status_f16
  target/arm: Remove standard_fp_status
  target/arm: Remove standard_fp_status_f16
  target/arm: Introduce CPUARMState.vfp.fp_status[]
  target/arm: Enable FEAT_RPRES for -cpu max
  target/arm: Implement increased precision FRSQRTE
  target/arm: Implement increased precision FRECPE
  target/arm: Plumb FEAT_RPRES frecpe and frsqrte through to new helper
  target/arm: Enable FEAT_AFP for '-cpu max'
  target/arm: Handle FPCR.AH in SVE FMLSLB, FMLSLT (vectors)
  target/arm: Handle FPCR.AH in SVE FMLSL (indexed)
  ...

Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
2 months agoMerge tag 'pull-vfio-20250211' of https://github.com/legoater/qemu into staging
Stefan Hajnoczi [Wed, 12 Feb 2025 13:48:07 +0000 (08:48 -0500)]
Merge tag 'pull-vfio-20250211' of https://github.com/legoater/qemu into staging

vfio queue:

* Coverity fix
* IGD cleanups using VFIOQuirk
* SIGSEV fix in IOMMUFD host IOMMU device
* Improved error reporting for MMIO region mapping failures

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# gpg:                using RSA key A0F66548F04895EBFE6B0B6051A343C7CFFBECA1
# gpg: Good signature from "Cédric Le Goater <clg@redhat.com>" [full]
# gpg:                 aka "Cédric Le Goater <clg@kaod.org>" [full]
# Primary key fingerprint: A0F6 6548 F048 95EB FE6B  0B60 51A3 43C7 CFFB ECA1

* tag 'pull-vfio-20250211' of https://github.com/legoater/qemu:
  vfio: Remove superfluous error report in vfio_listener_region_add()
  vfio: Remove reports of DMA mapping errors in backends
  vfio: Improve error reporting when MMIO region mapping fails
  vfio: Introduce vfio_get_vfio_device()
  vfio: Rephrase comment in vfio_listener_region_add() error path
  vfio/pci: Replace "iommu_device" by "vIOMMU"
  util/error: Introduce warn_report_err_once()
  vfio/iommufd: Fix SIGSEV in iommufd_cdev_attach()
  vfio/igd: use VFIOConfigMirrorQuirk for mirrored registers
  vfio/pci: introduce config_offset field in VFIOConfigMirrorQuirk
  vfio/pci: declare generic quirks in a new header file
  vfio/igd: Fix potential overflow in igd_gtt_memory_size()

Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
2 months agohw/loongarch/virt: CPU irq line connection improvement
Bibo Mao [Wed, 5 Feb 2025 03:36:14 +0000 (11:36 +0800)]
hw/loongarch/virt: CPU irq line connection improvement

Interrupt controller extioi and ipi connect to CPU with irq line method.
With command -smp x, -device la464-loongarch-cpu, smp.cpus is not
accurate for all possible CPU objects, possible_cpu_arch_ids() is used.

Signed-off-by: Bibo Mao <maobibo@loongson.cn>
Reviewed-by: Bibo Mao <maobibo@loongson.cn>
2 months agohw/loongarch/virt: Remove unused ipistate
Bibo Mao [Wed, 5 Feb 2025 03:36:13 +0000 (11:36 +0800)]
hw/loongarch/virt: Remove unused ipistate

Field ipistate in LoongArch CPU object is not used any more,
remove it here.

Signed-off-by: Bibo Mao <maobibo@loongson.cn>
Reviewed-by: Bibo Mao <maobibo@loongson.cn>
2 months agohw/loongarch/virt: Set iocsr address space when CPU is created
Bibo Mao [Wed, 5 Feb 2025 03:36:12 +0000 (11:36 +0800)]
hw/loongarch/virt: Set iocsr address space when CPU is created

There is only one iocsr address space for the whole virt-machine
board. When CPU is created, the one of percpu points to that of
the board.

Here set iocsr address space when CPU is created rather than IPI
creation stage.

Signed-off-by: Bibo Mao <maobibo@loongson.cn>
Reviewed-by: Bibo Mao <maobibo@loongson.cn>
2 months agohw/loongarch/virt: Add separate file for fdt building
Bibo Mao [Sat, 8 Feb 2025 07:06:55 +0000 (15:06 +0800)]
hw/loongarch/virt: Add separate file for fdt building

Similiar with virt-acpi-build.c, file virt-fdt-build.c is added here.
And move functions relative with fdt table building to the file.

It is only code movement and there is no function change.

Signed-off-by: Bibo Mao <maobibo@loongson.cn>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Tested-by: Philippe Mathieu-Daudé <philmd@linaro.org>
2 months agohw/loongarch/virt: Rename function prefix name
Bibo Mao [Sat, 8 Feb 2025 07:06:54 +0000 (15:06 +0800)]
hw/loongarch/virt: Rename function prefix name

Replace function prefix name loongarch_xxx with virt_xxx in file
virt-acpi-build.c

Signed-off-by: Bibo Mao <maobibo@loongson.cn>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Tested-by: Philippe Mathieu-Daudé <philmd@linaro.org>
2 months agohw/loongarch/virt: Rename filename acpi-build with virt-acpi-build
Bibo Mao [Sat, 8 Feb 2025 07:06:53 +0000 (15:06 +0800)]
hw/loongarch/virt: Rename filename acpi-build with virt-acpi-build

File acpi-build.c is relative with virt machine type, rename it with
virt-acpi-build.c

Signed-off-by: Bibo Mao <maobibo@loongson.cn>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Tested-by: Philippe Mathieu-Daudé <philmd@linaro.org>
2 months agonbd/server: Allow users to adjust handshake limit in QMP
Eric Blake [Mon, 3 Feb 2025 22:26:07 +0000 (16:26 -0600)]
nbd/server: Allow users to adjust handshake limit in QMP

Although defaulting the handshake limit to 10 seconds was a nice QoI
change to weed out intentionally slow clients, it can interfere with
integration testing done with manual NBD_OPT commands over 'nbdsh
--opt-mode'.  Expose a QMP knob 'handshake-max-secs' to allow the user
to alter the timeout away from the default.

The parameter name here intentionally matches the spelling of the
constant added in commit fb1c2aaa98, and not the command-line spelling
added in the previous patch for qemu-nbd; that's because in QMP,
longer names serve as good self-documentation, and unlike the command
line, machines don't have problems generating longer spellings.

Signed-off-by: Eric Blake <eblake@redhat.com>
Message-ID: <20250203222722.650694-6-eblake@redhat.com>
[eblake: s/max-secs/max-seconds/ in QMP]
Acked-by: Markus Armbruster <armbru@redhat.com>
Reviewed-by: Vladimir Sementsov-Ogievskiy <vsementsov@yandex-team.ru>
2 months agoqemu-nbd: Allow users to adjust handshake limit
Eric Blake [Mon, 3 Feb 2025 22:26:06 +0000 (16:26 -0600)]
qemu-nbd: Allow users to adjust handshake limit

Although defaulting the handshake limit to 10 seconds was a nice QoI
change to weed out intentionally slow clients, it can interfere with
integration testing done with manual NBD_OPT commands over 'nbdsh
--opt-mode'.  Expose a command line option to allow the user to alter
the timeout away from the default.  This option is unlikely to be used
in enough scenarios to warrant a short option letter.

The option --handshake-limit intentionally differs from the name of
the constant added in commit fb1c2aaa98 (limit instead of max_secs)
and the QMP name to be added in the next commit; this is because
typing a longer command-line name is undesirable and there is
sufficient --help text to document the units.

Signed-off-by: Eric Blake <eblake@redhat.com>
Message-ID: <20250203222722.650694-5-eblake@redhat.com>
Reviewed-by: Vladimir Sementsov-Ogievskiy <vsementsov@yandex-team.ru>
2 months agoMerge tag 'pull-request-2025-02-11' of https://gitlab.com/thuth/qemu into staging
Stefan Hajnoczi [Tue, 11 Feb 2025 18:27:31 +0000 (13:27 -0500)]
Merge tag 'pull-request-2025-02-11' of https://gitlab.com/thuth/qemu into staging

* Convert more avocado tests to the functional framework
* Add a test for the sam460ex machine
* Fix the broken FreeBSD CI job by updating it to the latest version

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# -----END PGP SIGNATURE-----
# gpg: Signature made Tue 11 Feb 2025 07:28:26 EST
# gpg:                using RSA key 27B88847EEE0250118F3EAB92ED9D774FE702DB5
# gpg:                issuer "thuth@redhat.com"
# gpg: Good signature from "Thomas Huth <th.huth@gmx.de>" [full]
# gpg:                 aka "Thomas Huth <thuth@redhat.com>" [full]
# gpg:                 aka "Thomas Huth <huth@tuxfamily.org>" [full]
# gpg:                 aka "Thomas Huth <th.huth@posteo.de>" [unknown]
# Primary key fingerprint: 27B8 8847 EEE0 2501 18F3  EAB9 2ED9 D774 FE70 2DB5

* tag 'pull-request-2025-02-11' of https://gitlab.com/thuth/qemu:
  gitlab-ci.d/cirrus: Update the FreeBSD job to v14.2
  gitlab: use new(ish) cirrus-vars command for creating config
  gitlab: don't fail cirrus CI jobs when credits are exhausted
  tests/functional: Add a ppc sam460ex test
  tests/functional: Convert the hotplug_blk avocado test
  tests/functional/test_aarch64_virt: Fix vulkan test without egl-headless
  tests/functional: Convert the aarch64 xen test to the functional framework

Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
2 months agotarget/arm: Sink fp_status and fpcr access into do_fmlal*
Richard Henderson [Sat, 1 Feb 2025 16:40:12 +0000 (16:40 +0000)]
target/arm: Sink fp_status and fpcr access into do_fmlal*

Sink common code from the callers into do_fmlal
and do_fmlal_idx.  Reorder the arguments to minimize
the re-sorting from the caller's arguments.

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20250129013857.135256-35-richard.henderson@linaro.org
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2 months agotarget/arm: Read fz16 from env->vfp.fpcr
Richard Henderson [Sat, 1 Feb 2025 16:40:11 +0000 (16:40 +0000)]
target/arm: Read fz16 from env->vfp.fpcr

Read the bit from the source, rather than from the proxy via
get_flush_inputs_to_zero.  This makes it clear that it does
not matter which of the float_status structures is used.

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20250129013857.135256-34-richard.henderson@linaro.org
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2 months agotarget/arm: Simplify DO_VFP_cmp in vfp_helper.c
Richard Henderson [Sat, 1 Feb 2025 16:40:10 +0000 (16:40 +0000)]
target/arm: Simplify DO_VFP_cmp in vfp_helper.c

Pass ARMFPStatusFlavour index instead of fp_status[FOO].

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-id: 20250129013857.135256-17-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2 months agotarget/arm: Simplify fp_status indexing in mve_helper.c
Richard Henderson [Sat, 1 Feb 2025 16:40:09 +0000 (16:40 +0000)]
target/arm: Simplify fp_status indexing in mve_helper.c

Select on index instead of pointer.
No functional change.

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-id: 20250129013857.135256-16-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2 months agotarget/arm: Remove fp_status_a32
Richard Henderson [Sat, 1 Feb 2025 16:40:08 +0000 (16:40 +0000)]
target/arm: Remove fp_status_a32

Replace with fp_status[FPST_A32].  As this was the last of the
old structures, we can remove the anonymous union and struct.

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-id: 20250129013857.135256-15-richard.henderson@linaro.org
[PMM: tweak to account for change to is_ebf()]
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2 months agotarget/arm: Remove fp_status_a64
Richard Henderson [Sat, 1 Feb 2025 16:40:07 +0000 (16:40 +0000)]
target/arm: Remove fp_status_a64

Replace with fp_status[FPST_A64].

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-id: 20250129013857.135256-14-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2 months agotarget/arm: Remove fp_status_f16_a32
Richard Henderson [Sat, 1 Feb 2025 16:40:06 +0000 (16:40 +0000)]
target/arm: Remove fp_status_f16_a32

Replace with fp_status[FPST_A32_F16].

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-id: 20250129013857.135256-13-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2 months agotarget/arm: Remove fp_status_f16_a64
Richard Henderson [Sat, 1 Feb 2025 16:40:05 +0000 (16:40 +0000)]
target/arm: Remove fp_status_f16_a64

Replace with fp_status[FPST_A64_F16].

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-id: 20250129013857.135256-12-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2 months agotarget/arm: Remove ah_fp_status
Richard Henderson [Sat, 1 Feb 2025 16:40:04 +0000 (16:40 +0000)]
target/arm: Remove ah_fp_status

Replace with fp_status[FPST_AH].

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-id: 20250129013857.135256-11-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2 months agotarget/arm: Remove ah_fp_status_f16
Richard Henderson [Sat, 1 Feb 2025 16:40:03 +0000 (16:40 +0000)]
target/arm: Remove ah_fp_status_f16

Replace with fp_status[FPST_AH_F16].

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-id: 20250129013857.135256-10-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2 months agotarget/arm: Remove standard_fp_status
Richard Henderson [Sat, 1 Feb 2025 16:40:02 +0000 (16:40 +0000)]
target/arm: Remove standard_fp_status

Replace with fp_status[FPST_STD].

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-id: 20250129013857.135256-9-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2 months agotarget/arm: Remove standard_fp_status_f16
Richard Henderson [Sat, 1 Feb 2025 16:40:01 +0000 (16:40 +0000)]
target/arm: Remove standard_fp_status_f16

Replace with fp_status[FPST_STD_F16].

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-id: 20250129013857.135256-8-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2 months agotarget/arm: Introduce CPUARMState.vfp.fp_status[]
Richard Henderson [Sat, 1 Feb 2025 16:40:00 +0000 (16:40 +0000)]
target/arm: Introduce CPUARMState.vfp.fp_status[]

Move ARMFPStatusFlavour to cpu.h with which to index
this array.  For now, place the array in an anonymous
union with the existing structures.  Adjust the order
of the existing structures to match the enum.

Simplify fpstatus_ptr() using the new array.

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-id: 20250129013857.135256-7-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2 months agotarget/arm: Enable FEAT_RPRES for -cpu max
Peter Maydell [Sat, 1 Feb 2025 16:39:59 +0000 (16:39 +0000)]
target/arm: Enable FEAT_RPRES for -cpu max

Now the emulation is complete, we can enable FEAT_RPRES for the 'max'
CPU type.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
2 months agotarget/arm: Implement increased precision FRSQRTE
Peter Maydell [Sat, 1 Feb 2025 16:39:58 +0000 (16:39 +0000)]
target/arm: Implement increased precision FRSQRTE

Implement the increased precision variation of FRSQRTE.  In the
pseudocode this corresponds to the handling of the
"increasedprecision" boolean in the FPRSqrtEstimate() and
RecipSqrtEstimate() functions.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
2 months agotarget/arm: Implement increased precision FRECPE
Peter Maydell [Sat, 1 Feb 2025 16:39:57 +0000 (16:39 +0000)]
target/arm: Implement increased precision FRECPE

Implement the increased precision variation of FRECPE.  In the
pseudocode this corresponds to the handling of the
"increasedprecision" boolean in the FPRecipEstimate() and
RecipEstimate() functions.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
2 months agotarget/arm: Plumb FEAT_RPRES frecpe and frsqrte through to new helper
Peter Maydell [Sat, 1 Feb 2025 16:39:56 +0000 (16:39 +0000)]
target/arm: Plumb FEAT_RPRES frecpe and frsqrte through to new helper

FEAT_RPRES implements an "increased precision" variant of the single
precision FRECPE and FRSQRTE instructions from an 8 bit to a 12
bit mantissa. This applies only when FPCR.AH == 1. Note that the
halfprec and double versions of these insns retain the 8 bit
precision regardless.

In this commit we add all the plumbing to make these instructions
call a new helper function when the increased-precision is in
effect. In the following commit we will provide the actual change
in behaviour in the helpers.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
2 months agotarget/arm: Enable FEAT_AFP for '-cpu max'
Peter Maydell [Sat, 1 Feb 2025 16:39:55 +0000 (16:39 +0000)]
target/arm: Enable FEAT_AFP for '-cpu max'

Now that we have completed the handling for FPCR.{AH,FIZ,NEP}, we
can enable FEAT_AFP for '-cpu max', and document that we support it.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
2 months agotarget/arm: Handle FPCR.AH in SVE FMLSLB, FMLSLT (vectors)
Richard Henderson [Sat, 1 Feb 2025 16:39:54 +0000 (16:39 +0000)]
target/arm: Handle FPCR.AH in SVE FMLSLB, FMLSLT (vectors)

Handle FPCR.AH's requirement to not negate the sign of a NaN in SVE
FMLSL (indexed), using the usual trick of negating by XOR when AH=0
and by muladd flags when AH=1.

Since we have the CPUARMState* in the helper anyway, we can
look directly at env->vfp.fpcr and don't need toa pass in the
FPCR.AH value via the SIMD data word.

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20250129013857.135256-33-richard.henderson@linaro.org
[PMM: tweaked commit message]
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2 months agotarget/arm: Handle FPCR.AH in SVE FMLSL (indexed)
Richard Henderson [Sat, 1 Feb 2025 16:39:53 +0000 (16:39 +0000)]
target/arm: Handle FPCR.AH in SVE FMLSL (indexed)

Handle FPCR.AH's requirement to not negate the sign of a NaN in SVE
FMLSL (indexed), using the usual trick of negating by XOR when AH=0
and by muladd flags when AH=1.

Since we have the CPUARMState* in the helper anyway, we can
look directly at env->vfp.fpcr and don't need toa pass in the
FPCR.AH value via the SIMD data word.

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20250129013857.135256-32-richard.henderson@linaro.org
[PMM: commit message tweaked]
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2 months agotarget/arm: Handle FPCR.AH in FMLSL (by element and vector)
Richard Henderson [Sat, 1 Feb 2025 16:39:52 +0000 (16:39 +0000)]
target/arm: Handle FPCR.AH in FMLSL (by element and vector)

Handle FPCR.AH's requirement to not negate the sign of a NaN
in FMLSL by element and vector, using the usual trick of
negating by XOR when AH=0 and by muladd flags when AH=1.

Since we have the CPUARMState* in the helper anyway, we can
look directly at env->vfp.fpcr and don't need toa pass in the
FPCR.AH value via the SIMD data word.

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20250129013857.135256-31-richard.henderson@linaro.org
[PMM: commit message tweaked]
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2 months agotarget/arm: Handle FPCR.AH in SVE FCMLA
Richard Henderson [Sat, 1 Feb 2025 16:39:51 +0000 (16:39 +0000)]
target/arm: Handle FPCR.AH in SVE FCMLA

The negation step in SVE FCMLA mustn't negate a NaN when FPCR.AH is
set.  Use the same approach as we did for A64 FCMLA of passing in
FPCR.AH and using it to select whether to negate by XOR or by the
muladd negate_product flag.

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20250129013857.135256-28-richard.henderson@linaro.org
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2 months agotarget/arm: Handle FPCR.AH in FCMLA by index
Richard Henderson [Sat, 1 Feb 2025 16:39:50 +0000 (16:39 +0000)]
target/arm: Handle FPCR.AH in FCMLA by index

The negation step in FCMLA by index mustn't negate a NaN when
FPCR.AH is set. Use the same approach as vector FCMLA of
passing in FPCR.AH and using it to select whether to negate
by XOR or by the muladd negate_product flag.

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20250129013857.135256-27-richard.henderson@linaro.org
[PMM: Expanded commit message]
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2 months agotarget/arm: Handle FPCR.AH in vector FCMLA
Richard Henderson [Sat, 1 Feb 2025 16:39:49 +0000 (16:39 +0000)]
target/arm: Handle FPCR.AH in vector FCMLA

The negation step in FCMLA mustn't negate a NaN when FPCR.AH
is set. Handle this by passing FPCR.AH to the helper via the
SIMD data field, and use this to select whether to do the
negation via XOR or via the muladd negate_product flag.

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20250129013857.135256-26-richard.henderson@linaro.org
[PMM: Expanded commit message]
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2 months agotarget/arm: Handle FPCR.AH in SVE FTMAD
Peter Maydell [Sat, 1 Feb 2025 16:39:48 +0000 (16:39 +0000)]
target/arm: Handle FPCR.AH in SVE FTMAD

The negation step in the SVE FTMAD insn mustn't negate a NaN when
FPCR.AH is set.  Pass FPCR.AH to the helper via the SIMD data field,
so we can select the correct behaviour.

Because the operand is known to be negative, negating the operand
is the same as taking the absolute value.  Defer this to the muladd
operation via flags, so that it happens after NaN detection, which
is correct for FPCR.AH.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>