Gerd Hoffmann [Thu, 9 Apr 2015 08:52:19 +0000 (10:52 +0200)]
ipxe: update from
35c53797 to
4e03af8
git shortlog
============
Alex Williamson (1):
[dhcp] Extract timing parameters out to config/dhcp.h
Bernd Wiebelt (1):
[tg3] Add support for BCM57766
Christian Hesse (3):
[intel] Add PCI device IDs for Intel I218-LM and I218-V
[build] Add missing "const" qualifiers
[ath9k] Remove confusing logic inversion in an ANI variable
Christian Nilsson (1):
[bios] Add ANSI blink attribute
Daniel Pieczko (1):
[prefix] Use correct register for KEEP_IT_REAL physical address conversion
Ed Swierk (1):
[intel] Update PCI device IDs for Intel 82599 and X540 10G NICs
Fabrice Bacchella (2):
[efi] Improve NII driver logging
[efi] Work around bugs in Emulex NII driver
Laszlo Ersek (1):
[virtio] Downgrade per-iobuf debug messages to DBGC2
Michael Brown (284):
[device] Provide a driver-private data field for root devices
[iobuf] Add iob_split() to split an I/O buffer into portions
[rndis] Add generic RNDIS device abstraction
[hyperv] Add support for Hyper-V hypervisor
[hyperv] Add support for VMBus devices
[hyperv] Add support for NetVSC paravirtual network devices
[rndis] Send RNDIS_INITIALISE_MSG
[rndis] Send RNDIS_HALT_MSG
[hyperv] Tear down NetVSC RX buffer GPADL after closing VMBus device
[rndis] Clear receive filter when closing the device
[hyperv] Receive all VMBus messages in a poll
[hyperv] Increase TX ring size
[hyperv] Assume that VMBus xfer page ranges correspond to RNDIS messages
[rndis] Ignore start-of-day RNDIS_INDICATE_STATUS_MSG with status 0x40020006
[hyperv] Tidy up debug output
[hyperv] Require support for VMBus version 3.0 or newer
[build] Include Hyper-V driver in the all-drivers build
[pci] Allow drivers to specify a PCI class
[romprefix] Ensure UNDI loader can be included by all ROM types
[usb] Add basic support for USB devices
[usb] Add basic support for USB hubs
[usb] Add support for xHCI host controllers
[ncm] Add support for CDC-NCM USB Ethernet devices
[usb] Report xHCI host controller events
[ncm] Use large multi-packet buffers by default
[tftp] Explicitly abort connection whenever parent interface is closed
[uri] Allow tftp_uri() to construct a URI with a custom port
[pxe] Use tftp_uri() to construct PXE TFTP URIs
[pxe] Maintain a queue for received PXE UDP packets
[ncm] Reserve headroom in received packets
[usb] Try multiple USB device configurations
[usb] Handle CDC union functional descriptors
[usb] Parse endpoint descriptor bInterval field
[usb] Allow usb_stream() to enforce a terminating short packet
[ecm] Add support for CDC-ECM USB Ethernet devices
[xhci] Delay after (possibly) forcing port link state to RxDetect
[build] Move branding information to config/branding.h
[build] Use PRODUCT_SHORT_NAME for end-user visible strings
[build] Allow product URI to be customised via config/branding.h
[build] Allow error message URI to be customised via config/branding.h
[build] Allow command help text URI to be customised via config/branding.h
[build] Allow setting help text URI to be customised via config/branding.h
[build] Allow product tag line to be customised via config/branding.h
[rndis] Add rndis_rx_err()
[usb] Handle port status changes received after failing to find a driver
[efi] Disallow R_X86_64_32 relocations
[build] Apply the "-fno-PIE -nopie" workaround only to i386 builds
[usb] Provide generic framework for refilling receive endpoints
[usb] Use generic refill framework for USB hub interrupt endpoints
[ecm] Use generic refill framework for bulk IN and interrupt endpoints
[ncm] Use generic refill framework for bulk IN and interrupt endpoints
[libc] Remove unused string functions
[libc] Rewrite string functions
[test] Add self-tests for more string functions
[test] Add constant-length memset() self-tests
[libc] Reduce size of memset()
[usb] Add generic USB network device framework
[ecm] Use generic USB network device framework
[ncm] Use generic USB network device framework
[timer] Rewrite the 8254 Programmable Interval Timer support
[xhci] Leak memory if controller fails to disable slot
[xhci] Abort commands on timeout
[test] Add IPv4 self-tests
[legal] Add missing copyright header to net/ipv4.c
[ipv4] Rewrite inet_aton()
[libc] Rewrite strtoul()
[hyperv] Check for required features
[prefix] Use .bss16 as temporary stack space for calls to install_block
[zbin] Use LZMA compression
[zbin] Perform extra normalisation after completing decompression
[prefix] Call decompressor in flat real mode when DEBUG=libprefix is enabled
[zbin] Allow decompressor to generate debug output via BIOS console
[zbin] Fix check for existence of most recent output byte
[zbin] Remove now-unused unnrv2b.S decompressor
[legal] Update GPLv2 licence text
[legal] Include full licence text for all GPL2_OR_LATER files
[mucurses] Add missing FILE_LICENCE declarations
[legal] Add support for the Unmodified Binary Distribution Licence
[legal] Add UBDL relicensing tool
[legal] Relicense files under GPL2_OR_LATER_OR_UBDL
[legal] Relicense files under GPL2_OR_LATER_OR_UBDL
[legal] Relicense files under GPL2_OR_LATER_OR_UBDL
[legal] Relicense files under GPL2_OR_LATER_OR_UBDL
[libc] Rewrite unrelicensable portions of stddef.h
[libc] Rewrite unrelicensable portions of ctype.h
[libc] Rewrite setjmp() and longjmp()
[libc] Rewrite byte-swapping code
[elf] Rewrite ELF header
[list] Relicense list.h
[iscsi] Rewrite unrelicensable portions of iscsi.c
[pci] Remove outdated and mostly-unused pci_ids.h file
[pci] Rewrite unrelicensable portions of pci.h
[settings] Use list_first_entry() when unregistering child settings
[settings] Rewrite unrelicensable portions of settings.c
[menu] Abstract out the generic concept of a jump scroller
[settings] Use generic jump scrolling abstraction
[malloc] Move valgrind headers out of arch/x86
[malloc] Rewrite unrelicensable portions of malloc.c
[build] Remove unused IMPORT_SYMBOL() and EXPORT_SYMBOL() macros
[build] Remove unused __keepme macro
[pxe] Remove obsolete references to pxeparent_dhcp
[build] Remove obsolete and unused portions of config.c
[build] Use REQUIRE_OBJECT() to drag in per-object configuration
[build] Fix the REQUIRE_SYMBOL mechanism
[i386] Move real_to_user() to realmode.h
[linux] Rewrite headers included in all builds
[retry] Rewrite unrelicensable portions of retry.c
[retry] Colourise debug output
[legal] Relicense files under GPL2_OR_LATER_OR_UBDL
[xhci] Enable USB3 ports on Intel PCH8/PCH9 controllers
[xhci] Undo PCH-specific quirk fixes when removing device
[xen] Set the "feature-rx-notify" flag for netfront devices
[http] Abstract out HTTP Digest hash algorithm operations
[http] Support MD5-sess Digest authentication
[dm96xx] Add driver for Davicom DM96xx USB Ethernet NICs
[legal] Relicense Davicom DM96xx drivers
[mii] Add generic mii_check_link() function
[smsc75xx] Add driver for SMSC/Microchip LAN75xx USB Ethernet NICs
[legal] Relicense files under GPL2_OR_LATER_OR_UBDL
[tcp] Implement support for TCP Selective Acknowledgements (SACK)
[smsc75xx] Move RX FIFO overflow message to DBGLVL_EXTRA
[tcpip] Fix dubious calculation of min_port
[libc] Add ffs(), ffsl(), and ffsll()
[usb] Add the concept of a USB bus maximum transfer size
[ncm] Respect maximum transfer size of the bus
[usb] Add functions for manual device address assignment
[xhci] Forcibly disable SMIs if BIOS fails to release ownership
[autoboot] Match against parent devices when matching by bus type and location
[usb] Add config/usb.h for USB configuration options
[xhci] Do not release ownership back to BIOS when booting an OS
[ehci] Add support for EHCI host controllers
[netdevice] Add missing bus types to netdev_fetch_bustype()
[usb] Fix USB timeouts to match specification
[libprefix] Fix building on 64-bit FreeBSD 8.4
[xhci] Ring doorbell as part of endpoint reset
[usb] Reset endpoints without waiting for a new transfer to be enqueued
[usb] Add clear_tt() hub method to clear transaction translator buffer
[usb] Clear transaction translator buffers when applicable
[ehci] Support USB1 devices attached via transaction translators
[usb] Improve debug messages for failed control transactions
[xhci] Support USB1 devices attached via transaction translators
[libc] Fix typo in longjmp()
[libc] Add x86_64 versions of setjmp() and longjmp()
[test] Add setjmp()/longjmp() self-tests
[test] Simplify digest algorithm self-tests
[crypto] Add SHA-224 algorithm
[crypto] Add SHA-512 algorithm
[crypto] Add SHA-384 algorithm
[crypto] Add SHA-512/256 algorithm
[crypto] Add SHA-512/224 algorithm
[efi] Ensure drivers are disconnected when ExitBootServices() is called
[peerdist] Add support for decoding PeerDist Content Information
[xhci] Always reset root hub ports
[romprefix] Allow autoboot device filter to be disabled
[util] Add ability to dump PCI device ID list
[efi] Add EFI entropy source
[efi] Add EFI time source
[efi] Provide a dummy data block in nii_initialise()
[efi] Poll media status only if advertised as supported
[efi] Poll for TX completions only when there is an outstanding TX buffer
[efi] Use the EFI_RNG_PROTOCOL as an entropy source if available
[eepro100] Remove duplicate PCI_ROM() line
[prism2] Remove duplicate PCI_ROM() lines
[build] Allow building PCI ROMs with device ID lists
[build] Fix compiler warning on OpenBSD 5.7
[build] Work around binutils quirk on OpenBSD 5.7
[build] Use a single call to parserom.pl to speed up building
[intel] Report any unexpected interrupt causes
[intel] Force RX polling on VMware emulated 82545em
[realtek] Do not attempt to access EEPROM on RTL8169 chips
[rtl818x] Obviate RTL_ROM() hack
[build] Construct all-drivers list based on driver class
[test] Include IPv6 support when performing settings self-tests
[base16] Add buffer size parameter to base16_encode() and base16_decode()
[base64] Add buffer size parameter to base64_encode() and base64_decode()
[settings] Add "base64" setting type
[vram] Add "vram" built-in setting to dump video RAM
[usb] Include setup packet within I/O buffer for message transfers
[pci] Provide PCI_CLASS() to calculate a scalar PCI class value
[usb] Detect missed disconnections
[usb] Maintain a list of all USB buses
[usb] Maintain single lists of halted endpoints and changed ports
[ehci] Poll child companion controllers after disowning port
[usb] Add find_usb_bus_by_location() helper function
[ehci] Allow UHCI/OHCI controllers to locate the EHCI companion controller
[uhci] Add support for UHCI host controllers
[usb] Provide usb_endpoint_name() for use by host controller drivers
[xhci] Use meaningful device names in debug messages
[ehci] Use meaningful device names in debug messages
[uhci] Use meaningful device names in debug messages
[ipv6] Disambiguate received ICMPv6 errors
[usb] Add USB_INTERRUPT_OUT internal type
[usb] Add generic USB human interface device (HID) framework
[usb] Add basic support for USB keyboards
[usb] Do not call usb_hotplug() when registering a new hub
[usb] Always clear recorded disconnections after performing hotplug actions
[intel] Expose intel_diag() for use by other Intel NIC drivers
[intel] Allow for the use of advanced TX descriptors
[intel] Add support for mailbox used by virtual functions
[intel] Add intelxvf driver for Intel 10 GigE virtual function NICs
[int13con] Add basic ability to log to a local disk via INT 13
[intel] Add intelxvf_stats() to dump packet statistics registers
[intel] Fix operation when physical function has jumbo frames enabled
[neighbour] Return success when deferring a packet
[xhci] Fix length of allocated slot array
[build] Fix .ids.o creation for drivers not in the all-drivers build
[xhci] Fix comparison of signed and unsigned integers
[ipoib] Fix REMAC cache discarder
[xhci] Record device-specific quirks in xHCI device structure
[xhci] Ignore invalid protocol speed ID values on Intel Skylake platforms
[pci] Use flat real mode to call INT 1a,b101
[tcp] Do not shrink window when discarding received packets
[mromprefix] Report a dummy size at offset 0x02 of .mrom payload
[ethernet] Add minimal support for receiving LLC frames
[netdevice] Add a generic concept of a "blocked link"
[stp] Add support for detecting Spanning Tree Protocol non-forwarding ports
[stp] Fix interpretaton of hello time
[dhcp] Defer discovery if link is blocked
[pxe] Always reconstruct packet for PXENV_GET_CACHED_INFO
[serial] Add general abstraction of a 16550-compatible UART
[gdb] Use new UART abstraction in GDB serial transport
[serial] Use new UART abstraction in serial console driver
[ipoib] Mark REMAC cache as expensive
[ipoib] Attempt to generate ARPs as needed to repopulate REMAC cache
[gdb] Allow gdbstub to be started on an arbitrary serial port
[xen] Wait for and clear XenStore event before receiving data
[tcp] Gracefully close connections during shutdown
[ipoib] Transmit multicast packets as broadcasts
[efi] Fix receive and transmit completion reporting
[efi] Allow user experience to be downgraded
[build] Add named configuration for qemu
[tcp] Ensure FIN is actually sent if connection is closed while idle
[fault] Generalise NETDEV_DISCARD_RATE fault injection mechanism
[fault] Add inject_corruption() to randomly corrupt data
[profile] Add profile_custom() for profiling with arbitrary time units
[interface] Add intf_poke() helper
[xfer] Use intf_poke() to implement xfer_window_changed()
[xfer] Add xfer_check_order() utility function
[xferbuf] Generalise to handle umalloc()-based buffers
[xferbuf] Add xfer_buffer() to provide direct access to underlying buffer
[downloader] Use generic data-transfer buffer mechanism
[downloader] Provide direct access to the underlying data transfer buffer
[build] Fix compiler warnings on some gcc versions
[crypto] Add bit-rotation functions for 8-bit and 16-bit values
[802.11] Use correct SHA1_DIGEST_SIZE constant name
[crypto] Add ECB block cipher mode (for debug and self-tests only)
[test] Generalise cipher tests and use okx()
[test] Define shortcuts for frequently-used NIST AES test vectors
[test] Add NIST self-tests for AES128 and AES256 in ECB mode
[crypto] Replace AES implementation
[test] Add NIST self-tests for AES192 in ECB and CBC modes
[crypto] Remove AXTLS headers
[build] Fix strict-aliasing warning on older gcc versions
[ipv6] Treat a missing network device name as "netX"
[netdevice] Avoid using zero as a network device index
[ipv4] Redefine IP address constants to avoid unnecessary byte swapping
[ipv4] Allow IPv4 socket addresses to include a scope ID
[iscsi] Add missing "break" statements
[netdevice] Allow network devices to disclaim IRQ support at runtime
[peerdist] Include trimmed range within content information block
[peerdist] Add support for constructing and decoding discovery messages
[peerdist] Add support for constructing and decoding retrieval messages
[pool] Add a generic concept of a pooled connection
[linebuf] Support buffering of multiple lines
[elf] Reject ELFBoot images requiring virtual addressing
[comboot] Avoid dragging in serial console support unconditionally
[serial] Check for UART existence in uart_select()
[tls] Do not access beyond the end of a 24-bit integer
[tls] Report supported signature algorithms in ClientHello
[crypto] Support SHA-{224,384,512} in X.509 certificates
[efi] Hold off watchdog timer while running
[efi] Add missing "ULL" suffix on 64-bit constant
[block] Add generic block device translator
[http] Rewrite HTTP core to support content encodings
[peerdist] Add segment discovery mechanism
[peerdist] Add individual block download mechanism
[peerdist] Add block download multiplexer
[peerdist] Add support for PeerDist (aka BranchCache) HTTP content encoding
[dhcp] Allow pseudo-DHCP servers to use pseudo-identifiers
[dhcp] Ignore ProxyDHCPACKs without PXE options
[pxe] Warn about PXE NBPs that may be EFI executables
[test] Allow self-tests to report exit status when running under Linux
[image] Detect image type when image is first registered
[autoboot] Display image information as part of the default control flow
Olaf Hering (1):
[build] Sort objects in blib.a
Robin Smidsrød (2):
[vbox] Enable some more features now that we have LZMA compression
[build] Rewrite parserom.pl to support multiple source files
Thomas Miletich (1):
[intel] Add PCI ID for I218-LM
Tufan Karadere (1):
[crypto] Add ASN.1 OIDs for sha{224,384,512}WithRsaEncryption
Wissam Shoukair (2):
[comboot] Implement INT22,0x000c
[ipoib] Fix a race when chain-loading undionly.kpxe in IPoIB
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
Peter Maydell [Tue, 1 Sep 2015 18:42:43 +0000 (19:42 +0100)]
Merge remote-tracking branch 'remotes/mdroth/tags/qga-pull-2015-09-01-v2-tag' into staging
qemu-ga patch queue
* add config file dump/load support for qemu-ga
* various w32 build fixes, particularly WRT to msi package creation
* fixes for msi installer
* w32 support for guest-set-user-password
v2:
* replaced g_list_free_full with g_list_foreach to maintain glib 2.22
compatibility
# gpg: Signature made Tue 01 Sep 2015 19:34:15 BST using RSA key ID
F108B584
# gpg: Good signature from "Michael Roth <flukshun@gmail.com>"
# gpg: aka "Michael Roth <mdroth@utexas.edu>"
# gpg: aka "Michael Roth <mdroth@linux.vnet.ibm.com>"
* remotes/mdroth/tags/qga-pull-2015-09-01-v2-tag: (26 commits)
Makefile: qemu-ga: fix msi target error message
build: qemu-ga: fix VSS dependencies
configure: qemu-ga: explicitly enable qemu-ga MSI support when probed
configure: qemu-ga: move MSI installer probe after qga probe
qemu-ga: implement win32 guest-set-user-password
qga: start a man page
qga: add --dump-conf option
qga: add an optional qemu-ga.conf system configuration
qga: free a bit more
qga: move agent run in a separate function
qga: fill default options in main()
qga: move option parsing to separate function
qga: copy argument strings
qga: rename 'path' to 'channel_path'
qga: make split_list() return allocated strings
qga: move string split in separate function
qga: use exit() when parsing options
qga: misc spelling
configure: qemu-ga: report MSI install support in summary
qemu-ga: Fixed paths issue with MSI build
...
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Michael Roth [Wed, 26 Aug 2015 22:05:01 +0000 (17:05 -0500)]
Makefile: qemu-ga: fix msi target error message
'msi' target reports error if we attempt to use it when QEMU hasn't
been ./configure'd to enable it. The parenthesis cause an interpreter
error if we don't enclose the error in quotes.
Reviewed-by: Marc-André Lureau <marcandre.lureau@redhat.com>
Signed-off-by: Michael Roth <mdroth@linux.vnet.ibm.com>
Michael Roth [Wed, 26 Aug 2015 21:19:41 +0000 (16:19 -0500)]
build: qemu-ga: fix VSS dependencies
Currently VSS dll/tlb files for use in w32 builds are only built as a
result of having been added to the general 'tools' target alongside
qemu-ga. This is fine for default make target, but if we build
qemu-ga directly via `make qemu-ga.exe`, the VSS files are not
created.
Fix this by moving the VSS dependencies to qemu-ga.exe directly.
With this move we can move the VSS files back out of 'tools',
and drop the extra handling from MSI target in Makefile.
Now we can build qemu-ga MSI package with:
./configure ...
make qemu-ga.exe
make msi
or simply:
./configure ...
make msi
and no longer need to do a full build beforehand.
Reviewed-by: Marc-André Lureau <marcandre.lureau@redhat.com>
Signed-off-by: Michael Roth <mdroth@linux.vnet.ibm.com>
Michael Roth [Wed, 26 Aug 2015 16:14:31 +0000 (11:14 -0500)]
configure: qemu-ga: explicitly enable qemu-ga MSI support when probed
Currently, if we don't explicitly disable support for MSI installer
via --disable-guest-agent-msi, the configure variable that tracks
the flag, 'guest_agent_msi', never gets set unless one of the probes
fails. Subsequent code then treats this unset value the same as if it
were a "yes" value (via != "no" style checks).
Instead, set the default "yes" value explicitly after the probes, then
make subsequent code expect the values to be set.
This makes it easier to report on whether or not MSI support was
enabled via probe by looking at the ./configure summary.
Signed-off-by: Michael Roth <mdroth@linux.vnet.ibm.com>
Michael Roth [Wed, 26 Aug 2015 15:49:13 +0000 (10:49 -0500)]
configure: qemu-ga: move MSI installer probe after qga probe
MSI probe assumes that qemu-ga support has been probed already, but in
cases where --enable-guest-agent/--disable-guest-agent have not been
passed to configure, qemu-ga support may end up getting enabled later,
as is the case with w32 builds. This leads to MSI probe prematurely
reporting error due to lack of qemu-ga support.
Fix this by moving MSI installer probe after the final qga probes.
Reviewed-by: Marc-André Lureau <marcandre.lureau@redhat.com>
Signed-off-by: Michael Roth <mdroth@linux.vnet.ibm.com>
Marc-André Lureau [Tue, 30 Jun 2015 14:37:13 +0000 (16:37 +0200)]
qemu-ga: implement win32 guest-set-user-password
Use NetUserSetInfo() to set the user password.
This function is notoriously known to be problematic for users with EFS
encrypted files. But the alternative, NetUserChangePassword() requires
the old password. Nevertheless, The EFS file should be recovered by
changing back to the old password.
Signed-off-by: Marc-André Lureau <marcandre.lureau@gmail.com>
Reviewed-by: Daniel P. Berrange <berrange@redhat.com>
Signed-off-by: Michael Roth <mdroth@linux.vnet.ibm.com>
Marc-André Lureau [Wed, 26 Aug 2015 23:34:59 +0000 (01:34 +0200)]
qga: start a man page
Add a simple man page for the qemu agent.
Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com>
Reviewed-by: Michael Roth <mdroth@linux.vnet.ibm.com>
*squashed in review comments from Eric Blake <eblake@redhat.com>
Reviewed-by: Eric Blake <eblake@redhat.com>
Signed-off-by: Michael Roth <mdroth@linux.vnet.ibm.com>
Marc-André Lureau [Wed, 26 Aug 2015 23:34:58 +0000 (01:34 +0200)]
qga: add --dump-conf option
This new option allows to review the agent configuration,
and ease the task of writing a configuration file.
Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com>
Reviewed-by: Michael Roth <mdroth@linux.vnet.ibm.com>
Reviewed-by: Denis V. Lunev <den@openvz.org>
* removed unecessary keyfile != NULL prior to free
* documented --dump-conf is qemu-ga --help output
Signed-off-by: Michael Roth <mdroth@linux.vnet.ibm.com>
Marc-André Lureau [Wed, 26 Aug 2015 23:34:57 +0000 (01:34 +0200)]
qga: add an optional qemu-ga.conf system configuration
Learn to configure the agent with a system configuration.
This may simplify command-line handling, especially when the blacklist
is long.
Among the other benefits, this may standardize the configuration of an
init service (instead of distro-specific init keys/files)
Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com>
Reviewed-by: Michael Roth <mdroth@linux.vnet.ibm.com>
Reviewed-by: Denis V. Lunev <den@openvz.org>
* removed unecessary keyfile != NULL prior to free
Signed-off-by: Michael Roth <mdroth@linux.vnet.ibm.com>
Marc-André Lureau [Wed, 26 Aug 2015 23:34:56 +0000 (01:34 +0200)]
qga: free a bit more
Now that main() has a single exit point, we can free a few
more allocations.
Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com>
Reviewed-by: Denis V. Lunev <den@openvz.org>
Signed-off-by: Michael Roth <mdroth@linux.vnet.ibm.com>
Marc-André Lureau [Wed, 26 Aug 2015 23:34:55 +0000 (01:34 +0200)]
qga: move agent run in a separate function
Once the options are populated, move the running state to
a run_agent() function.
Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com>
Reviewed-by: Michael Roth <mdroth@linux.vnet.ibm.com>
Reviewed-by: Denis V. Lunev <den@openvz.org>
* fixed up an s/ga_state/s/ artifact causing segfault
* replaced g_list_free_full with g_list_foreach to maintain glib
2.22 compatibility
Signed-off-by: Michael Roth <mdroth@linux.vnet.ibm.com>
Marc-André Lureau [Wed, 26 Aug 2015 23:34:54 +0000 (01:34 +0200)]
qga: fill default options in main()
Fill all default options during main(). This is a preparation patch
to allow to dump the configuration.
Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com>
Reviewed-by: Michael Roth <mdroth@linux.vnet.ibm.com>
Reviewed-by: Denis V. Lunev <den@openvz.org>
Signed-off-by: Michael Roth <mdroth@linux.vnet.ibm.com>
Marc-André Lureau [Wed, 26 Aug 2015 23:34:53 +0000 (01:34 +0200)]
qga: move option parsing to separate function
Move option parsing out of giant main().
Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com>
Reviewed-by: Michael Roth <mdroth@linux.vnet.ibm.com>
Reviewed-by: Denis V. Lunev <den@openvz.org>
Signed-off-by: Michael Roth <mdroth@linux.vnet.ibm.com>
Marc-André Lureau [Wed, 26 Aug 2015 23:34:52 +0000 (01:34 +0200)]
qga: copy argument strings
Following patch will return allocated strings, so we must correctly
initialize alloc & free them. The nice side effect is that we no longer
have to check for "fixed_state_dir" to call ga_install_service() with a
NULL state dir. The default values are set after parsing the command
line options.
Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com>
Reviewed-by: Michael Roth <mdroth@linux.vnet.ibm.com>
Reviewed-by: Denis V. Lunev <den@openvz.org>
Signed-off-by: Michael Roth <mdroth@linux.vnet.ibm.com>
Marc-André Lureau [Wed, 26 Aug 2015 23:34:51 +0000 (01:34 +0200)]
qga: rename 'path' to 'channel_path'
'path' is already a global function, rename the variable since it's
going to be in global scope in a later patch.
Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com>
Reviewed-by: Michael Roth <mdroth@linux.vnet.ibm.com>
Reviewed-by: Denis V. Lunev <den@openvz.org>
Signed-off-by: Michael Roth <mdroth@linux.vnet.ibm.com>
Marc-André Lureau [Wed, 26 Aug 2015 23:34:50 +0000 (01:34 +0200)]
qga: make split_list() return allocated strings
In order to avoid any confusion, let's allocate new strings when
splitting.
Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com>
Reviewed-by: Denis V. Lunev <den@openvz.org>
Signed-off-by: Michael Roth <mdroth@linux.vnet.ibm.com>
Marc-André Lureau [Wed, 26 Aug 2015 23:34:49 +0000 (01:34 +0200)]
qga: move string split in separate function
The function is going to be reused in a later patch.
Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com>
Reviewed-by: Michael Roth <mdroth@linux.vnet.ibm.com>
Reviewed-by: Denis V. Lunev <den@openvz.org>
Signed-off-by: Michael Roth <mdroth@linux.vnet.ibm.com>
Marc-André Lureau [Wed, 26 Aug 2015 23:34:48 +0000 (01:34 +0200)]
qga: use exit() when parsing options
The option parsing is going to be moved to a separate function,
use exit() consistently.
Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com>
Reviewed-by: Denis V. Lunev <den@openvz.org>
Reviewed-by: Eric Blake <eblake@redhat.com>
Reviewed-by: Michael Roth <mdroth@linux.vnet.ibm.com>
Signed-off-by: Michael Roth <mdroth@linux.vnet.ibm.com>
Marc-André Lureau [Wed, 26 Aug 2015 23:34:47 +0000 (01:34 +0200)]
qga: misc spelling
Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com>
Reviewed-by: Eric Blake <eblake@redhat.com>
Reviewed-by: Denis V. Lunev <den@openvz.org>
Reviewed-by: Michael Roth <mdroth@linux.vnet.ibm.com>
Signed-off-by: Michael Roth <mdroth@linux.vnet.ibm.com>
Michael Roth [Tue, 25 Aug 2015 20:46:18 +0000 (15:46 -0500)]
configure: qemu-ga: report MSI install support in summary
Currently we need to examine config-host.mak to determine whether
options/probes for MSI package generation had desired result. Report
this more prominently in ./configure summary as we do with other
guest agent configure options.
Reviewed-by: Marc-André Lureau <marcandre.lureau@redhat.com>
Signed-off-by: Michael Roth <mdroth@linux.vnet.ibm.com>
Leonid Bloch [Wed, 26 Aug 2015 12:07:16 +0000 (15:07 +0300)]
qemu-ga: Fixed paths issue with MSI build
Previously, if building out-of-tree, the MSI build would fail since
it wasn't able to find the needed files.
Signed-off-by: Leonid Bloch <leonid@daynix.com>
Reviewed-by: Marc-André Lureau <marcandre.lureau@redhat.com>
* fixed up commit msg formating
Signed-off-by: Michael Roth <mdroth@linux.vnet.ibm.com>
Leonid Bloch [Mon, 3 Aug 2015 17:54:24 +0000 (20:54 +0300)]
qemu-ga: Prevent QEMU-GA VSS provider from being unregistered on MSI reinstall
Previously, running the .msi would unregister the QEMU GA VSS service if QEMU GA was already installed on the machine, and then register it only if QEMU GA was NOT previously installed. This behavior caused the service to be registered only after the INITIAL installation, and any subsequent run of the .msi (to redo, repair, or upgrade the installation) ended in the service being unregistered.
Now, the VSS service is still unregistered if QEMU GA is already installed (so that a fix or an update could be performed) but then it is registered again (if the GA is not being uninstalled) thus finishing the repair/upgrade correctly. Additionally, downgrading is now prevented. If a user would like to downgrade a version, he/she must uninstall the newer version first.
Signed-off-by: Leonid Bloch <leonid@daynix.com>
Reviewed-by: Marc-André Lureau <marcandre.lureau@redhat.com>
Signed-off-by: Michael Roth <mdroth@linux.vnet.ibm.com>
Leonid Bloch [Mon, 3 Aug 2015 17:54:23 +0000 (20:54 +0300)]
qemu-ga: Created a separate component for each installed file in the MSI
This is done to follow the recommendations given here: https://msdn.microsoft.com/en-us/library/
aa368269%28VS.85%29.aspx
Signed-off-by: Leonid Bloch <leonid@daynix.com>
Reviewed-by: Marc-André Lureau <marcandre.lureau@redhat.com>
Signed-off-by: Michael Roth <mdroth@linux.vnet.ibm.com>
Leonid Bloch [Mon, 3 Aug 2015 17:54:22 +0000 (20:54 +0300)]
qemu-ga: Minor cosmetic changes to the WXS file
Signed-off-by: Leonid Bloch <leonid@daynix.com>
Signed-off-by: Michael Roth <mdroth@linux.vnet.ibm.com>
Leonid Bloch [Mon, 3 Aug 2015 17:54:21 +0000 (20:54 +0300)]
qemu-ga: Fixed GUID capitalization
For compatibility, all the letters in GUID should be capital.
Signed-off-by: Leonid Bloch <leonid@daynix.com>
Signed-off-by: Michael Roth <mdroth@linux.vnet.ibm.com>
Leonid Bloch [Wed, 29 Jul 2015 17:10:51 +0000 (20:10 +0300)]
qemu-ga: Two MSI related cosmetic changes
Signed-off-by: Leonid Bloch <leonid@daynix.com>
Signed-off-by: Michael Roth <mdroth@linux.vnet.ibm.com>
Leonid Bloch [Wed, 29 Jul 2015 17:10:50 +0000 (20:10 +0300)]
qemu-ga: Add .msi files to .gitignore
Signed-off-by: Leonid Bloch <leonid@daynix.com>
Signed-off-by: Michael Roth <mdroth@linux.vnet.ibm.com>
Laurent Vivier [Fri, 28 Aug 2015 10:23:41 +0000 (12:23 +0200)]
s390: fix softmmu compilation
guest_base must be used only in linux-user mode.
Signed-off-by: Laurent Vivier <laurent@vivier.eu>
Message-id:
1440757421-9674-1-git-send-email-laurent@vivier.eu
Reviewed-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Peter Maydell [Fri, 28 Aug 2015 10:42:53 +0000 (11:42 +0100)]
qemu-doc.texi: Fix capitalization error in OS X build instructions
Fix a capitalization error in the OS X build instructions;
this was picked up in review of commit
b352153f5f and intended to be
corrected before I applied it, but I accidentally didn't include it.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
G 3 [Fri, 14 Aug 2015 17:54:25 +0000 (13:54 -0400)]
From: John Arbuckle <programmingkidx@gmail.com>
qemu-doc.texi: Add information on compiling source code on Mac OS X
Add information to the documentation on how to build QEMU
on Mac OS X.
Signed-off-by: John Arbuckle <programmingkidx@gmail.com>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
[PMM: fixed a minor capitalization error]
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Peter Maydell [Thu, 27 Aug 2015 12:31:55 +0000 (13:31 +0100)]
Merge remote-tracking branch 'remotes/weil/tags/pull-tci-
20150826' into staging
tci patch queue
# gpg: Signature made Wed 26 Aug 2015 19:51:07 BST using RSA key ID
677450AD
# gpg: Good signature from "Stefan Weil <sw@weilnetz.de>"
# gpg: aka "Stefan Weil <stefan.weil@weilnetz.de>"
# gpg: aka "Stefan Weil <stefan.weil@bib.uni-mannheim.de>"
# gpg: WARNING: This key is not certified with a trusted signature!
# gpg: There is no indication that the signature belongs to the owner.
# Primary key fingerprint: 4923 6FEA 75C9 5D69 8EC2 B78A E08C 21D5 6774 50AD
* remotes/weil/tags/pull-tci-
20150826:
exec-all: Translate TCI return addresses backwards too
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Peter Crosthwaite [Tue, 18 Aug 2015 03:28:18 +0000 (20:28 -0700)]
exec-all: Translate TCI return addresses backwards too
This subtraction of return addresses applies directly to TCI as well as
host-TCG. This fixes Linux boots for at least Microblaze, CRIS, ARM and
SH4 when using TCI.
[sw: Removed indentation for preprocessor statement]
[sw: The patch also fixes Linux boot for x86_64]
Reviewed-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: Stefan Weil <sw@weilnetz.de>
Signed-off-by: Peter Crosthwaite <crosthwaite.peter@gmail.com>
Peter Maydell [Wed, 26 Aug 2015 16:45:09 +0000 (17:45 +0100)]
Merge remote-tracking branch 'remotes/kraxel/tags/pull-cve-2015-5225-
20150826-1' into staging
vnc: fix memory corruption (CVE-2015-5225)
# gpg: Signature made Wed 26 Aug 2015 17:37:21 BST using RSA key ID
D3E87138
# gpg: Good signature from "Gerd Hoffmann (work) <kraxel@redhat.com>"
# gpg: aka "Gerd Hoffmann <gerd@kraxel.org>"
# gpg: aka "Gerd Hoffmann (private) <kraxel@gmail.com>"
* remotes/kraxel/tags/pull-cve-2015-5225-
20150826-1:
vnc: fix memory corruption (CVE-2015-5225)
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Gerd Hoffmann [Mon, 17 Aug 2015 17:56:53 +0000 (19:56 +0200)]
vnc: fix memory corruption (CVE-2015-5225)
The _cmp_bytes variable added by commit "
bea60dd ui/vnc: fix potential
memory corruption issues" can become negative. Result is (possibly
exploitable) memory corruption. Reason for that is it uses the stride
instead of bytes per scanline to apply limits.
For the server surface is is actually fine. vnc creates that itself,
there is never any padding and thus scanline length always equals stride.
For the guest surface scanline length and stride are typically identical
too, but it doesn't has to be that way. So add and use a new variable
(guest_ll) for the guest scanline length. Also rename min_stride to
line_bytes to make more clear what it actually is. Finally sprinkle
in an assert() to make sure we never use a negative _cmp_bytes again.
Reported-by: 范祚至(库特) <zuozhi.fzz@alibaba-inc.com>
Reviewed-by: P J P <ppandit@redhat.com>
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
Peter Maydell [Tue, 25 Aug 2015 15:24:06 +0000 (16:24 +0100)]
Merge remote-tracking branch 'remotes/pmaydell/tags/pull-target-arm-
20150825-1' into staging
target-arm queue:
* add missing EL2/EL3 TLBI operations
* add missing EL2/EL3 ATS operations
* add missing EL2/EL3 registers
* update Xilinx MAINTAINERS info
* Xilinx: connect the four OCM banks
# gpg: Signature made Tue 25 Aug 2015 16:22:43 BST using RSA key ID
14360CDE
# gpg: Good signature from "Peter Maydell <peter.maydell@linaro.org>"
# gpg: aka "Peter Maydell <pmaydell@gmail.com>"
# gpg: aka "Peter Maydell <pmaydell@chiark.greenend.org.uk>"
* remotes/pmaydell/tags/pull-target-arm-
20150825-1:
target-arm: Implement AArch64 TLBI operations on IPAs
target-arm: Implement missing EL3 TLB invalidate operations
target-arm: Implement missing EL2 TLBI operations
target-arm: Restrict AArch64 TLB flushes to the MMU indexes they must touch
target-arm: Move TLBI ALLE1/ALLE1IS definitions into numeric order
cputlb: Add functions for flushing TLB for a single MMU index
target-arm: Implement AArch32 ATS1H* operations
target-arm: Enable the AArch32 ATS12NSO ops
target-arm: Add CP_ACCESS_TRAP_UNCATEGORIZED_EL2, 3
target-arm: Wire up AArch64 EL2 and EL3 address translation ops
target-arm: there is no TTBR1 for 32-bit EL2 stage 1 translations
target-arm: Implement missing ACTLR registers
target-arm: Implement missing AFSR registers
target-arm: Implement missing AMAIR registers
target-arm: Add missing MAIR_EL3 and TPIDR_EL3 registers
MAINTAINERS: Add ZynqMP to MAINTAINERS file
MAINTAINERS: Update Xilinx Maintainership
xlnx-zynqmp: Connect the four OCM banks
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Peter Maydell [Tue, 25 Aug 2015 14:45:10 +0000 (15:45 +0100)]
target-arm: Implement AArch64 TLBI operations on IPAs
Implement the AArch64 TLBI operations which take an intermediate
physical address and invalidate stage 2 translations.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Message-id:
1439548879-1972-7-git-send-email-peter.maydell@linaro.org
Peter Maydell [Tue, 25 Aug 2015 14:45:10 +0000 (15:45 +0100)]
target-arm: Implement missing EL3 TLB invalidate operations
Implement the remaining stage 1 TLB invalidate operations
visible from EL3.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Message-id:
1439548879-1972-6-git-send-email-peter.maydell@linaro.org
Peter Maydell [Tue, 25 Aug 2015 14:45:09 +0000 (15:45 +0100)]
target-arm: Implement missing EL2 TLBI operations
Implement the missing TLBI operations that exist only
if EL2 is implemented.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Message-id:
1439548879-1972-5-git-send-email-peter.maydell@linaro.org
Peter Maydell [Tue, 25 Aug 2015 14:45:09 +0000 (15:45 +0100)]
target-arm: Restrict AArch64 TLB flushes to the MMU indexes they must touch
Now we have the ability to flush the TLB only for specific MMU indexes,
update the AArch64 TLB maintenance instruction implementations to only
flush the parts of the TLB they need to, rather than doing full flushes.
We take the opportunity to remove some duplicate functions (the per-asid
tlb ops work like the non-per-asid ones because we don't support
flushing a TLB only by ASID) and to bring the function names in line
with the architectural TLBI operation names.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Message-id:
1439548879-1972-4-git-send-email-peter.maydell@linaro.org
Peter Maydell [Tue, 25 Aug 2015 14:45:09 +0000 (15:45 +0100)]
target-arm: Move TLBI ALLE1/ALLE1IS definitions into numeric order
Move the two regdefs for TLBI ALLE1 and TLBI ALLE1IS down so that the
whole set of AArch64 TLBI regdefs is arranged in numeric order.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Message-id:
1439548879-1972-3-git-send-email-peter.maydell@linaro.org
Peter Maydell [Tue, 25 Aug 2015 14:45:09 +0000 (15:45 +0100)]
cputlb: Add functions for flushing TLB for a single MMU index
Guest CPU TLB maintenance operations may be sufficiently
specialized to only need to flush TLB entries corresponding
to a particular MMU index. Implement cputlb functions for
this, to avoid the inefficiency of flushing TLB entries
which we don't need to.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Message-id:
1439548879-1972-2-git-send-email-peter.maydell@linaro.org
Peter Maydell [Tue, 25 Aug 2015 14:45:08 +0000 (15:45 +0100)]
target-arm: Implement AArch32 ATS1H* operations
Implement the AArch32 ATS1H* operations which perform
Hyp mode stage 1 translations.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Message-id:
1437751263-21913-6-git-send-email-peter.maydell@linaro.org
Peter Maydell [Tue, 25 Aug 2015 14:45:08 +0000 (15:45 +0100)]
target-arm: Enable the AArch32 ATS12NSO ops
Apply the correct conditions in the ats_access() function for
the ATS12NSO* address translation operations:
* succeed at EL2 or EL3
* normal UNDEF trap from NS EL1
* trap to EL3 from S EL1 (only possible if EL3 is AArch64)
(This change means they're now available in our EL3-supporting
CPUs when they would previously always UNDEF.)
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Message-id:
1437751263-21913-5-git-send-email-peter.maydell@linaro.org
Peter Maydell [Tue, 25 Aug 2015 14:45:08 +0000 (15:45 +0100)]
target-arm: Add CP_ACCESS_TRAP_UNCATEGORIZED_EL2, 3
Some coprocessor register access functions need to be able
to report "trap to EL3 with an 'uncategorized' syndrome";
add the necessary CPAccessResult enum and handling for it.
I don't currently know of any registers that need to trap
to EL2 with the 'uncategorized' syndrome, but adding the
_EL2 enum as well is trivial and fills in what would
otherwise be an odd gap in the handling.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Message-id:
1437751263-21913-4-git-send-email-peter.maydell@linaro.org
Peter Maydell [Tue, 25 Aug 2015 14:45:08 +0000 (15:45 +0100)]
target-arm: Wire up AArch64 EL2 and EL3 address translation ops
Wire up the AArch64 EL2 and EL3 address translation operations
(AT S12E1*, AT S12E0*, AT S1E2*, AT S1E3*), and correct some
errors in the ats_write64() function in previously unused code
that would have done the wrong kind of lookup for accesses from
EL3 when SCR.NS==0.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Message-id:
1437751263-21913-3-git-send-email-peter.maydell@linaro.org
Peter Maydell [Tue, 25 Aug 2015 14:45:08 +0000 (15:45 +0100)]
target-arm: there is no TTBR1 for 32-bit EL2 stage 1 translations
For EL2 stage 1 translations, there is no TTBR1. We were already
handling this for 64-bit EL2; add the code to take the 'no TTBR1'
code path for 64-bit EL2 as well.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Message-id:
1437751263-21913-2-git-send-email-peter.maydell@linaro.org
Peter Maydell [Tue, 25 Aug 2015 14:45:07 +0000 (15:45 +0100)]
target-arm: Implement missing ACTLR registers
We already implemented ACTLR_EL1; add the missing ACTLR_EL2 and
ACTLR_EL3, for consistency.
Since we don't currently have any CPUs that need the EL2/EL3
versions to reset to non-zero values, implement as RAZ/WI.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Message-id:
1438281398-18746-5-git-send-email-peter.maydell@linaro.org
Peter Maydell [Tue, 25 Aug 2015 14:45:07 +0000 (15:45 +0100)]
target-arm: Implement missing AFSR registers
The AFSR registers are implementation dependent auxiliary fault
status registers. We already implemented a RAZ/WI AFSR0_EL1 and
AFSR_EL1; add the missing AFSR{0,1}_EL{2,3} for consistency.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Message-id:
1438281398-18746-4-git-send-email-peter.maydell@linaro.org
Peter Maydell [Tue, 25 Aug 2015 14:45:07 +0000 (15:45 +0100)]
target-arm: Implement missing AMAIR registers
The AMAIR registers are for providing auxiliary implementation
defined memory attributes. We already implemented a RAZ/WI
AMAIR_EL1; add the EL2 and EL3 versions for consistency.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Message-id:
1438281398-18746-3-git-send-email-peter.maydell@linaro.org
Peter Maydell [Tue, 25 Aug 2015 14:45:07 +0000 (15:45 +0100)]
target-arm: Add missing MAIR_EL3 and TPIDR_EL3 registers
Add the AArch64 registers MAIR_EL3 and TPIDR_EL3, which are the only
two which we had implemented the 32-bit Secure equivalents of but
not the 64-bit Secure versions.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Message-id:
1438281398-18746-2-git-send-email-peter.maydell@linaro.org
Alistair Francis [Tue, 25 Aug 2015 14:45:07 +0000 (15:45 +0100)]
MAINTAINERS: Add ZynqMP to MAINTAINERS file
Add the Xilinx ZynqMP SoC and EP108 machine to the maintainers
file.
Signed-off-by: Alistair Francis <alistair.francis@xilinx.com>
Reviewed-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
Message-id:
fed078103a0b02cfb3adadbe8e80e4420d554505.
1436486024.git.alistair.francis@xilinx.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Alistair Francis [Tue, 25 Aug 2015 14:45:06 +0000 (15:45 +0100)]
MAINTAINERS: Update Xilinx Maintainership
Peter C is leaving Xilinx, so update the maintainer list
to point to Alistair and Edgar from Xilinx and Peter's
personal email address.
Signed-off-by: Alistair Francis <alistair.francis@xilinx.com>
Reviewed-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
Message-id:
54b4c070452bac05aa3a9c1d75899bc097fef831.
1436486024.git.alistair.francis@xilinx.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Alistair Francis [Tue, 25 Aug 2015 14:45:06 +0000 (15:45 +0100)]
xlnx-zynqmp: Connect the four OCM banks
The Xilinx EP108 has four separate OCM banks which are located
adjacent to each other. This patch adds the four banks to
the ZynqMP SoC.
Signed-off-by: Alistair Francis <alistair.francis@xilinx.com>
Reviewed-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
Message-id:
afa6ba31163a5d541a0bef4b0dc11f2597e0c495.
1436813543.git.alistair.francis@xilinx.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Peter Maydell [Tue, 25 Aug 2015 12:34:57 +0000 (13:34 +0100)]
Merge remote-tracking branch 'remotes/rth/tags/pull-tcg-
20150824' into staging
queued tcg patches
# gpg: Signature made Mon 24 Aug 2015 19:37:15 BST using RSA key ID
4DD0279B
# gpg: Good signature from "Richard Henderson <rth7680@gmail.com>"
# gpg: aka "Richard Henderson <rth@redhat.com>"
# gpg: aka "Richard Henderson <rth@twiddle.net>"
* remotes/rth/tags/pull-tcg-
20150824:
linux-user: remove useless macros GUEST_BASE and RESERVED_VA
linux-user: remove --enable-guest-base/--disable-guest-base
tcg/aarch64: Use softmmu fast path for unaligned accesses
tcg/s390: Use softmmu fast path for unaligned accesses
tcg/ppc: Improve unaligned load/store handling on 64-bit backend
tcg/i386: use softmmu fast path for unaligned accesses
tcg: Remove tcg_gen_trunc_i64_i32
tcg: Split trunc_shr_i32 opcode into extr[lh]_i64_i32
tcg: update README about size changing ops
tcg/optimize: add optimizations for ext_i32_i64 and extu_i32_i64 ops
tcg: implement real ext_i32_i64 and extu_i32_i64 ops
tcg: don't abuse TCG type in tcg_gen_trunc_shr_i64_i32
tcg: rename trunc_shr_i32 into trunc_shr_i64_i32
tcg/optimize: allow constant to have copies
tcg/optimize: track const/copy status separately
tcg/optimize: add temp_is_const and temp_is_copy functions
tcg/optimize: optimize temps tracking
tcg/optimize: fix constant signedness
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Laurent Vivier [Mon, 24 Aug 2015 12:53:54 +0000 (14:53 +0200)]
linux-user: remove useless macros GUEST_BASE and RESERVED_VA
As we have removed CONFIG_USE_GUEST_BASE, we always use a guest base
and the macros GUEST_BASE and RESERVED_VA become useless: replace
them by their values.
Reviewed-by: Alexander Graf <agraf@suse.de>
Signed-off-by: Laurent Vivier <laurent@vivier.eu>
Message-Id: <
1440420834-8388-1-git-send-email-laurent@vivier.eu>
Signed-off-by: Richard Henderson <rth@twiddle.net>
Laurent Vivier [Sun, 23 Aug 2015 23:42:07 +0000 (01:42 +0200)]
linux-user: remove --enable-guest-base/--disable-guest-base
All tcg host architectures now support the guest base and as
there is no real performance lost, it can be always enabled.
Anyway, guest base use can be disabled lively by setting guest
base to 0.
CONFIG_USE_GUEST_BASE is defined as (USE_GUEST_BASE && USER_ONLY),
it should have to be replaced by CONFIG_USER_ONLY in non CONFIG_USER_ONLY
parts, but as some other parts are using !CONFIG_SOFTMMU I have chosen to
use !CONFIG_SOFTMMU instead.
Reviewed-by: Alexander Graf <agraf@suse.de>
Signed-off-by: Laurent Vivier <laurent@vivier.eu>
Message-Id: <
1440373328-9788-2-git-send-email-laurent@vivier.eu>
Signed-off-by: Richard Henderson <rth@twiddle.net>
Richard Henderson [Mon, 17 Aug 2015 19:18:05 +0000 (12:18 -0700)]
tcg/aarch64: Use softmmu fast path for unaligned accesses
Signed-off-by: Richard Henderson <rth@twiddle.net>
Richard Henderson [Thu, 23 Jul 2015 20:32:35 +0000 (13:32 -0700)]
tcg/s390: Use softmmu fast path for unaligned accesses
Signed-off-by: Richard Henderson <rth@twiddle.net>
Benjamin Herrenschmidt [Tue, 21 Jul 2015 05:19:38 +0000 (15:19 +1000)]
tcg/ppc: Improve unaligned load/store handling on 64-bit backend
Currently, we get to the slow path for any unaligned access in the
backend, because we effectively preserve the bottom address bits
below the alignment requirement when comparing with the TLB entry,
so any non-0 bit there will cause the compare to fail.
For the same number of instructions, we can instead add the access
size - 1 to the address and stick to clearing all the bottom bits.
That means that normal unaligned accesses will not fallback (the HW
will handle them fine). Only when crossing a page boundary well we
end up having a mismatch because we'll end up pointing to the next
page which cannot possibly be in that same TLB entry.
Reviewed-by: Aurelien Jarno <aurelien@aurel32.net>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Message-Id: <
1437455978.5809.2.camel@kernel.crashing.org>
Signed-off-by: Richard Henderson <rth@twiddle.net>
Aurelien Jarno [Thu, 9 Jul 2015 18:39:57 +0000 (20:39 +0200)]
tcg/i386: use softmmu fast path for unaligned accesses
Softmmu unaligned load/stores currently goes through through the slow
path for two reasons:
- to support unaligned access on host with strict alignement
- to correctly handle accesses crossing pages
x86 is only concerned by the second reason. Unaligned accesses are
avoided by compilers, but are not uncommon. We therefore would like
to see them going through the fast path, if they don't cross pages.
For that we can use the fact that two adjacent TLB entries can't contain
the same page. Therefore accessing the TLB entry corresponding to the
first byte, but comparing its content to page address of the last byte
ensures that we don't cross pages. We can do this check without adding
more instructions in the TLB code (but increasing its length by one
byte) by using the LEA instruction to combine the existing move with the
size addition.
On an x86-64 host, this gives a 3% boot time improvement for a powerpc
guest and 4% for an x86-64 guest.
[rth: Tidied calculation of the offset mask]
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
Message-Id: <
1436467197-2183-1-git-send-email-aurelien@aurel32.net>
Signed-off-by: Richard Henderson <rth@twiddle.net>
Richard Henderson [Fri, 24 Jul 2015 18:49:53 +0000 (11:49 -0700)]
tcg: Remove tcg_gen_trunc_i64_i32
Replacing it with tcg_gen_extrl_i64_i32.
Signed-off-by: Richard Henderson <rth@twiddle.net>
Richard Henderson [Fri, 24 Jul 2015 14:16:00 +0000 (07:16 -0700)]
tcg: Split trunc_shr_i32 opcode into extr[lh]_i64_i32
Rather than allow arbitrary shift+trunc, only concern ourselves
with low and high parts. This is all that was being used anyway.
Signed-off-by: Richard Henderson <rth@twiddle.net>
Aurelien Jarno [Mon, 27 Jul 2015 10:41:45 +0000 (12:41 +0200)]
tcg: update README about size changing ops
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
Signed-off-by: Richard Henderson <rth@twiddle.net>
Aurelien Jarno [Mon, 27 Jul 2015 10:41:45 +0000 (12:41 +0200)]
tcg/optimize: add optimizations for ext_i32_i64 and extu_i32_i64 ops
They behave the same as ext32s_i64 and ext32u_i64 from the constant
folding and zero propagation point of view, except that they can't
be replaced by a mov, so we don't compute the affected value.
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
Signed-off-by: Richard Henderson <rth@twiddle.net>
Aurelien Jarno [Mon, 27 Jul 2015 10:41:45 +0000 (12:41 +0200)]
tcg: implement real ext_i32_i64 and extu_i32_i64 ops
Implement real ext_i32_i64 and extu_i32_i64 ops. They ensure that a
32-bit value is always converted to a 64-bit value and not propagated
through the register allocator or the optimizer.
Cc: Andrzej Zaborowski <balrogg@gmail.com>
Cc: Alexander Graf <agraf@suse.de>
Cc: Blue Swirl <blauwirbel@gmail.com>
Cc: Stefan Weil <sw@weilnetz.de>
Acked-by: Claudio Fontana <claudio.fontana@huawei.com>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
Signed-off-by: Richard Henderson <rth@twiddle.net>
Aurelien Jarno [Mon, 27 Jul 2015 10:41:45 +0000 (12:41 +0200)]
tcg: don't abuse TCG type in tcg_gen_trunc_shr_i64_i32
The tcg_gen_trunc_shr_i64_i32 function takes a 64-bit argument and
returns a 32-bit value. Directly call tcg_gen_op3 with the correct
types instead of calling tcg_gen_op3i_i32 and abusing the TCG types.
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
Signed-off-by: Richard Henderson <rth@twiddle.net>
Aurelien Jarno [Mon, 27 Jul 2015 10:41:45 +0000 (12:41 +0200)]
tcg: rename trunc_shr_i32 into trunc_shr_i64_i32
The op is sometimes named trunc_shr_i32 and sometimes trunc_shr_i64_i32,
and the name in the README doesn't match the name offered to the
frontends.
Always use the long name to make it clear it is a size changing op.
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
Signed-off-by: Richard Henderson <rth@twiddle.net>
Aurelien Jarno [Mon, 27 Jul 2015 10:41:44 +0000 (12:41 +0200)]
tcg/optimize: allow constant to have copies
Now that copies and constants are tracked separately, we can allow
constant to have copies, deferring the choice to use a register or a
constant to the register allocation pass. This prevent this kind of
regular constant reloading:
-OUT: [size=338]
+OUT: [size=298]
mov -0x4(%r14),%ebp
test %ebp,%ebp
jne 0x7ffbe9cb0ed6
mov $0x40002219f8,%rbp
mov %rbp,(%r14)
- mov $0x40002219f8,%rbp
mov $0x4000221a20,%rbx
mov %rbp,(%rbx)
mov $0x4000000000,%rbp
mov %rbp,(%r14)
- mov $0x4000000000,%rbp
mov $0x4000221d38,%rbx
mov %rbp,(%rbx)
mov $0x40002221a8,%rbp
mov %rbp,(%r14)
- mov $0x40002221a8,%rbp
mov $0x4000221d40,%rbx
mov %rbp,(%rbx)
mov $0x4000019170,%rbp
mov %rbp,(%r14)
- mov $0x4000019170,%rbp
mov $0x4000221d48,%rbx
mov %rbp,(%rbx)
mov $0x40000049ee,%rbp
mov %rbp,0x80(%r14)
mov %r14,%rdi
callq 0x7ffbe99924d0
mov $0x4000001680,%rbp
mov %rbp,0x30(%r14)
mov 0x10(%r14),%rbp
mov $0x4000001680,%rbp
mov %rbp,0x30(%r14)
mov 0x10(%r14),%rbp
shl $0x20,%rbp
mov (%r14),%rbx
mov %ebx,%ebx
mov %rbx,(%r14)
or %rbx,%rbp
mov %rbp,0x10(%r14)
mov %rbp,0x90(%r14)
mov 0x60(%r14),%rbx
mov %rbx,0x38(%r14)
mov 0x28(%r14),%rbx
mov $0x4000220e60,%r12
mov %rbx,(%r12)
mov $0x40002219c8,%rbx
mov %rbp,(%rbx)
mov 0x20(%r14),%rbp
sub $0x8,%rbp
mov $0x4000004a16,%rbx
mov %rbx,0x0(%rbp)
mov %rbp,0x20(%r14)
mov $0x19,%ebp
mov %ebp,0xa8(%r14)
mov $0x4000015110,%rbp
mov %rbp,0x80(%r14)
xor %eax,%eax
jmpq 0x7ffbebcae426
lea -0x5f6d72a(%rip),%rax # 0x7ffbe3d437b3
jmpq 0x7ffbebcae426
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
Signed-off-by: Richard Henderson <rth@twiddle.net>
Aurelien Jarno [Mon, 27 Jul 2015 10:41:44 +0000 (12:41 +0200)]
tcg/optimize: track const/copy status separately
Instead of using an enum which could be either a copy or a const, track
them separately. This will be used in the next patch.
Constants are tracked through a bool. Copies are tracked by initializing
temp's next_copy and prev_copy to itself, allowing to simplify the code
a bit.
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
Signed-off-by: Richard Henderson <rth@twiddle.net>
Aurelien Jarno [Mon, 27 Jul 2015 10:41:44 +0000 (12:41 +0200)]
tcg/optimize: add temp_is_const and temp_is_copy functions
Add two accessor functions temp_is_const and temp_is_copy, to make the
code more readable and make code change easier.
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
Signed-off-by: Richard Henderson <rth@twiddle.net>
Aurelien Jarno [Mon, 27 Jul 2015 10:41:44 +0000 (12:41 +0200)]
tcg/optimize: optimize temps tracking
The tcg_temp_info structure uses 24 bytes per temp. Now that we emulate
vector registers on most guests, it's not uncommon to have more than 100
used temps. This means we have initialize more than 2kB at least twice
per TB, often more when there is a few goto_tb.
Instead used a TCGTempSet bit array to track which temps are in used in
the current basic block. This means there are only around 16 bytes to
initialize.
This improves the boot time of a MIPS guest on an x86-64 host by around
7% and moves out tcg_optimize from the the top of the profiler list.
[rth: Handle TCG_CALL_DUMMY_ARG]
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
Signed-off-by: Richard Henderson <rth@twiddle.net>
Aurelien Jarno [Fri, 10 Jul 2015 16:03:31 +0000 (18:03 +0200)]
tcg/optimize: fix constant signedness
By convention, on a 64-bit host TCG internally stores 32-bit constants
as sign-extended. This is not the case in the optimizer when a 32-bit
constant is folded.
This doesn't seem to have more consequences than suboptimal code
generation. For instance the x86 backend assumes sign-extended constants,
and in some rare cases uses a 32-bit unsigned immediate 0xffffffff
instead of a 8-bit signed immediate 0xff for the constant -1. This is
with a ppc guest:
before
------
---- 0x9f29cc
movi_i32 tmp1,$0xffffffff
movi_i32 tmp2,$0x0
add2_i32 tmp0,CA,CA,tmp2,r6,tmp2
add2_i32 tmp0,CA,tmp0,CA,tmp1,tmp2
mov_i32 r10,tmp0
0x7fd8c7dfe90c: xor %ebp,%ebp
0x7fd8c7dfe90e: mov %ebp,%r11d
0x7fd8c7dfe911: mov 0x18(%r14),%r9d
0x7fd8c7dfe915: add %r9d,%r10d
0x7fd8c7dfe918: adc %ebp,%r11d
0x7fd8c7dfe91b: add $0xffffffff,%r10d
0x7fd8c7dfe922: adc %ebp,%r11d
0x7fd8c7dfe925: mov %r11d,0x134(%r14)
0x7fd8c7dfe92c: mov %r10d,0x28(%r14)
after
-----
---- 0x9f29cc
movi_i32 tmp1,$0xffffffffffffffff
movi_i32 tmp2,$0x0
add2_i32 tmp0,CA,CA,tmp2,r6,tmp2
add2_i32 tmp0,CA,tmp0,CA,tmp1,tmp2
mov_i32 r10,tmp0
0x7f37010d490c: xor %ebp,%ebp
0x7f37010d490e: mov %ebp,%r11d
0x7f37010d4911: mov 0x18(%r14),%r9d
0x7f37010d4915: add %r9d,%r10d
0x7f37010d4918: adc %ebp,%r11d
0x7f37010d491b: add $0xffffffffffffffff,%r10d
0x7f37010d491f: adc %ebp,%r11d
0x7f37010d4922: mov %r11d,0x134(%r14)
0x7f37010d4929: mov %r10d,0x28(%r14)
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
Message-Id: <
1436544211-2769-2-git-send-email-aurelien@aurel32.net>
Signed-off-by: Richard Henderson <rth@twiddle.net>
Peter Maydell [Fri, 14 Aug 2015 15:10:52 +0000 (16:10 +0100)]
configure: Don't permit SDL or GTK on OSX
The cocoa GUI frontend assumes it is the only GUI (it redefines
main() so it always gets control before the rest of QEMU), so
it does not play well with other UIs like SDL or GTK. (Mostly
people building QEMU on OSX don't have the necessary dependencies
available for configure to build those other front ends, so
mostly this problem goes unnoticed.)
Make configure automatically disable the SDL and GTK front ends
if the cocoa front end is enabled. (We were sort of attempting
to do this for SDL before, but not in a way that worked very well.)
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Daniel P. Berrange <berrange@redhat.com>
Reviewed-by: John Arbuckle <programmingkidx@gmail.com>
Message-id:
1439565052-3457-1-git-send-email-peter.maydell@linaro.org
Peter Maydell [Wed, 19 Aug 2015 15:20:20 +0000 (16:20 +0100)]
apic_internal.h: Include cpu.h directly
apic_internal.h relies on cpu.h having been included (for the
X86CPU type); include it directly rather than relying on it
being pulled in via one of the other includes like timer.h.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Daniel P. Berrange <berrange@redhat.com>
Peter Maydell [Wed, 19 Aug 2015 15:20:20 +0000 (16:20 +0100)]
qemu-common.h: Move muldiv64() to host-utils.h
Move the muldiv64() function from qemu-common.h to host-utils.h.
This puts it together with all the other arithmetic functions
where we provide a version with __int128_t and a fallback
without, and allows headers which need muldiv64() to avoid
including qemu-common.h.
We don't include host-utils from qemu-common.h, to avoid dragging
more things into qemu-common.h than it already has; in practice
everywhere that needs muldiv64() can get it via qemu/timer.h.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Daniel P. Berrange <berrange@redhat.com>
Peter Maydell [Wed, 19 Aug 2015 15:20:20 +0000 (16:20 +0100)]
osdep.h: Add header comment
Add a header comment to osdep.h, explaining what the header is for
and some rules to avoid circular-include difficulties.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Daniel P. Berrange <berrange@redhat.com>
Peter Maydell [Wed, 19 Aug 2015 15:20:19 +0000 (16:20 +0100)]
osdep.h: Move some OS header includes and fixups from qemu-common.h
qemu-common.h has some system header includes and fixups for
things that might be missing. This is really an OS dependency
and belongs in osdep.h, so move it across.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Daniel P. Berrange <berrange@redhat.com>
Peter Maydell [Wed, 19 Aug 2015 15:20:19 +0000 (16:20 +0100)]
qemu-common.h: Move Win32 fixups into os-win32.h
qemu-common.h includes some fixups for things the Win32
headers don't define or define weirdly. These really
belong in os-win32.h, so move them there.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Daniel P. Berrange <berrange@redhat.com>
Peter Maydell [Wed, 19 Aug 2015 15:20:19 +0000 (16:20 +0100)]
compiler.h: Use glue() in QEMU_BUILD_BUG_ON define
Rather than rolling custom concatenate-strings macros for the
QEMU_BUILD_BUG_ON macro to use, use the glue() macro we already
have (since it's now available to us in this header).
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Daniel P. Berrange <berrange@redhat.com>
Peter Maydell [Wed, 19 Aug 2015 15:20:19 +0000 (16:20 +0100)]
osdep.h: Move some compiler-specific things to compiler.h
osdep.h has a few things which are really compiler specific;
move them to compiler.h, and include compiler.h from osdep.h.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Daniel P. Berrange <berrange@redhat.com>
Peter Maydell [Wed, 19 Aug 2015 15:20:19 +0000 (16:20 +0100)]
osdep.h: Remove qemu_printf
qemu_printf is an ancient remnant which has been a simple #define to
printf for over a decade, and is used in only a few places. Expand
it out in those places and remove the #define.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Daniel P. Berrange <berrange@redhat.com>
Peter Maydell [Wed, 19 Aug 2015 15:20:19 +0000 (16:20 +0100)]
qapi/qmp-event.c: Don't manually include os-win32.h/os-posix.h
qmp-event.c already includes qemu-common.h, so manually including
os-win32.h/os-posix.h is unnecessary (and potentially fragile,
since it's duplicating the #ifdef logic that chooses which of the
two we need). Remove the unnecessary include logic.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Daniel P. Berrange <berrange@redhat.com>
Peter Maydell [Tue, 18 Aug 2015 23:25:52 +0000 (00:25 +0100)]
Merge remote-tracking branch 'remotes/rth/tags/pull-axp-
201508018' into staging
Alpha shadow register optimization
# gpg: Signature made Tue 18 Aug 2015 19:09:41 BST using RSA key ID
4DD0279B
# gpg: Good signature from "Richard Henderson <rth7680@gmail.com>"
# gpg: aka "Richard Henderson <rth@redhat.com>"
# gpg: aka "Richard Henderson <rth@twiddle.net>"
* remotes/rth/tags/pull-axp-
201508018:
target-alpha: Inline hw_ret
target-alpha: Inline call_pal
target-alpha: Use separate TCGv temporaries for the shadow registers
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Richard Henderson [Tue, 16 Sep 2014 19:55:12 +0000 (12:55 -0700)]
target-alpha: Inline hw_ret
Reviewed-by: Aurelien Jarno <aurelien@aurel32.net>
Signed-off-by: Richard Henderson <rth@twiddle.net>
Richard Henderson [Tue, 16 Sep 2014 19:35:59 +0000 (12:35 -0700)]
target-alpha: Inline call_pal
Reviewed-by: Aurelien Jarno <aurelien@aurel32.net>
Signed-off-by: Richard Henderson <rth@twiddle.net>
Richard Henderson [Tue, 16 Sep 2014 19:16:38 +0000 (12:16 -0700)]
target-alpha: Use separate TCGv temporaries for the shadow registers
This avoids having to manually swap them around when swapping to and
from PALmode. We simply encode the shadow registers into the translation.
The VMStateDescription version changes, because the meaning of "shadow"
changes in the save file when in PALmode. It would be possible to fix
this, but I don't think it's worth the effort.
Reviewed-by: Aurelien Jarno <aurelien@aurel32.net>
Signed-off-by: Richard Henderson <rth@twiddle.net>
Peter Maydell [Tue, 18 Aug 2015 16:06:41 +0000 (17:06 +0100)]
Merge remote-tracking branch 'remotes/bonzini/tags/for-upstream' into staging
* SCSI fixes from Stefan and Fam
* vhost-scsi fix from Igor and Lu Lina
* a build system fix from Daniel
* two more multi-arch-related patches from Peter C.
* TCG patches from myself and Sergey Fedorov
* RCU improvement from Wen Congyang
* a few more simple cleanups
# gpg: Signature made Fri 14 Aug 2015 22:41:52 BST using RSA key ID
78C7AE83
# gpg: Good signature from "Paolo Bonzini <bonzini@gnu.org>"
# gpg: aka "Paolo Bonzini <pbonzini@redhat.com>"
# gpg: WARNING: This key is not certified with sufficiently trusted signatures!
# gpg: It is not certain that the signature belongs to the owner.
# Primary key fingerprint: 46F5 9FBD 57D6 12E7 BFD4 E2F7 7E15 100C CD36 69B1
# Subkey fingerprint: F133 3857 4B66 2389 866C 7682 BFFB D25F 78C7 AE83
* remotes/bonzini/tags/for-upstream:
disas: Defeature print_target_address
hw: fix mask for ColdFire UART command register
scsi-generic: identify AIO callbacks more clearly
scsi-disk: identify AIO callbacks more clearly
scsi: create restart bottom half in the right AioContext
configure: only add CONFIG_RDMA to config-host.h once
qemu-nbd: remove unnecessary qemu_notify_event()
vhost-scsi: Clarify vhost_virtqueue_mask argument
exec: use macro ROUND_UP for alignment
rcu: Allow calling rcu_(un)register_thread() during synchronize_rcu()
exec: drop cpu_can_do_io, just read cpu->can_do_io
cpu_defs: Simplify CPUTLB padding logic
cpu-exec: Do not invalidate original TB in cpu_exec_nocache()
vhost/scsi: call vhost_dev_cleanup() at unrealize() time
virtio-scsi-test: Add test case for tail unaligned WRITE SAME
scsi-disk: Fix assertion failure on WRITE SAME
tests: virtio-scsi: clear unit attention after reset
scsi-disk: fix cmd.mode field typo
virtio-scsi: use virtqueue_map_sg() when loading requests
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Peter Crosthwaite [Sun, 5 Jul 2015 20:50:32 +0000 (13:50 -0700)]
disas: Defeature print_target_address
It does not work in multi-arch as it requires the CPU specific
TARGET_VIRT_ADDR_SPACE_BITS global define. Just use the generic
version that does no masking. Targets should be responsible for
passing in a sane virtual address.
Signed-off-by: Peter Crosthwaite <crosthwaite.peter@gmail.com>
Message-Id: <
1436129432-16617-1-git-send-email-crosthwaite.peter@gmail.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Paolo Bonzini [Wed, 24 Jun 2015 11:55:51 +0000 (13:55 +0200)]
hw: fix mask for ColdFire UART command register
The "miscellaneous commands" part of the register is 3 bits wide.
Spotted by Coverity and confirmed in the datasheet, downloadable from
http://cache.freescale.com/files/32bit/doc/ref_manual/MCF5307BUM.pdf
(figure 14-6).
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Paolo Bonzini [Sun, 19 Jul 2015 17:15:26 +0000 (19:15 +0200)]
scsi-generic: identify AIO callbacks more clearly
Functions that are not callbacks should assert that aiocb is NULL and
have a SCSIGenericReq argument.
AIO callbacks should assert that aiocb is not NULL. They also have an
opaque argument.
Reviewed-by: Fam Zheng <famz@redhat.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Paolo Bonzini [Sun, 19 Jul 2015 17:15:26 +0000 (19:15 +0200)]
scsi-disk: identify AIO callbacks more clearly
Functions that are not callbacks should assert that aiocb is NULL and
have a non-opaque argument (usually a pointer to SCSIDiskReq).
AIO callbacks should assert that aiocb is not NULL and take care of
calling block_acct done. They also have an opaque argument.
Reviewed-by: Fam Zheng <famz@redhat.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Paolo Bonzini [Wed, 22 Jul 2015 14:38:17 +0000 (16:38 +0200)]
scsi: create restart bottom half in the right AioContext
This matches commit
4407c1c (virtio-blk: Schedule BH in the right context,
2014-06-17), which did the same thing for virtio-blk.
Reviewed-by: Fam Zheng <famz@redhat.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Daniel P. Berrange [Fri, 31 Jul 2015 12:23:23 +0000 (13:23 +0100)]
configure: only add CONFIG_RDMA to config-host.h once
For unknown reasons (probably a git rebase merge mistake)
commit
2da776db4846eadcb808598a5d3484d149773c05
Author: Michael R. Hines <mrhines@us.ibm.com>
Date: Mon Jul 22 10:01:54 2013 -0400
rdma: core logic
Adds CONFIG_RDMA to config-host.h twice, as can be seen
in the generated file:
$ grep CONFIG_RDMA config-host.h
#define CONFIG_RDMA 1
#define CONFIG_RDMA 1
Signed-off-by: Daniel P. Berrange <berrange@redhat.com>
Message-Id: <
1438345403-32467-1-git-send-email-berrange@redhat.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Paolo Bonzini [Mon, 27 Jul 2015 11:52:55 +0000 (13:52 +0200)]
qemu-nbd: remove unnecessary qemu_notify_event()
This was needed when qemu-nbd was using qemu_set_fd_handler2. It is
not needed anymore now that nbd_update_server_fd_handler is called
whenever nbd_can_accept() can change from false to true.
nbd_update_server_fd_handler will call qemu_set_fd_handler(),
which will call qemu_notify_event().
Reviewed-by: Max Reitz <mreitz@redhat.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Lu Lina [Mon, 27 Jul 2015 06:25:59 +0000 (14:25 +0800)]
vhost-scsi: Clarify vhost_virtqueue_mask argument
vhost_virtqueue_mask takes an "absolute" virtqueue index, while the
code looks like it's passing an index that is relative to
s->dev.vq_index. In reality, s->dev.vq_index is always zero, so
this patch does not make any difference, but the code is clearer.
Signed-off-by: Lu Lina <lina.lulina@huawei.com>
Signed-off-by: Gonglei <arei.gonglei@huawei.com>
Message-Id: <
1437978359-17960-1-git-send-email-arei.gonglei@huawei.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Chen Hanxiao [Fri, 24 Jul 2015 03:12:03 +0000 (11:12 +0800)]
exec: use macro ROUND_UP for alignment
Use ROUND_UP instead.
Signed-off-by: Chen Hanxiao <chenhanxiao@cn.fujitsu.com>
Message-Id: <
1437707523-4910-1-git-send-email-chenhanxiao@cn.fujitsu.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Wen Congyang [Mon, 27 Jul 2015 02:24:18 +0000 (10:24 +0800)]
rcu: Allow calling rcu_(un)register_thread() during synchronize_rcu()
If rcu_(un)register_thread() is called together with synchronize_rcu(),
it will wait for the synchronize_rcu() to finish. But when synchronize_rcu()
waits for some events, we can modify the list registry.
We also use the lock rcu_gp_lock to assume that synchronize_rcu() isn't
executed in more than one thread at the same time. Add a new mutex lock
rcu_sync_lock to assume it and rename rcu_gp_lock to rcu_registry_lock.
Release rcu_registry_lock when synchronize_rcu() waits for some events.
Signed-off-by: Wen Congyang <wency@cn.fujitsu.com>
Message-Id: <
55B59652.
4090503@cn.fujitsu.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Paolo Bonzini [Wed, 24 Jun 2015 12:16:26 +0000 (14:16 +0200)]
exec: drop cpu_can_do_io, just read cpu->can_do_io
After commit
626cf8f (icount: set can_do_io outside TB execution,
2014-12-08), can_do_io is set to 1 if not executing code. It is
no longer necessary to make this assumption in cpu_can_do_io.
It is also possible to remove the use_icount test, simply by
never setting cpu->can_do_io to 0 unless use_icount is true.
With these changes cpu_can_do_io boils down to a read of
cpu->can_do_io.
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Peter Maydell [Fri, 14 Aug 2015 17:06:44 +0000 (18:06 +0100)]
Merge remote-tracking branch 'remotes/stefanha/tags/net-pull-request' into staging
# gpg: Signature made Fri 14 Aug 2015 16:01:19 BST using RSA key ID
81AB73C8
# gpg: Good signature from "Stefan Hajnoczi <stefanha@redhat.com>"
# gpg: aka "Stefan Hajnoczi <stefanha@gmail.com>"
* remotes/stefanha/tags/net-pull-request:
tests: test rx recovery from cont
tests: introduce basic pci test for virtio-net
net/vmxnet3: Fix incorrect debug message
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>