can: m_can: pci: use custom bit timings for Elkhart Lake
authorMatthias Schiffer <matthias.schiffer@ew.tq-group.com>
Mon, 15 Nov 2021 09:18:52 +0000 (10:18 +0100)
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>
Wed, 22 Dec 2021 08:32:49 +0000 (09:32 +0100)
commit0e8ffdf3b86dfd44b651f91b12fcae76c25c453b
treef9b7ee03b56778b0e82a91f632a17e1a741332e9
parent274f4b342ba98432d58ec384a648872abc2fc2aa
can: m_can: pci: use custom bit timings for Elkhart Lake

commit ea4c1787685dbf9842046f05b6390b6901ee6ba2 upstream.

The relevant datasheet [1] specifies nonstandard limits for the bit timing
parameters. While it is unclear what the exact effect of violating these
limits is, it seems like a good idea to adhere to the documentation.

[1] Intel Atom® x6000E Series, and Intel® Pentium® and Celeron® N and J
    Series Processors for IoT Applications Datasheet,
    Volume 2 (Book 3 of 3), July 2021, Revision 001

Fixes: cab7ffc0324f ("can: m_can: add PCI glue driver for Intel Elkhart Lake")
Link: https://lore.kernel.org/all/9eba5d7c05a48ead4024ffa6e5926f191d8c6b38.1636967198.git.matthias.schiffer@ew.tq-group.com
Signed-off-by: Matthias Schiffer <matthias.schiffer@ew.tq-group.com>
Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
drivers/net/can/m_can/m_can_pci.c