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1 // SPDX-License-Identifier: GPL-2.0+

2 /*

3 *

5 *

6 * Notes: the MAX3100 doesn't provide an interrupt on CTS so we have

7 * to use polling for flow control. TX empty IRQ is unusable, since

8 * writing conf clears FIFO buffer and we cannot have this interrupt

9 * always asking us for attention.

10 *

11 * Example platform data:

13 static struct plat_max3100 max3100_plat_data = {

14 .loopback = 0,

15 .crystal = 0,

16 .poll_time = 100,

17 };

19 static struct spi_board_info spi_board_info[] = {

20 {

21 .modalias = "max3100",

22 .platform_data = &max3100_plat_data,

23 .irq = IRQ_EINT12,

24 .max_speed_hz = 5*1000*1000,

25 .chip_select = 0,

26 },

27 };

29 * The initial minor number is 209 in the low-density serial port:

30 * mknod /dev/ttyMAX0 c 204 209

31 */

33 #define MAX3100_MAJOR 204

34 #define MAX3100_MINOR 209

35 /* 4 MAX3100s should be enough for everyone */

36 #define MAX_MAX3100 4

38 #include <linux/delay.h>

39 #include <linux/slab.h>

40 #include <linux/device.h>

41 #include <linux/module.h>

42 #include <linux/serial_core.h>

43 #include <linux/serial.h>

44 #include <linux/spi/spi.h>

45 #include <linux/freezer.h>

46 #include <linux/tty.h>

47 #include <linux/tty_flip.h>

49 #include <linux/serial_max3100.h>

51 #define MAX3100_C (1<<14)

52 #define MAX3100_D (0<<14)

53 #define MAX3100_W (1<<15)

54 #define MAX3100_RX (0<<15)

56 #define MAX3100_WC (MAX3100_W | MAX3100_C)

57 #define MAX3100_RC (MAX3100_RX | MAX3100_C)

58 #define MAX3100_WD (MAX3100_W | MAX3100_D)

59 #define MAX3100_RD (MAX3100_RX | MAX3100_D)

60 #define MAX3100_CMD (3 << 14)

62 #define MAX3100_T (1<<14)

63 #define MAX3100_R (1<<15)

65 #define MAX3100_FEN (1<<13)

66 #define MAX3100_SHDN (1<<12)

67 #define MAX3100_TM (1<<11)

68 #define MAX3100_RM (1<<10)

69 #define MAX3100_PM (1<<9)

70 #define MAX3100_RAM (1<<8)

71 #define MAX3100_IR (1<<7)

72 #define MAX3100_ST (1<<6)

73 #define MAX3100_PE (1<<5)

74 #define MAX3100_L (1<<4)

75 #define MAX3100_BAUD (0xf)

77 #define MAX3100_TE (1<<10)

78 #define MAX3100_RAFE (1<<10)

79 #define MAX3100_RTS (1<<9)

80 #define MAX3100_CTS (1<<9)

81 #define MAX3100_PT (1<<8)

82 #define MAX3100_DATA (0xff)

84 #define MAX3100_RT (MAX3100_R | MAX3100_T)

85 #define MAX3100_RTC (MAX3100_RT | MAX3100_CTS | MAX3100_RAFE)

87 /* the following simulate a status reg for ignore_status_mask */

88 #define MAX3100_STATUS_PE 1

89 #define MAX3100_STATUS_FE 2

90 #define MAX3100_STATUS_OE 4

92 struct max3100_port {

93 struct uart_port port;

94 struct spi_device *spi;

96 int cts; /* last CTS received for flow ctrl */

97 int tx_empty; /* last TX empty bit */

99 spinlock_t conf_lock; /* shared data */

100 int conf_commit; /* need to make changes */

101 int conf; /* configuration for the MAX31000

102 * (bits 0-7, bits 8-11 are irqs) */

103 int rts_commit; /* need to change rts */

104 int rts; /* rts status */

105 int baud; /* current baud rate */

106

107 int parity; /* keeps track if we should send parity */

108 #define MAX3100_PARITY_ON 1

109 #define MAX3100_PARITY_ODD 2

110 #define MAX3100_7BIT 4

111 int rx_enabled; /* if we should rx chars */

112

113 int irq; /* irq assigned to the max3100 */

114

115 int minor; /* minor number */

116 int crystal; /* 1 if 3.6864Mhz crystal 0 for 1.8432 */

117 int loopback; /* 1 if we are in loopback mode */

118

119 /* for handling irqs: need workqueue since we do spi_sync */

120 struct workqueue_struct *workqueue;

121 struct work_struct work;

122 /* set to 1 to make the workhandler exit as soon as possible */

123 int force_end_work;

124 /* need to know we are suspending to avoid deadlock on workqueue */

125 int suspending;

126

127 /* hook for suspending MAX3100 via dedicated pin */

128 void (*max3100_hw_suspend) (int suspend);

129

130 /* poll time (in ms) for ctrl lines */

131 int poll_time;

132 /* and its timer */

133 struct timer_list timer;

134 };

135

136 static struct max3100_port *max3100s[MAX_MAX3100]; /* the chips */

137 static DEFINE_MUTEX(max3100s_lock); /* race on probe */

138

139 static int max3100_do_parity(struct max3100_port *s, u16 c)

140 {

141 int parity;

142

143 if (s->parity & MAX3100_PARITY_ODD)

144 parity = 1;

145 else

146 parity = 0;

147

148 if (s->parity & MAX3100_7BIT)

149 c &= 0x7f;

150 else

151 c &= 0xff;

152

153 parity = parity ^ (hweight8(c) & 1);

154 return parity;

155 }

156

157 static int max3100_check_parity(struct max3100_port *s, u16 c)

158 {

159 return max3100_do_parity(s, c) == ((c >> 8) & 1);

160 }

161

162 static void max3100_calc_parity(struct max3100_port *s, u16 *c)

163 {

164 if (s->parity & MAX3100_7BIT)

165 *c &= 0x7f;

166 else

167 *c &= 0xff;

168

169 if (s->parity & MAX3100_PARITY_ON)

170 *c |= max3100_do_parity(s, *c) << 8;

171 }

172

173 static void max3100_work(struct work_struct *w);

174

175 static void max3100_dowork(struct max3100_port *s)

176 {

177 if (!s->force_end_work && !freezing(current) && !s->suspending)

178 queue_work(s->workqueue, &s->work);

179 }

180

181 static void max3100_timeout(struct timer_list *t)

182 {

183 struct max3100_port *s = from_timer(s, t, timer);

184

185 if (s->port.state) {

186 max3100_dowork(s);

187 mod_timer(&s->timer, jiffies + s->poll_time);

188 }

189 }

190

191 static int max3100_sr(struct max3100_port *s, u16 tx, u16 *rx)

192 {

193 struct spi_message message;

194 u16 etx, erx;

195 int status;

196 struct spi_transfer tran = {

197 .tx_buf = &etx,

198 .rx_buf = &erx,

199 .len = 2,

200 };

201

202 etx = cpu_to_be16(tx);

203 spi_message_init(&message);

204 spi_message_add_tail(&tran, &message);

205 status = spi_sync(s->spi, &message);

206 if (status) {

207 dev_warn(&s->spi->dev, "error while calling spi_sync\n");

208 return -EIO;

209 }

210 *rx = be16_to_cpu(erx);

211 s->tx_empty = (*rx & MAX3100_T) > 0;

212 dev_dbg(&s->spi->dev, "%04x - %04x\n", tx, *rx);

213 return 0;

214 }

215

216 static int max3100_handlerx_unlocked(struct max3100_port *s, u16 rx)

217 {

218 unsigned int status = 0;

219 int ret = 0, cts;

220 u8 ch, flg;

221

222 if (rx & MAX3100_R && s->rx_enabled) {

223 dev_dbg(&s->spi->dev, "%s\n", __func__);

224 ch = rx & (s->parity & MAX3100_7BIT ? 0x7f : 0xff);

225 if (rx & MAX3100_RAFE) {

226 s->port.icount.frame++;

227 flg = TTY_FRAME;

228 status |= MAX3100_STATUS_FE;

229 } else {

230 if (s->parity & MAX3100_PARITY_ON) {

231 if (max3100_check_parity(s, rx)) {

232 s->port.icount.rx++;

233 flg = TTY_NORMAL;

234 } else {

235 s->port.icount.parity++;

236 flg = TTY_PARITY;

237 status |= MAX3100_STATUS_PE;

238 }

239 } else {

240 s->port.icount.rx++;

241 flg = TTY_NORMAL;

242 }

243 }

244 uart_insert_char(&s->port, status, MAX3100_STATUS_OE, ch, flg);

245 ret = 1;

246 }

247

248 cts = (rx & MAX3100_CTS) > 0;

249 if (s->cts != cts) {

250 s->cts = cts;

251 uart_handle_cts_change(&s->port, cts);

252 }

253

254 return ret;

255 }

256

257 static int max3100_handlerx(struct max3100_port *s, u16 rx)

258 {

259 unsigned long flags;

260 int ret;

261

262 uart_port_lock_irqsave(&s->port, &flags);

263 ret = max3100_handlerx_unlocked(s, rx);

264 uart_port_unlock_irqrestore(&s->port, flags);

265 return ret;

266 }

267

268 static void max3100_work(struct work_struct *w)

269 {

270 struct max3100_port *s = container_of(w, struct max3100_port, work);

271 struct tty_port *tport = &s->port.state->port;

272 unsigned char ch;

273 int rxchars;

274 u16 tx, rx;

275 int conf, cconf, crts;

276

277 dev_dbg(&s->spi->dev, "%s\n", __func__);

278

279 rxchars = 0;

280 do {

281 spin_lock(&s->conf_lock);

282 conf = s->conf;

283 cconf = s->conf_commit;

284 s->conf_commit = 0;

285 crts = s->rts_commit;

286 s->rts_commit = 0;

287 spin_unlock(&s->conf_lock);

288 if (cconf)

289 max3100_sr(s, MAX3100_WC | conf, &rx);

290 if (crts) {

291 max3100_sr(s, MAX3100_WD | MAX3100_TE |

292 (s->rts ? MAX3100_RTS : 0), &rx);

293 rxchars += max3100_handlerx(s, rx);

294 }

295

296 max3100_sr(s, MAX3100_RD, &rx);

297 rxchars += max3100_handlerx(s, rx);

298

299 if (rx & MAX3100_T) {

300 tx = 0xffff;

301 if (s->port.x_char) {

302 tx = s->port.x_char;

303 s->port.icount.tx++;

304 s->port.x_char = 0;

305 } else if (!uart_tx_stopped(&s->port) &&

306 uart_fifo_get(&s->port, &ch)) {

307 tx = ch;

308 }

309 if (tx != 0xffff) {

310 max3100_calc_parity(s, &tx);

311 tx |= MAX3100_WD | (s->rts ? MAX3100_RTS : 0);

312 max3100_sr(s, tx, &rx);

313 rxchars += max3100_handlerx(s, rx);

314 }

315 }

316

317 if (rxchars > 16) {

318 tty_flip_buffer_push(&s->port.state->port);

319 rxchars = 0;

320 }

321 if (kfifo_len(&tport->xmit_fifo) < WAKEUP_CHARS)

322 uart_write_wakeup(&s->port);

323

324 } while (!s->force_end_work &&

325 !freezing(current) &&

326 ((rx & MAX3100_R) ||

327 (!kfifo_is_empty(&tport->xmit_fifo) &&

328 !uart_tx_stopped(&s->port))));

329

330 if (rxchars > 0)

331 tty_flip_buffer_push(&s->port.state->port);

332 }

333

334 static irqreturn_t max3100_irq(int irqno, void *dev_id)

335 {

336 struct max3100_port *s = dev_id;

337

338 dev_dbg(&s->spi->dev, "%s\n", __func__);

339

340 max3100_dowork(s);

341 return IRQ_HANDLED;

342 }

343

344 static void max3100_enable_ms(struct uart_port *port)

345 {

346 struct max3100_port *s = container_of(port,

347 struct max3100_port,

348 port);

349

350 if (s->poll_time > 0)

351 mod_timer(&s->timer, jiffies);

352 dev_dbg(&s->spi->dev, "%s\n", __func__);

353 }

354

355 static void max3100_start_tx(struct uart_port *port)

356 {

357 struct max3100_port *s = container_of(port,

358 struct max3100_port,

359 port);

360

361 dev_dbg(&s->spi->dev, "%s\n", __func__);

362

363 max3100_dowork(s);

364 }

365

366 static void max3100_stop_rx(struct uart_port *port)

367 {

368 struct max3100_port *s = container_of(port,

369 struct max3100_port,

370 port);

371

372 dev_dbg(&s->spi->dev, "%s\n", __func__);

373

374 s->rx_enabled = 0;

375 spin_lock(&s->conf_lock);

376 s->conf &= ~MAX3100_RM;

377 s->conf_commit = 1;

378 spin_unlock(&s->conf_lock);

379 max3100_dowork(s);

380 }

381

382 static unsigned int max3100_tx_empty(struct uart_port *port)

383 {

384 struct max3100_port *s = container_of(port,

385 struct max3100_port,

386 port);

387

388 dev_dbg(&s->spi->dev, "%s\n", __func__);

389

390 /* may not be truly up-to-date */

391 max3100_dowork(s);

392 return s->tx_empty;

393 }

394

395 static unsigned int max3100_get_mctrl(struct uart_port *port)

396 {

397 struct max3100_port *s = container_of(port,

398 struct max3100_port,

399 port);

400

401 dev_dbg(&s->spi->dev, "%s\n", __func__);

402

403 /* may not be truly up-to-date */

404 max3100_dowork(s);

405 /* always assert DCD and DSR since these lines are not wired */

406 return (s->cts ? TIOCM_CTS : 0) | TIOCM_DSR | TIOCM_CAR;

407 }

408

409 static void max3100_set_mctrl(struct uart_port *port, unsigned int mctrl)

410 {

411 struct max3100_port *s = container_of(port,

412 struct max3100_port,

413 port);

414 int rts;

415

416 dev_dbg(&s->spi->dev, "%s\n", __func__);

417

418 rts = (mctrl & TIOCM_RTS) > 0;

419

420 spin_lock(&s->conf_lock);

421 if (s->rts != rts) {

422 s->rts = rts;

423 s->rts_commit = 1;

424 max3100_dowork(s);

425 }

426 spin_unlock(&s->conf_lock);

427 }

428

429 static void

430 max3100_set_termios(struct uart_port *port, struct ktermios *termios,

431 const struct ktermios *old)

432 {

433 struct max3100_port *s = container_of(port,

434 struct max3100_port,

435 port);

436 int baud = 0;

437 unsigned cflag;

438 u32 param_new, param_mask, parity = 0;

439

440 dev_dbg(&s->spi->dev, "%s\n", __func__);

441

442 cflag = termios->c_cflag;

443 param_mask = 0;

444

445 baud = tty_termios_baud_rate(termios);

446 param_new = s->conf & MAX3100_BAUD;

447 switch (baud) {

448 case 300:

449 if (s->crystal)

450 baud = s->baud;

451 else

452 param_new = 15;

453 break;

454 case 600:

455 param_new = 14 + s->crystal;

456 break;

457 case 1200:

458 param_new = 13 + s->crystal;

459 break;

460 case 2400:

461 param_new = 12 + s->crystal;

462 break;

463 case 4800:

464 param_new = 11 + s->crystal;

465 break;

466 case 9600:

467 param_new = 10 + s->crystal;

468 break;

469 case 19200:

470 param_new = 9 + s->crystal;

471 break;

472 case 38400:

473 param_new = 8 + s->crystal;

474 break;

475 case 57600:

476 param_new = 1 + s->crystal;

477 break;

478 case 115200:

479 param_new = 0 + s->crystal;

480 break;

481 case 230400:

482 if (s->crystal)

483 param_new = 0;

484 else

485 baud = s->baud;

486 break;

487 default:

488 baud = s->baud;

489 }

490 tty_termios_encode_baud_rate(termios, baud, baud);

491 s->baud = baud;

492 param_mask |= MAX3100_BAUD;

493

494 if ((cflag & CSIZE) == CS8) {

495 param_new &= ~MAX3100_L;

496 parity &= ~MAX3100_7BIT;

497 } else {

498 param_new |= MAX3100_L;

499 parity |= MAX3100_7BIT;

500 cflag = (cflag & ~CSIZE) | CS7;

501 }

502 param_mask |= MAX3100_L;

503

504 if (cflag & CSTOPB)

505 param_new |= MAX3100_ST;

506 else

507 param_new &= ~MAX3100_ST;

508 param_mask |= MAX3100_ST;

509

510 if (cflag & PARENB) {

511 param_new |= MAX3100_PE;

512 parity |= MAX3100_PARITY_ON;

513 } else {

514 param_new &= ~MAX3100_PE;

515 parity &= ~MAX3100_PARITY_ON;

516 }

517 param_mask |= MAX3100_PE;

518

519 if (cflag & PARODD)

520 parity |= MAX3100_PARITY_ODD;

521 else

522 parity &= ~MAX3100_PARITY_ODD;

523

524 /* mask termios capabilities we don't support */

525 cflag &= ~CMSPAR;

526 termios->c_cflag = cflag;

527

528 s->port.ignore_status_mask = 0;

529 if (termios->c_iflag & IGNPAR)

530 s->port.ignore_status_mask |=

531 MAX3100_STATUS_PE | MAX3100_STATUS_FE |

532 MAX3100_STATUS_OE;

533

534 if (s->poll_time > 0)

535 del_timer_sync(&s->timer);

536

537 uart_update_timeout(port, termios->c_cflag, baud);

538

539 spin_lock(&s->conf_lock);

540 s->conf = (s->conf & ~param_mask) | (param_new & param_mask);

541 s->conf_commit = 1;

542 s->parity = parity;

543 spin_unlock(&s->conf_lock);

544 max3100_dowork(s);

545

546 if (UART_ENABLE_MS(&s->port, termios->c_cflag))

547 max3100_enable_ms(&s->port);

548 }

549

550 static void max3100_shutdown(struct uart_port *port)

551 {

552 struct max3100_port *s = container_of(port,

553 struct max3100_port,

554 port);

555

556 dev_dbg(&s->spi->dev, "%s\n", __func__);

557

558 if (s->suspending)

559 return;

560

561 s->force_end_work = 1;

562

563 if (s->poll_time > 0)

564 del_timer_sync(&s->timer);

565

566 if (s->workqueue) {

567 destroy_workqueue(s->workqueue);

568 s->workqueue = NULL;

569 }

570 if (s->irq)

571 free_irq(s->irq, s);

572

573 /* set shutdown mode to save power */

574 if (s->max3100_hw_suspend)

575 s->max3100_hw_suspend(1);

576 else {

577 u16 tx, rx;

578

579 tx = MAX3100_WC | MAX3100_SHDN;

580 max3100_sr(s, tx, &rx);

581 }

582 }

583

584 static int max3100_startup(struct uart_port *port)

585 {

586 struct max3100_port *s = container_of(port,

587 struct max3100_port,

588 port);

589 char b[12];

590

591 dev_dbg(&s->spi->dev, "%s\n", __func__);

592

593 s->conf = MAX3100_RM;

594 s->baud = s->crystal ? 230400 : 115200;

595 s->rx_enabled = 1;

596

597 if (s->suspending)

598 return 0;

599

600 s->force_end_work = 0;

601 s->parity = 0;

602 s->rts = 0;

603

604 sprintf(b, "max3100-%d", s->minor);

605 s->workqueue = create_freezable_workqueue(b);

606 if (!s->workqueue) {

607 dev_warn(&s->spi->dev, "cannot create workqueue\n");

608 return -EBUSY;

609 }

610 INIT_WORK(&s->work, max3100_work);

611

612 if (request_irq(s->irq, max3100_irq,

613 IRQF_TRIGGER_FALLING, "max3100", s) < 0) {

614 dev_warn(&s->spi->dev, "cannot allocate irq %d\n", s->irq);

615 s->irq = 0;

616 destroy_workqueue(s->workqueue);

617 s->workqueue = NULL;

618 return -EBUSY;

619 }

620

621 if (s->loopback) {

622 u16 tx, rx;

623 tx = 0x4001;

624 max3100_sr(s, tx, &rx);

625 }

626

627 if (s->max3100_hw_suspend)

628 s->max3100_hw_suspend(0);

629 s->conf_commit = 1;

630 max3100_dowork(s);

631 /* wait for clock to settle */

632 msleep(50);

633

634 max3100_enable_ms(&s->port);

635

636 return 0;

637 }

638

639 static const char *max3100_type(struct uart_port *port)

640 {

641 struct max3100_port *s = container_of(port,

642 struct max3100_port,

643 port);

644

645 dev_dbg(&s->spi->dev, "%s\n", __func__);

646

647 return s->port.type == PORT_MAX3100 ? "MAX3100" : NULL;

648 }

649

650 static void max3100_release_port(struct uart_port *port)

651 {

652 struct max3100_port *s = container_of(port,

653 struct max3100_port,

654 port);

655

656 dev_dbg(&s->spi->dev, "%s\n", __func__);

657 }

658

659 static void max3100_config_port(struct uart_port *port, int flags)

660 {

661 struct max3100_port *s = container_of(port,

662 struct max3100_port,

663 port);

664

665 dev_dbg(&s->spi->dev, "%s\n", __func__);

666

667 if (flags & UART_CONFIG_TYPE)

668 s->port.type = PORT_MAX3100;

669 }

670

671 static int max3100_verify_port(struct uart_port *port,

672 struct serial_struct *ser)

673 {

674 struct max3100_port *s = container_of(port,

675 struct max3100_port,

676 port);

677 int ret = -EINVAL;

678

679 dev_dbg(&s->spi->dev, "%s\n", __func__);

680

681 if (ser->type == PORT_UNKNOWN || ser->type == PORT_MAX3100)

682 ret = 0;

683 return ret;

684 }

685

686 static void max3100_stop_tx(struct uart_port *port)

687 {

688 struct max3100_port *s = container_of(port,

689 struct max3100_port,

690 port);

691

692 dev_dbg(&s->spi->dev, "%s\n", __func__);

693 }

694

695 static int max3100_request_port(struct uart_port *port)

696 {

697 struct max3100_port *s = container_of(port,

698 struct max3100_port,

699 port);

700

701 dev_dbg(&s->spi->dev, "%s\n", __func__);

702 return 0;

703 }

704

705 static void max3100_break_ctl(struct uart_port *port, int break_state)

706 {

707 struct max3100_port *s = container_of(port,

708 struct max3100_port,

709 port);

710

711 dev_dbg(&s->spi->dev, "%s\n", __func__);

712 }

713

714 static const struct uart_ops max3100_ops = {

715 .tx_empty = max3100_tx_empty,

716 .set_mctrl = max3100_set_mctrl,

717 .get_mctrl = max3100_get_mctrl,

718 .stop_tx = max3100_stop_tx,

719 .start_tx = max3100_start_tx,

720 .stop_rx = max3100_stop_rx,

721 .enable_ms = max3100_enable_ms,

722 .break_ctl = max3100_break_ctl,

723 .startup = max3100_startup,

724 .shutdown = max3100_shutdown,

725 .set_termios = max3100_set_termios,

726 .type = max3100_type,

727 .release_port = max3100_release_port,

728 .request_port = max3100_request_port,

729 .config_port = max3100_config_port,

730 .verify_port = max3100_verify_port,

731 };

732

733 static struct uart_driver max3100_uart_driver = {

734 .owner = THIS_MODULE,

735 .driver_name = "ttyMAX",

736 .dev_name = "ttyMAX",

737 .major = MAX3100_MAJOR,

738 .minor = MAX3100_MINOR,

739 .nr = MAX_MAX3100,

740 };

741 static int uart_driver_registered;

742

743 static int max3100_probe(struct spi_device *spi)

744 {

745 int i, retval;

746 struct plat_max3100 *pdata;

747 u16 tx, rx;

748

749 mutex_lock(&max3100s_lock);

750

751 if (!uart_driver_registered) {

752 retval = uart_register_driver(&max3100_uart_driver);

753 if (retval) {

754 printk(KERN_ERR "Couldn't register max3100 uart driver\n");

755 mutex_unlock(&max3100s_lock);

756 return retval;

757 }

758

759 uart_driver_registered = 1;

760 }

761

762 for (i = 0; i < MAX_MAX3100; i++)

763 if (!max3100s[i])

764 break;

765 if (i == MAX_MAX3100) {

766 dev_warn(&spi->dev, "too many MAX3100 chips\n");

767 mutex_unlock(&max3100s_lock);

768 return -ENOMEM;

769 }

770

771 max3100s[i] = kzalloc(sizeof(struct max3100_port), GFP_KERNEL);

772 if (!max3100s[i]) {

773 dev_warn(&spi->dev,

774 "kmalloc for max3100 structure %d failed!\n", i);

775 mutex_unlock(&max3100s_lock);

776 return -ENOMEM;

777 }

778 max3100s[i]->spi = spi;

779 max3100s[i]->irq = spi->irq;

780 spin_lock_init(&max3100s[i]->conf_lock);

781 spi_set_drvdata(spi, max3100s[i]);

782 pdata = dev_get_platdata(&spi->dev);

783 max3100s[i]->crystal = pdata->crystal;

784 max3100s[i]->loopback = pdata->loopback;

785 max3100s[i]->poll_time = msecs_to_jiffies(pdata->poll_time);

786 if (pdata->poll_time > 0 && max3100s[i]->poll_time == 0)

787 max3100s[i]->poll_time = 1;

788 max3100s[i]->max3100_hw_suspend = pdata->max3100_hw_suspend;

789 max3100s[i]->minor = i;

790 timer_setup(&max3100s[i]->timer, max3100_timeout, 0);

791

792 dev_dbg(&spi->dev, "%s: adding port %d\n", __func__, i);

793 max3100s[i]->port.irq = max3100s[i]->irq;

794 max3100s[i]->port.uartclk = max3100s[i]->crystal ? 3686400 : 1843200;

795 max3100s[i]->port.fifosize = 16;

796 max3100s[i]->port.ops = &max3100_ops;

797 max3100s[i]->port.flags = UPF_SKIP_TEST | UPF_BOOT_AUTOCONF;

798 max3100s[i]->port.line = i;

799 max3100s[i]->port.type = PORT_MAX3100;

800 max3100s[i]->port.dev = &spi->dev;

801 retval = uart_add_one_port(&max3100_uart_driver, &max3100s[i]->port);

802 if (retval < 0)

803 dev_warn(&spi->dev,

804 "uart_add_one_port failed for line %d with error %d\n",

805 i, retval);

806

807 /* set shutdown mode to save power. Will be woken-up on open */

808 if (max3100s[i]->max3100_hw_suspend)

809 max3100s[i]->max3100_hw_suspend(1);

810 else {

811 tx = MAX3100_WC | MAX3100_SHDN;

812 max3100_sr(max3100s[i], tx, &rx);

813 }

814 mutex_unlock(&max3100s_lock);

815 return 0;

816 }

817

818 static void max3100_remove(struct spi_device *spi)

819 {

820 struct max3100_port *s = spi_get_drvdata(spi);

821 int i;

822

823 mutex_lock(&max3100s_lock);

824

825 /* find out the index for the chip we are removing */

826 for (i = 0; i < MAX_MAX3100; i++)

827 if (max3100s[i] == s) {

828 dev_dbg(&spi->dev, "%s: removing port %d\n", __func__, i);

829 uart_remove_one_port(&max3100_uart_driver, &max3100s[i]->port);

830 kfree(max3100s[i]);

831 max3100s[i] = NULL;

832 break;

833 }

834

835 WARN_ON(i == MAX_MAX3100);

836

837 /* check if this is the last chip we have */

838 for (i = 0; i < MAX_MAX3100; i++)

839 if (max3100s[i]) {

840 mutex_unlock(&max3100s_lock);

841 return;

842 }

843 pr_debug("removing max3100 driver\n");

844 uart_unregister_driver(&max3100_uart_driver);

845 uart_driver_registered = 0;

846

847 mutex_unlock(&max3100s_lock);

848 }

849

850 #ifdef CONFIG_PM_SLEEP

851

852 static int max3100_suspend(struct device *dev)

853 {

854 struct max3100_port *s = dev_get_drvdata(dev);

855

856 dev_dbg(&s->spi->dev, "%s\n", __func__);

857

858 disable_irq(s->irq);

859

860 s->suspending = 1;

861 uart_suspend_port(&max3100_uart_driver, &s->port);

862

863 if (s->max3100_hw_suspend)

864 s->max3100_hw_suspend(1);

865 else {

866 /* no HW suspend, so do SW one */

867 u16 tx, rx;

868

869 tx = MAX3100_WC | MAX3100_SHDN;

870 max3100_sr(s, tx, &rx);

871 }

872 return 0;

873 }

874

875 static int max3100_resume(struct device *dev)

876 {

877 struct max3100_port *s = dev_get_drvdata(dev);

878

879 dev_dbg(&s->spi->dev, "%s\n", __func__);

880

881 if (s->max3100_hw_suspend)

882 s->max3100_hw_suspend(0);

883 uart_resume_port(&max3100_uart_driver, &s->port);

884 s->suspending = 0;

885

886 enable_irq(s->irq);

887

888 s->conf_commit = 1;

889 if (s->workqueue)

890 max3100_dowork(s);

891

892 return 0;

893 }

894

895 static SIMPLE_DEV_PM_OPS(max3100_pm_ops, max3100_suspend, max3100_resume);

896 #define MAX3100_PM_OPS (&max3100_pm_ops)

897

898 #else

899 #define MAX3100_PM_OPS NULL

900 #endif

901

902 static struct spi_driver max3100_driver = {

903 .driver = {

904 .name = "max3100",

905 .pm = MAX3100_PM_OPS,

906 },

907 .probe = max3100_probe,

908 .remove = max3100_remove,

909 };

910

911 module_spi_driver(max3100_driver);

912

913 MODULE_DESCRIPTION("MAX3100 driver");

914 MODULE_AUTHOR("Christian Pellegrin <chripell@evolware.org>");

915 MODULE_LICENSE("GPL");

916 MODULE_ALIAS("spi:max3100");