drm/i915/psr: Move writing early transport pipe src
authorJouni Högander <jouni.hogander@intel.com>
Tue, 19 Mar 2024 12:33:24 +0000 (14:33 +0200)
committerJouni Högander <jouni.hogander@intel.com>
Thu, 28 Mar 2024 13:04:41 +0000 (15:04 +0200)
commitb52c4093b0c9089b00b42823d41986a94d32e341
tree9aa577d79f7c8b0b040e5e261f4ef4ee4e91ddd1
parentf3b899f0b4b17fa0b20e27c23f78604d5686383d
drm/i915/psr: Move writing early transport pipe src

Currently PIPE_SRCSZ_ERLY_TPT is written in
intel_display.c:intel_set_pipe_src_size. This doesn't work as
intel_set_pipe_src_size is called only on modeset.

Bspec: 68927

Fixes: 3291bbb93e16 ("drm/i915/psr: Configure PIPE_SRCSZ_ERLY_TPT for psr2 early transport")
Signed-off-by: Jouni Högander <jouni.hogander@intel.com>
Reviewed-by: Mika Kahola <mika.kahola@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20240319123327.1661097-3-jouni.hogander@intel.com
drivers/gpu/drm/i915/display/intel_display.c
drivers/gpu/drm/i915/display/intel_psr.c