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(parent: a8e5387) | patch
rtw88: fix RX clock gate setting while fifo dump
authorZong-Zhe Yang <kevin_yang@realtek.com>
Mon, 27 Sep 2021 11:18:30 +0000 (19:18 +0800)
committerKalle Valo <kvalo@codeaurora.org>
Tue, 5 Oct 2021 05:27:48 +0000 (08:27 +0300)
commitc5a8e90730a322f236731fc347dd3afa5db5550e
treef3f5e88bcc77de188d61fc56bb8894c81b80041ctree | snapshot
parenta8e5387f8362e9da66fdc76a2e761ad618ae16dbcommit | diff
rtw88: fix RX clock gate setting while fifo dump

When fw fifo dumps, RX clock gating should be disabled to avoid
something unexpected. However, the register operation ran into
a mistake. So, we fix it.

Signed-off-by: Zong-Zhe Yang <kevin_yang@realtek.com>
Signed-off-by: Ping-Ke Shih <pkshih@realtek.com>
Signed-off-by: Kalle Valo <kvalo@codeaurora.org>
Link: https://lore.kernel.org/r/20210927111830.5354-1-pkshih@realtek.com
drivers/net/wireless/realtek/rtw88/fw.c diff | blob | history
drivers/net/wireless/realtek/rtw88/reg.h diff | blob | history
ep93xx device tree rework repo: git://git.maquefel.me/linux.git