From 0316da6bbcb7d78017f8f177399bff5ff889456a Mon Sep 17 00:00:00 2001 From: Dmitry Baryshkov Date: Thu, 3 Mar 2022 01:54:09 +0300 Subject: [PATCH] arm64: dts: qcom: sdm845: Drop flags for mdss irqs The number of interrupt cells for the mdss interrupt controller is 1, meaning there should only be one cell for the interrupt number, not two. Drop the second cell containing (unused) irq flags. Reviewed-by: Stephen Boyd Fixes: 08c2a076d18f ("arm64: dts: qcom: sdm845: Add dpu to sdm845 dts file") Signed-off-by: Dmitry Baryshkov Reviewed-by: Marijn Suijten Reviewed-by: Abhinav Kumar Signed-off-by: Bjorn Andersson Link: https://lore.kernel.org/r/20220302225411.2456001-4-dmitry.baryshkov@linaro.org --- arch/arm64/boot/dts/qcom/sdm845.dtsi | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/sdm845.dtsi b/arch/arm64/boot/dts/qcom/sdm845.dtsi index a49376d8ecbf3..692cf4be4eef5 100644 --- a/arch/arm64/boot/dts/qcom/sdm845.dtsi +++ b/arch/arm64/boot/dts/qcom/sdm845.dtsi @@ -4283,7 +4283,7 @@ power-domains = <&rpmhpd SDM845_CX>; interrupt-parent = <&mdss>; - interrupts = <0 IRQ_TYPE_LEVEL_HIGH>; + interrupts = <0>; ports { #address-cells = <1>; @@ -4335,7 +4335,7 @@ reg-names = "dsi_ctrl"; interrupt-parent = <&mdss>; - interrupts = <4 IRQ_TYPE_LEVEL_HIGH>; + interrupts = <4>; clocks = <&dispcc DISP_CC_MDSS_BYTE0_CLK>, <&dispcc DISP_CC_MDSS_BYTE0_INTF_CLK>, @@ -4407,7 +4407,7 @@ reg-names = "dsi_ctrl"; interrupt-parent = <&mdss>; - interrupts = <5 IRQ_TYPE_LEVEL_HIGH>; + interrupts = <5>; clocks = <&dispcc DISP_CC_MDSS_BYTE1_CLK>, <&dispcc DISP_CC_MDSS_BYTE1_INTF_CLK>, -- 2.30.2