From 05b6ca9bbcaede74120050aa8e6684300c09257c Mon Sep 17 00:00:00 2001
From: Bastian Koppelmann <kbastian@mail.uni-paderborn.de>
Date: Fri, 22 May 2015 12:15:56 +0200
Subject: [PATCH] target-tricore: fix OPC2_32_RR_DVINIT_HU having write before
use on the result
If the argument r1 was the same as the extended result register r3+1, we would
overwrite r1 and then use it.
Signed-off-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de>
Message-Id: <1432289758-6250-2-git-send-email-kbastian@mail.uni-paderborn.de>
---
target-tricore/translate.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/target-tricore/translate.c b/target-tricore/translate.c
index 5f8eff04fa..6c14843438 100644
--- a/target-tricore/translate.c
+++ b/target-tricore/translate.c
@@ -6451,8 +6451,8 @@ static void decode_rr_divide(CPUTriCoreState *env, DisasContext *ctx)
/* sv */
tcg_gen_or_tl(cpu_PSW_SV, cpu_PSW_SV, cpu_PSW_V);
/* write result */
- tcg_gen_mov_tl(cpu_gpr_d[r3+1], temp3);
tcg_gen_shli_tl(cpu_gpr_d[r3], cpu_gpr_d[r1], 16);
+ tcg_gen_mov_tl(cpu_gpr_d[r3+1], temp3);
tcg_temp_free(temp);
tcg_temp_free(temp2);
tcg_temp_free(temp3);
--
2.30.2