From 08573ba006ab7bc29c183e0b3c362a0b34f1d87b Mon Sep 17 00:00:00 2001 From: Chen Wang Date: Tue, 30 Jan 2024 09:50:51 +0800 Subject: [PATCH] riscv: dts: add resets property for uart node Add resets property for uart0 for completeness, although it is deasserted by default. Signed-off-by: Chen Wang Reviewed-by: Inochi Amaoto Link: https://lore.kernel.org/r/807f75e433a0f900da40ebb6a448349c98580072.1706577450.git.unicorn_wang@outlook.com Signed-off-by: Inochi Amaoto --- arch/riscv/boot/dts/sophgo/sg2042.dtsi | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/riscv/boot/dts/sophgo/sg2042.dtsi b/arch/riscv/boot/dts/sophgo/sg2042.dtsi index eeb341e16bfd6..81fda312f988c 100644 --- a/arch/riscv/boot/dts/sophgo/sg2042.dtsi +++ b/arch/riscv/boot/dts/sophgo/sg2042.dtsi @@ -343,6 +343,7 @@ clock-frequency = <500000000>; reg-shift = <2>; reg-io-width = <4>; + resets = <&rstgen RST_UART0>; status = "disabled"; }; }; -- 2.30.2