From 0b414c731432917c83353c446e60ee838c9a9cfd Mon Sep 17 00:00:00 2001 From: Rob Clark Date: Thu, 30 Nov 2023 11:21:18 -0800 Subject: [PATCH] drm/msm/dpu: Correct UBWC settings for sc8280xp The UBWC settings need to match between the display and GPU. When we updated the GPU settings, we forgot to make the corresponding update on the display side. Reported-by: Steev Klimaszewski Fixes: 07e6de738aa6 ("drm/msm/a690: Fix reg values for a690") Signed-off-by: Rob Clark Tested-by: Steev Klimaszewski Reviewed-by: Abhinav Kumar Patchwork: https://patchwork.freedesktop.org/patch/569817/ Link: https://lore.kernel.org/r/20231130192119.32538-1-robdclark@gmail.com Signed-off-by: Dmitry Baryshkov --- drivers/gpu/drm/msm/msm_mdss.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/msm/msm_mdss.c b/drivers/gpu/drm/msm/msm_mdss.c index 6865db1e3ce89..29bb38f0bb2ce 100644 --- a/drivers/gpu/drm/msm/msm_mdss.c +++ b/drivers/gpu/drm/msm/msm_mdss.c @@ -545,7 +545,7 @@ static const struct msm_mdss_data sc8280xp_data = { .ubwc_dec_version = UBWC_4_0, .ubwc_swizzle = 6, .ubwc_static = 1, - .highest_bank_bit = 2, + .highest_bank_bit = 3, .macrotile_mode = 1, }; -- 2.30.2