From 10d900a834da29cf753f1e45f66982e322a177c1 Mon Sep 17 00:00:00 2001 From: Bartosz Golaszewski Date: Thu, 9 Mar 2023 15:35:50 +0100 Subject: [PATCH] arm64: dts: sm8150: add the QUPv3 high-speed UART node Add the high-speed UART node to the dtsi for sm8150. Signed-off-by: Bartosz Golaszewski Signed-off-by: Bjorn Andersson Link: https://lore.kernel.org/r/20230309143551.200694-2-brgl@bgdev.pl --- arch/arm64/boot/dts/qcom/sm8150.dtsi | 21 +++++++++++++++++++++ 1 file changed, 21 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sm8150.dtsi b/arch/arm64/boot/dts/qcom/sm8150.dtsi index fd20096cfc6e3..bfa19414c4bef 100644 --- a/arch/arm64/boot/dts/qcom/sm8150.dtsi +++ b/arch/arm64/boot/dts/qcom/sm8150.dtsi @@ -1334,6 +1334,20 @@ status = "disabled"; }; + uart9: serial@a8c000 { + compatible = "qcom,geni-uart"; + reg = <0x0 0x00a84000 0x0 0x4000>; + reg-names = "se"; + clocks = <&gcc GCC_QUPV3_WRAP1_S1_CLK>; + clock-names = "se"; + pinctrl-0 = <&qup_uart9_default>; + pinctrl-names = "default"; + interrupts = ; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; + i2c10: i2c@a88000 { compatible = "qcom,geni-i2c"; reg = <0 0x00a88000 0 0x4000>; @@ -2425,6 +2439,13 @@ bias-disable; }; + qup_uart9_default: qup-uart9-default-state { + pins = "gpio41", "gpio42"; + function = "qup9"; + drive-strength = <2>; + bias-disable; + }; + qup_i2c10_default: qup-i2c10-default-state { pins = "gpio9", "gpio10"; function = "qup10"; -- 2.30.2