From 10fb3e2746eee0bf278c797a86fedc665bbb0ad2 Mon Sep 17 00:00:00 2001 From: Geert Uytterhoeven Date: Tue, 31 Jan 2023 12:32:33 +0100 Subject: [PATCH] arm64: dts: renesas: falcon: Describe CAN clock Describe the 40 MHz Crystal Clock Oscillator providing CAN_CLK. Signed-off-by: Geert Uytterhoeven Link: https://lore.kernel.org/r/0bf36a1708ad87c00455b96ebaacc63fb7305b7a.1675164686.git.geert+renesas@glider.be --- arch/arm64/boot/dts/renesas/r8a779a0-falcon.dts | 11 ++++++++++- 1 file changed, 10 insertions(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/renesas/r8a779a0-falcon.dts b/arch/arm64/boot/dts/renesas/r8a779a0-falcon.dts index b2e67b82caf6e..63db822e5f466 100644 --- a/arch/arm64/boot/dts/renesas/r8a779a0-falcon.dts +++ b/arch/arm64/boot/dts/renesas/r8a779a0-falcon.dts @@ -37,8 +37,12 @@ }; }; +&can_clk { + clock-frequency = <40000000>; +}; + &canfd { - pinctrl-0 = <&canfd0_pins>, <&canfd1_pins>; + pinctrl-0 = <&canfd0_pins>, <&canfd1_pins>, <&can_clk_pins>; pinctrl-names = "default"; status = "okay"; @@ -80,6 +84,11 @@ }; + can_clk_pins: can-clk { + groups = "can_clk"; + function = "can_clk"; + }; + canfd0_pins: canfd0 { groups = "canfd0_data"; function = "canfd0"; -- 2.30.2