From 11e03d692101e484df9322f892a8b6e111a82bfd Mon Sep 17 00:00:00 2001 From: Sibi Sankar Date: Thu, 29 Jul 2021 23:34:44 +0530 Subject: [PATCH] arm64: dts: qcom: sc7280: Fixup the cpufreq node Fixup the register regions used by the cpufreq node on SC7280 SoC to support per core L3 DCVS. Fixes: 7dbd121a2c58 ("arm64: dts: qcom: sc7280: Add cpufreq hw node") Signed-off-by: Sibi Sankar Reviewed-by: Stephen Boyd Link: https://lore.kernel.org/r/1627581885-32165-4-git-send-email-sibis@codeaurora.org Signed-off-by: Bjorn Andersson --- arch/arm64/boot/dts/qcom/sc7280.dtsi | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/sc7280.dtsi b/arch/arm64/boot/dts/qcom/sc7280.dtsi index b5a5685193c42..dbbeb3a94a6de 100644 --- a/arch/arm64/boot/dts/qcom/sc7280.dtsi +++ b/arch/arm64/boot/dts/qcom/sc7280.dtsi @@ -1795,9 +1795,9 @@ cpufreq_hw: cpufreq@18591000 { compatible = "qcom,cpufreq-epss"; - reg = <0 0x18591000 0 0x1000>, - <0 0x18592000 0 0x1000>, - <0 0x18593000 0 0x1000>; + reg = <0 0x18591100 0 0x900>, + <0 0x18592100 0 0x900>, + <0 0x18593100 0 0x900>; clocks = <&rpmhcc RPMH_CXO_CLK>, <&gcc GCC_GPLL0>; clock-names = "xo", "alternate"; #freq-domain-cells = <1>; -- 2.30.2