From 17f65658c8adce6233f9e53be59d399af6180059 Mon Sep 17 00:00:00 2001 From: Matt Roper Date: Tue, 7 Jun 2022 10:57:16 -0700 Subject: [PATCH] drm/i915/xehp: Correct steering initialization Another mistake during the conversion to DSS bitmaps: after retrieving the DSS ID intel_sseu_find_first_xehp_dss() we forgot to modulo it down to obtain which ID within the current gslice it is. Fixes: b87d39019651 ("drm/i915/sseu: Disassociate internal subslice mask representation from uapi") Cc: Balasubramani Vivekanandan Signed-off-by: Matt Roper Acked-by: Balasubramani Vivekanandan Link: https://patchwork.freedesktop.org/patch/msgid/20220607175716.3338661-1-matthew.d.roper@intel.com --- drivers/gpu/drm/i915/gt/intel_workarounds.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/i915/gt/intel_workarounds.c b/drivers/gpu/drm/i915/gt/intel_workarounds.c index aeadbb3b72cbc..1ee54a83e459b 100644 --- a/drivers/gpu/drm/i915/gt/intel_workarounds.c +++ b/drivers/gpu/drm/i915/gt/intel_workarounds.c @@ -1177,8 +1177,8 @@ xehp_init_mcr(struct intel_gt *gt, struct i915_wa_list *wal) } slice = __ffs(slice_mask); - subslice = intel_sseu_find_first_xehp_dss(sseu, GEN_DSS_PER_GSLICE, slice); - WARN_ON(subslice > GEN_DSS_PER_GSLICE); + subslice = intel_sseu_find_first_xehp_dss(sseu, GEN_DSS_PER_GSLICE, slice) % + GEN_DSS_PER_GSLICE; __add_mcr_wa(gt, wal, slice, subslice); -- 2.30.2