From 194bdb859950a4223305ee766a3b9d90c398d158 Mon Sep 17 00:00:00 2001 From: Lucas De Marchi Date: Wed, 27 Sep 2023 12:38:57 -0700 Subject: [PATCH] drm/xe/dg2: Fix using wrong PAT table DG2 should use the MCR variant to program the PAT registers, like PVC, but shouldn't use the same table as PVC. Reviewed-by: Matt Roper Link: https://lore.kernel.org/r/20230927193902.2849159-7-lucas.demarchi@intel.com Signed-off-by: Lucas De Marchi Signed-off-by: Rodrigo Vivi --- drivers/gpu/drm/xe/xe_pat.c | 10 +++++++++- 1 file changed, 9 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/xe/xe_pat.c b/drivers/gpu/drm/xe/xe_pat.c index 28f401c500d8f..a4bebdedbbd96 100644 --- a/drivers/gpu/drm/xe/xe_pat.c +++ b/drivers/gpu/drm/xe/xe_pat.c @@ -108,10 +108,18 @@ void xe_pat_init_early(struct xe_device *xe) xe->pat.ops = &mtl_pat_ops; xe->pat.table = mtl_pat_table; xe->pat.n_entries = ARRAY_SIZE(mtl_pat_table); - } else if (xe->info.platform == XE_PVC || xe->info.platform == XE_DG2) { + } else if (xe->info.platform == XE_PVC) { xe->pat.ops = &dg2_pat_ops; xe->pat.table = pvc_pat_table; xe->pat.n_entries = ARRAY_SIZE(pvc_pat_table); + } else if (xe->info.platform == XE_DG2) { + /* + * Table is the same as previous platforms, but programming + * method has changed. + */ + xe->pat.ops = &dg2_pat_ops; + xe->pat.table = tgl_pat_table; + xe->pat.n_entries = ARRAY_SIZE(tgl_pat_table); } else if (GRAPHICS_VERx100(xe) <= 1210) { xe->pat.ops = &tgl_pat_ops; xe->pat.table = tgl_pat_table; -- 2.30.2