From 1ff65bf8ffc16e0a85728412a035f04247761a26 Mon Sep 17 00:00:00 2001
From: Imre Deak <imre.deak@intel.com>
Date: Wed, 17 Apr 2024 01:10:02 +0300
Subject: [PATCH] drm/i915/dp_mst: Fix BW limit check when calculating DSC DPT
bpp
The DSC DPT bpp limit check should only fail if the available DPT BW is
less than the required BW, fix the check accordingly.
Reviewed-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
Signed-off-by: Imre Deak <imre.deak@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20240416221010.376865-4-imre.deak@intel.com
---
drivers/gpu/drm/i915/display/intel_dp_mst.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/display/intel_dp_mst.c b/drivers/gpu/drm/i915/display/intel_dp_mst.c
index 196eeead8cf02..58eb6bf33c92e 100644
--- a/drivers/gpu/drm/i915/display/intel_dp_mst.c
+++ b/drivers/gpu/drm/i915/display/intel_dp_mst.c
@@ -60,7 +60,7 @@ static int intel_dp_mst_check_constraints(struct drm_i915_private *i915, int bpp
int output_bpp = bpp;
int symbol_clock = intel_dp_link_symbol_clock(crtc_state->port_clock);
- if (output_bpp * adjusted_mode->crtc_clock >=
+ if (output_bpp * adjusted_mode->crtc_clock >
symbol_clock * 72) {
drm_dbg_kms(&i915->drm, "UHBR check failed(required bw %d available %d)\n",
output_bpp * adjusted_mode->crtc_clock, symbol_clock * 72);
--
2.30.2