From 2278b16f12a9cc33b95a980e05d4d8f3f8e0abfa Mon Sep 17 00:00:00 2001 From: Luca Weiss Date: Fri, 29 Sep 2023 14:51:22 +0200 Subject: [PATCH] arm64: dts: qcom: sc7280: Add ports subnodes in usb/dp qmpphy node Add the USB3+DP Combo QMP PHY port subnodes to facilitate the description of the connection between the hardware blocks. Put it in the SoC DTSI to avoid duplication in the device DTs. Reviewed-by: Konrad Dybcio Signed-off-by: Luca Weiss Link: https://lore.kernel.org/r/20230929-sc7280-qmpphy-ports-v2-1-aae7e9c286b0@fairphone.com Signed-off-by: Bjorn Andersson --- arch/arm64/boot/dts/qcom/sc7280.dtsi | 26 ++++++++++++++++++++++++++ 1 file changed, 26 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sc7280.dtsi b/arch/arm64/boot/dts/qcom/sc7280.dtsi index 3585fa3c95945..871beba2ffcc4 100644 --- a/arch/arm64/boot/dts/qcom/sc7280.dtsi +++ b/arch/arm64/boot/dts/qcom/sc7280.dtsi @@ -3404,6 +3404,32 @@ #clock-cells = <1>; #phy-cells = <1>; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + + usb_dp_qmpphy_out: endpoint { + }; + }; + + port@1 { + reg = <1>; + + usb_dp_qmpphy_usb_ss_in: endpoint { + }; + }; + + port@2 { + reg = <2>; + + usb_dp_qmpphy_dp_in: endpoint { + }; + }; + }; }; usb_2: usb@8cf8800 { -- 2.30.2