From 22f38a2442730183289c28652b2c01264e66a563 Mon Sep 17 00:00:00 2001 From: Thippeswamy Havalige Date: Mon, 16 Oct 2023 10:41:00 +0530 Subject: [PATCH] dt-bindings: PCI: xilinx-nwl: Modify ECAM size in the DT example MIME-Version: 1.0 Content-Type: text/plain; charset=utf8 Content-Transfer-Encoding: 8bit Update ECAM size in the devicetree example to allow for the discovery of up to 256 buses. [kwilczynski: commit log] Link: https://lore.kernel.org/linux-pci/20231016051102.1180432-3-thippeswamy.havalige@amd.com Signed-off-by: Thippeswamy Havalige Signed-off-by: Krzysztof Wilczyński Acked-by: Rob Herring --- Documentation/devicetree/bindings/pci/xlnx,nwl-pcie.yaml | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/pci/xlnx,nwl-pcie.yaml b/Documentation/devicetree/bindings/pci/xlnx,nwl-pcie.yaml index 897602559b37b..426f90a47f355 100644 --- a/Documentation/devicetree/bindings/pci/xlnx,nwl-pcie.yaml +++ b/Documentation/devicetree/bindings/pci/xlnx,nwl-pcie.yaml @@ -118,7 +118,7 @@ examples: compatible = "xlnx,nwl-pcie-2.11"; reg = <0x0 0xfd0e0000 0x0 0x1000>, <0x0 0xfd480000 0x0 0x1000>, - <0x80 0x00000000 0x0 0x1000000>; + <0x80 0x00000000 0x0 0x10000000>; reg-names = "breg", "pcireg", "cfg"; ranges = <0x02000000 0x0 0xe0000000 0x0 0xe0000000 0x0 0x10000000>, <0x43000000 0x00000006 0x0 0x00000006 0x0 0x00000002 0x0>; -- 2.30.2