From 26f03ef816632945bec135f12a7f902b2de3a0c3 Mon Sep 17 00:00:00 2001 From: =?utf8?q?Ville=20Syrj=C3=A4l=C3=A4?= Date: Fri, 1 Sep 2023 16:04:39 +0300 Subject: [PATCH] drm/i915: Assert that VRR is off during vblank evasion if necessary MIME-Version: 1.0 Content-Type: text/plain; charset=utf8 Content-Transfer-Encoding: 8bit Whenever we change the actual transcoder timings (clock via seamless M/N, full modeset, (or soon) vtotal via LRR) we want the timing generator to be in non-VRR during the commit. Warn if we forgot to turn VRR off prior to vblank evasion. Cc: Manasi Navare Signed-off-by: Ville Syrjälä Link: https://patchwork.freedesktop.org/patch/msgid/20230901130440.2085-12-ville.syrjala@linux.intel.com Reviewed-by: Manasi Navare Reviewed-by: Mitul Golani --- drivers/gpu/drm/i915/display/intel_crtc.c | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/drivers/gpu/drm/i915/display/intel_crtc.c b/drivers/gpu/drm/i915/display/intel_crtc.c index a04076064f024..a39e31c1ca85a 100644 --- a/drivers/gpu/drm/i915/display/intel_crtc.c +++ b/drivers/gpu/drm/i915/display/intel_crtc.c @@ -493,6 +493,10 @@ static void intel_crtc_vblank_evade_scanlines(struct intel_atomic_state *state, adjusted_mode = &crtc_state->hw.adjusted_mode; if (crtc->mode_flags & I915_MODE_FLAG_VRR) { + /* timing changes should happen with VRR disabled */ + drm_WARN_ON(state->base.dev, intel_crtc_needs_modeset(new_crtc_state) || + new_crtc_state->update_m_n); + if (intel_vrr_is_push_sent(crtc_state)) *vblank_start = intel_vrr_vmin_vblank_start(crtc_state); else -- 2.30.2