From 2d667442dbe70e7e78c3450b17ba5aa5032a7b6b Mon Sep 17 00:00:00 2001 From: Gwan-gyeong Mun Date: Thu, 1 Apr 2021 20:02:37 +0300 Subject: [PATCH] drm/i915/display/psr: Disable DC3CO when the PSR2 is used MIME-Version: 1.0 Content-Type: text/plain; charset=utf8 Content-Transfer-Encoding: 8bit Due to the changed sequence of activating/deactivating DC3CO, disable DC3CO until the changed dc3co activating/deactivating sequence is applied. References: https://gitlab.freedesktop.org/drm/intel/-/issues/3134 Signed-off-by: Gwan-gyeong Mun Reviewed-by: José Roberto de Souza Signed-off-by: José Roberto de Souza Link: https://patchwork.freedesktop.org/patch/msgid/20210401170237.40472-1-gwan-gyeong.mun@intel.com --- drivers/gpu/drm/i915/display/intel_psr.c | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/drivers/gpu/drm/i915/display/intel_psr.c b/drivers/gpu/drm/i915/display/intel_psr.c index 1d561812fcad4..32d3d56259c2f 100644 --- a/drivers/gpu/drm/i915/display/intel_psr.c +++ b/drivers/gpu/drm/i915/display/intel_psr.c @@ -654,6 +654,13 @@ tgl_dc3co_exitline_compute_config(struct intel_dp *intel_dp, struct drm_i915_private *dev_priv = dp_to_i915(intel_dp); u32 exit_scanlines; + /* + * FIXME: Due to the changed sequence of activating/deactivating DC3CO, + * disable DC3CO until the changed dc3co activating/deactivating sequence + * is applied. B.Specs:49196 + */ + return; + /* * DMC's DC3CO exit mechanism has an issue with Selective Fecth * TODO: when the issue is addressed, this restriction should be removed. -- 2.30.2