From 2ec8afbc91faef6825548ae4e0ae3274a1a7b884 Mon Sep 17 00:00:00 2001 From: Jagan Teki Date: Tue, 29 Nov 2022 13:24:24 +0530 Subject: [PATCH] ARM: dts: rockchip: Add Edgeble Neural Compute Module 2(Neu2) IO board Neural Compute Module 2(Neu2) IO board is an industrial form factor evaluation board from Edgeble AI. General features: - microSD slot - MIPI DSI connector - 2x USB Host - 1x USB OTG - Ethernet - mini PCIe - Onboard PoE - RS485, RS232, CAN - Micro Phone array - Speaker - RTC battery slot - 40-pin expansion Neu2 needs to mount on top of this IO board in order to create complete Edgeble Neural Compute Module 2(Neu2) IO platform. Add support for it. Signed-off-by: Jagan Teki Link: https://lore.kernel.org/r/20221129075424.189655-9-jagan@edgeble.ai Signed-off-by: Heiko Stuebner --- arch/arm/boot/dts/Makefile | 1 + arch/arm/boot/dts/rv1126-edgeble-neu2-io.dts | 42 ++++++++++++++++++++ 2 files changed, 43 insertions(+) create mode 100644 arch/arm/boot/dts/rv1126-edgeble-neu2-io.dts diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile index d08a3c450ce72..a750a1ea2b380 100644 --- a/arch/arm/boot/dts/Makefile +++ b/arch/arm/boot/dts/Makefile @@ -1127,6 +1127,7 @@ dtb-$(CONFIG_ARCH_RENESAS) += \ dtb-$(CONFIG_ARCH_ROCKCHIP) += \ rv1108-elgin-r1.dtb \ rv1108-evb.dtb \ + rv1126-edgeble-neu2-io.dtb \ rk3036-evb.dtb \ rk3036-kylin.dtb \ rk3066a-bqcurie2.dtb \ diff --git a/arch/arm/boot/dts/rv1126-edgeble-neu2-io.dts b/arch/arm/boot/dts/rv1126-edgeble-neu2-io.dts new file mode 100644 index 0000000000000..dded0a12f0cdb --- /dev/null +++ b/arch/arm/boot/dts/rv1126-edgeble-neu2-io.dts @@ -0,0 +1,42 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Copyright (c) 2020 Rockchip Electronics Co., Ltd. + * Copyright (c) 2022 Edgeble AI Technologies Pvt. Ltd. + */ + +/dts-v1/; +#include "rv1126.dtsi" +#include "rv1126-edgeble-neu2.dtsi" + +/ { + model = "Edgeble Neu2 IO Board"; + compatible = "edgeble,neural-compute-module-2-io", + "edgeble,neural-compute-module-2", "rockchip,rv1126"; + + aliases { + serial2 = &uart2; + }; + + chosen { + stdout-path = "serial2:1500000n8"; + }; +}; + +&sdmmc { + bus-width = <4>; + cap-mmc-highspeed; + cap-sd-highspeed; + card-detect-delay = <200>; + pinctrl-names = "default"; + pinctrl-0 = <&sdmmc0_clk &sdmmc0_cmd &sdmmc0_bus4 &sdmmc0_det>; + rockchip,default-sample-phase = <90>; + sd-uhs-sdr12; + sd-uhs-sdr25; + sd-uhs-sdr104; + vqmmc-supply = <&vccio_sd>; + status = "okay"; +}; + +&uart2 { + status = "okay"; +}; -- 2.30.2