From 2f52e87499dd1644bc3ef6d5e8f817c0285aca4e Mon Sep 17 00:00:00 2001 From: Konrad Dybcio Date: Thu, 19 Jan 2023 11:16:43 +0100 Subject: [PATCH] arm64: dts: qcom: sm6115: Add mdss_ prefix to mdss nodes Add a mdss_ prefix to mdss nodes to keep them all near each other when referencing them by label in device DTs. Signed-off-by: Konrad Dybcio Signed-off-by: Bjorn Andersson Link: https://lore.kernel.org/r/20230119101644.10711-1-konrad.dybcio@linaro.org --- arch/arm64/boot/dts/qcom/sm6115.dtsi | 18 +++++++++--------- 1 file changed, 9 insertions(+), 9 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/sm6115.dtsi b/arch/arm64/boot/dts/qcom/sm6115.dtsi index 3eccfb8c16ce9..500f47d2efbde 100644 --- a/arch/arm64/boot/dts/qcom/sm6115.dtsi +++ b/arch/arm64/boot/dts/qcom/sm6115.dtsi @@ -1105,7 +1105,7 @@ port@0 { reg = <0>; dpu_intf1_out: endpoint { - remote-endpoint = <&dsi0_in>; + remote-endpoint = <&mdss_dsi0_in>; }; }; }; @@ -1140,7 +1140,7 @@ }; }; - dsi0: dsi@5e94000 { + mdss_dsi0: dsi@5e94000 { compatible = "qcom,dsi-ctrl-6g-qcm2290"; reg = <0x05e94000 0x400>; reg-names = "dsi_ctrl"; @@ -1163,11 +1163,11 @@ assigned-clocks = <&dispcc DISP_CC_MDSS_BYTE0_CLK_SRC>, <&dispcc DISP_CC_MDSS_PCLK0_CLK_SRC>; - assigned-clock-parents = <&dsi0_phy 0>, <&dsi0_phy 1>; + assigned-clock-parents = <&mdss_dsi0_phy 0>, <&mdss_dsi0_phy 1>; operating-points-v2 = <&dsi_opp_table>; power-domains = <&rpmpd SM6115_VDDCX>; - phys = <&dsi0_phy>; + phys = <&mdss_dsi0_phy>; #address-cells = <1>; #size-cells = <0>; @@ -1180,14 +1180,14 @@ port@0 { reg = <0>; - dsi0_in: endpoint { + mdss_dsi0_in: endpoint { remote-endpoint = <&dpu_intf1_out>; }; }; port@1 { reg = <1>; - dsi0_out: endpoint { + mdss_dsi0_out: endpoint { }; }; }; @@ -1212,7 +1212,7 @@ }; }; - dsi0_phy: phy@5e94400 { + mdss_dsi0_phy: phy@5e94400 { compatible = "qcom,dsi-phy-14nm-2290"; reg = <0x05e94400 0x100>, <0x05e94500 0x300>, @@ -1237,8 +1237,8 @@ reg = <0x05f00000 0x20000>; clocks = <&rpmcc RPM_SMD_XO_CLK_SRC>, <&sleep_clk>, - <&dsi0_phy 0>, - <&dsi0_phy 1>, + <&mdss_dsi0_phy 0>, + <&mdss_dsi0_phy 1>, <&gcc GCC_DISP_GPLL0_DIV_CLK_SRC>; #clock-cells = <1>; #reset-cells = <1>; -- 2.30.2