From 31e62e862a1ed8711fc973675c74848595422180 Mon Sep 17 00:00:00 2001 From: Brian Masney Date: Tue, 3 Jan 2023 13:22:24 -0500 Subject: [PATCH] arm64: dts: qcom: sc8280xp: rename qup0_i2c4 to i2c4 In preparation for adding the missing SPI and I2C nodes to sc8280xp.dtsi, it was decided to rename all of the existing qupX_ uart, spi, and i2c nodes to drop the qupX_ prefix. Let's go ahead and rename qup0_i2c4 to i2c4. Note that some nodes are moved in the file by this patch to preserve the expected sort order in the file. Additionally, the properties within the pinctrl state node are sorted to match the expected order that's typically done in other DTs. Signed-off-by: Brian Masney Link: https://lore.kernel.org/lkml/20221212182314.1902632-1-bmasney@redhat.com/ Reviewed-by: Konrad Dybcio Reviewed-by: Johan Hovold Tested-by: Steev Klimaszewski Signed-off-by: Bjorn Andersson Link: https://lore.kernel.org/r/20230103182229.37169-6-bmasney@redhat.com --- arch/arm64/boot/dts/qcom/sc8280xp-crd.dts | 57 +++++++++--------- .../qcom/sc8280xp-lenovo-thinkpad-x13s.dts | 58 +++++++++---------- arch/arm64/boot/dts/qcom/sc8280xp.dtsi | 2 +- 3 files changed, 58 insertions(+), 59 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/sc8280xp-crd.dts b/arch/arm64/boot/dts/qcom/sc8280xp-crd.dts index fbe9980e0c72b..99fb49ffbb733 100644 --- a/arch/arm64/boot/dts/qcom/sc8280xp-crd.dts +++ b/arch/arm64/boot/dts/qcom/sc8280xp-crd.dts @@ -301,6 +301,27 @@ status = "okay"; }; +&i2c4 { + clock-frequency = <400000>; + + pinctrl-names = "default"; + pinctrl-0 = <&i2c4_default>; + + status = "okay"; + + touchscreen@10 { + compatible = "hid-over-i2c"; + reg = <0x10>; + + hid-descr-addr = <0x1>; + interrupts-extended = <&tlmm 175 IRQ_TYPE_LEVEL_LOW>; + vdd-supply = <&vreg_misc_3p3>; + + pinctrl-names = "default"; + pinctrl-0 = <&ts0_default>; + }; +}; + &i2c21 { clock-frequency = <400000>; @@ -407,27 +428,6 @@ status = "okay"; }; -&qup0_i2c4 { - clock-frequency = <400000>; - - pinctrl-names = "default"; - pinctrl-0 = <&qup0_i2c4_default>; - - status = "okay"; - - touchscreen@10 { - compatible = "hid-over-i2c"; - reg = <0x10>; - - hid-descr-addr = <0x1>; - interrupts-extended = <&tlmm 175 IRQ_TYPE_LEVEL_LOW>; - vdd-supply = <&vreg_misc_3p3>; - - pinctrl-names = "default"; - pinctrl-0 = <&ts0_default>; - }; -}; - &qup1 { status = "okay"; }; @@ -574,6 +574,13 @@ bias-disable; }; + i2c4_default: i2c4-default-state { + pins = "gpio171", "gpio172"; + function = "qup4"; + drive-strength = <16>; + bias-disable; + }; + i2c21_default: i2c21-default-state { pins = "gpio81", "gpio82"; function = "qup21"; @@ -677,14 +684,6 @@ }; }; - qup0_i2c4_default: qup0-i2c4-default-state { - pins = "gpio171", "gpio172"; - function = "qup4"; - - bias-disable; - drive-strength = <16>; - }; - tpad_default: tpad-default-state { int-n-pins { pins = "gpio182"; diff --git a/arch/arm64/boot/dts/qcom/sc8280xp-lenovo-thinkpad-x13s.dts b/arch/arm64/boot/dts/qcom/sc8280xp-lenovo-thinkpad-x13s.dts index 54e0d90235644..811945283be67 100644 --- a/arch/arm64/boot/dts/qcom/sc8280xp-lenovo-thinkpad-x13s.dts +++ b/arch/arm64/boot/dts/qcom/sc8280xp-lenovo-thinkpad-x13s.dts @@ -413,6 +413,28 @@ status = "okay"; }; +&i2c4 { + clock-frequency = <400000>; + + pinctrl-names = "default"; + pinctrl-0 = <&i2c4_default>; + + status = "okay"; + + /* FIXME: verify */ + touchscreen@10 { + compatible = "hid-over-i2c"; + reg = <0x10>; + + hid-descr-addr = <0x1>; + interrupts-extended = <&tlmm 175 IRQ_TYPE_LEVEL_LOW>; + vdd-supply = <&vreg_misc_3p3>; + + pinctrl-names = "default"; + pinctrl-0 = <&ts0_default>; + }; +}; + &i2c21 { clock-frequency = <400000>; @@ -685,28 +707,6 @@ status = "okay"; }; -&qup0_i2c4 { - clock-frequency = <400000>; - - pinctrl-names = "default"; - pinctrl-0 = <&qup0_i2c4_default>; - - status = "okay"; - - /* FIXME: verify */ - touchscreen@10 { - compatible = "hid-over-i2c"; - reg = <0x10>; - - hid-descr-addr = <0x1>; - interrupts-extended = <&tlmm 175 IRQ_TYPE_LEVEL_LOW>; - vdd-supply = <&vreg_misc_3p3>; - - pinctrl-names = "default"; - pinctrl-0 = <&ts0_default>; - }; -}; - &qup1 { status = "okay"; }; @@ -989,6 +989,13 @@ bias-disable; }; + i2c4_default: i2c4-default-state { + pins = "gpio171", "gpio172"; + function = "qup4"; + drive-strength = <16>; + bias-disable; + }; + i2c21_default: i2c21-default-state { pins = "gpio81", "gpio82"; function = "qup21"; @@ -1092,13 +1099,6 @@ }; }; - qup0_i2c4_default: qup0-i2c4-default-state { - pins = "gpio171", "gpio172"; - function = "qup4"; - bias-disable; - drive-strength = <16>; - }; - spkr_1_sd_n_default: spkr-1-sd-n-default-state { perst-n-pins { pins = "gpio178"; diff --git a/arch/arm64/boot/dts/qcom/sc8280xp.dtsi b/arch/arm64/boot/dts/qcom/sc8280xp.dtsi index 877b3d1c6613e..1f99992b15b5a 100644 --- a/arch/arm64/boot/dts/qcom/sc8280xp.dtsi +++ b/arch/arm64/boot/dts/qcom/sc8280xp.dtsi @@ -871,7 +871,7 @@ status = "disabled"; - qup0_i2c4: i2c@990000 { + i2c4: i2c@990000 { compatible = "qcom,geni-i2c"; reg = <0 0x00990000 0 0x4000>; clock-names = "se"; -- 2.30.2