From 38abcb0d68767ac64e5650cbf7daafb428002590 Mon Sep 17 00:00:00 2001 From: =?utf8?q?Jonathan=20Neusch=C3=A4fer?= Date: Sat, 5 Nov 2022 19:59:08 +0100 Subject: [PATCH] ARM: dts: wpcm450: Add FIU SPI controller node MIME-Version: 1.0 Content-Type: text/plain; charset=utf8 Content-Transfer-Encoding: 8bit Add the SPI controller (FIU, Flash Interface Unit) to the WPCM450 devicetree, according to the newly defined binding, as well as the SHM (shared memory interface) syscon. Signed-off-by: Jonathan Neuschäfer Link: https://lore.kernel.org/r/20221105185911.1547847-6-j.neuschaefer@gmx.net Signed-off-by: Joel Stanley --- arch/arm/boot/dts/nuvoton-wpcm450.dtsi | 16 ++++++++++++++++ 1 file changed, 16 insertions(+) diff --git a/arch/arm/boot/dts/nuvoton-wpcm450.dtsi b/arch/arm/boot/dts/nuvoton-wpcm450.dtsi index 93595850a4c3c..0adf0a7a6a7f2 100644 --- a/arch/arm/boot/dts/nuvoton-wpcm450.dtsi +++ b/arch/arm/boot/dts/nuvoton-wpcm450.dtsi @@ -456,5 +456,21 @@ function = "hg7"; }; }; + + fiu: spi-controller@c8000000 { + compatible = "nuvoton,wpcm450-fiu"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0xc8000000 0x1000>, <0xc0000000 0x4000000>; + reg-names = "control", "memory"; + clocks = <&clk 0>; + status = "disabled"; + }; + + shm: syscon@c8001000 { + compatible = "nuvoton,wpcm450-shm", "syscon"; + reg = <0xc8001000 0x1000>; + reg-io-width = <1>; + }; }; }; -- 2.30.2