From 3a64e95e1a64a2d4c63c4df28b61cd3cbb63cd92 Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Wed, 13 Mar 2024 20:11:48 +0100 Subject: [PATCH] ARM: dts: samsung: s5pv210: correct onenand size-cells Children of NAND controllers have only chip select, so address without the size. Correct size-cells as reported by dtbs_check: s5pv210-galaxys.dtb: onenand@b0600000: #size-cells:0:0: 0 was expected Link: https://lore.kernel.org/r/20240313191148.21792-2-krzysztof.kozlowski@linaro.org Signed-off-by: Krzysztof Kozlowski --- arch/arm/boot/dts/samsung/s5pv210.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm/boot/dts/samsung/s5pv210.dtsi b/arch/arm/boot/dts/samsung/s5pv210.dtsi index 23459430410fe..9720573d84dcb 100644 --- a/arch/arm/boot/dts/samsung/s5pv210.dtsi +++ b/arch/arm/boot/dts/samsung/s5pv210.dtsi @@ -82,7 +82,7 @@ clocks = <&clocks CLK_NANDXL>, <&clocks DOUT_FLASH>; clock-names = "bus", "onenand"; #address-cells = <1>; - #size-cells = <1>; + #size-cells = <0>; status = "disabled"; }; -- 2.30.2