From 3db8732c55c0109ea3a9ff9cadc10871eaba058c Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Wed, 28 Dec 2022 15:09:15 +0100 Subject: [PATCH] dt-bindings: clock: qcom,gcc-sm8350: drop core_bi_pll_test_se input Drop unused core_bi_pll_test_se clock input to the clock controller. Signed-off-by: Krzysztof Kozlowski Signed-off-by: Bjorn Andersson Link: https://lore.kernel.org/r/20221228140917.118861-1-krzysztof.kozlowski@linaro.org --- Documentation/devicetree/bindings/clock/qcom,gcc-sm8350.yaml | 2 -- 1 file changed, 2 deletions(-) diff --git a/Documentation/devicetree/bindings/clock/qcom,gcc-sm8350.yaml b/Documentation/devicetree/bindings/clock/qcom,gcc-sm8350.yaml index 703d9e075247e..b4fdde71ef18d 100644 --- a/Documentation/devicetree/bindings/clock/qcom,gcc-sm8350.yaml +++ b/Documentation/devicetree/bindings/clock/qcom,gcc-sm8350.yaml @@ -23,7 +23,6 @@ properties: items: - description: Board XO source - description: Sleep clock source - - description: PLL test clock source (Optional clock) - description: PCIE 0 Pipe clock source (Optional clock) - description: PCIE 1 Pipe clock source (Optional clock) - description: UFS card Rx symbol 0 clock source (Optional clock) @@ -40,7 +39,6 @@ properties: items: - const: bi_tcxo - const: sleep_clk - - const: core_bi_pll_test_se # Optional clock - const: pcie_0_pipe_clk # Optional clock - const: pcie_1_pipe_clk # Optional clock - const: ufs_card_rx_symbol_0_clk # Optional clock -- 2.30.2