From 3e73d3df4d3861265367b4df6dd7fc5789e05d3c Mon Sep 17 00:00:00 2001 From: Geert Uytterhoeven Date: Mon, 23 Jan 2023 19:56:11 +0100 Subject: [PATCH] can: rcar_canfd: Fix R-Car Gen4 CFCC.CFTML field width On R-Car Gen4 CAN_FD variants, the Common FIFO TX Message Buffer Link (CFTML) field in the Common FIFO Configuration / Control Register (CCFC) register is one bit wider than on older variants. Signed-off-by: Geert Uytterhoeven Link: https://lore.kernel.org/all/9c37aaa799a2391be272dbaa474379cf9a7af147.1674499048.git.geert+renesas@glider.be Signed-off-by: Marc Kleine-Budde --- drivers/net/can/rcar/rcar_canfd.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/drivers/net/can/rcar/rcar_canfd.c b/drivers/net/can/rcar/rcar_canfd.c index ee7bbd9d11512..376a5d606acc6 100644 --- a/drivers/net/can/rcar/rcar_canfd.c +++ b/drivers/net/can/rcar/rcar_canfd.c @@ -233,7 +233,8 @@ /* Common FIFO bits */ /* RSCFDnCFDCFCCk */ -#define RCANFD_CFCC_CFTML(gpriv, x) (((x) & 0xf) << reg_gen4(gpriv, 16, 20)) +#define RCANFD_CFCC_CFTML(gpriv, x) \ + (((x) & reg_gen4(gpriv, 0x1f, 0xf)) << reg_gen4(gpriv, 16, 20)) #define RCANFD_CFCC_CFM(gpriv, x) (((x) & 0x3) << reg_gen4(gpriv, 8, 16)) #define RCANFD_CFCC_CFIM BIT(12) #define RCANFD_CFCC_CFDC(gpriv, x) (((x) & 0x7) << reg_gen4(gpriv, 21, 8)) -- 2.30.2