From 3f7a4d084159c52513d1ff77f3b3b880bcf517d9 Mon Sep 17 00:00:00 2001 From: Geert Uytterhoeven Date: Wed, 28 Jun 2017 21:15:49 +0200 Subject: [PATCH] clk: renesas: rcar-gen3: Restore R clock during resume MIME-Version: 1.0 Content-Type: text/plain; charset=utf8 Content-Transfer-Encoding: 8bit On R-Car Gen3 systems, PSCI system suspend powers down the SoC, losing clock configuration. Register a notifier to save/restore the RCKCR register during system suspend/resume. Signed-off-by: Geert Uytterhoeven Tested-by: Niklas Söderlund --- drivers/clk/renesas/rcar-gen3-cpg.c | 13 +++++++++++-- 1 file changed, 11 insertions(+), 2 deletions(-) diff --git a/drivers/clk/renesas/rcar-gen3-cpg.c b/drivers/clk/renesas/rcar-gen3-cpg.c index 267b5629e3bdb..0904886f55015 100644 --- a/drivers/clk/renesas/rcar-gen3-cpg.c +++ b/drivers/clk/renesas/rcar-gen3-cpg.c @@ -373,18 +373,27 @@ struct clk * __init rcar_gen3_cpg_clk_register(struct device *dev, case CLK_TYPE_GEN3_R: if (cpg_quirks & RCKCR_CKSEL) { + struct cpg_simple_notifier *csn; + + csn = kzalloc(sizeof(*csn), GFP_KERNEL); + if (!csn) + return ERR_PTR(-ENOMEM); + + csn->reg = base + CPG_RCKCR; + /* * RINT is default. * Only if EXTALR is populated, we switch to it. */ - value = readl(base + CPG_RCKCR) & 0x3f; + value = readl(csn->reg) & 0x3f; if (clk_get_rate(clks[cpg_clk_extalr])) { parent = clks[cpg_clk_extalr]; value |= BIT(15); } - writel(value, base + CPG_RCKCR); + writel(value, csn->reg); + cpg_simple_notifier_register(notifiers, csn); break; } -- 2.30.2