From 41ccb6623711da26c5e6b34f3e05e271857bebb4 Mon Sep 17 00:00:00 2001 From: Tony Lindgren Date: Wed, 10 Mar 2021 14:04:56 +0200 Subject: [PATCH] ARM: dts: Configure interconnect target module for omap5 sata We can now probe devices with device tree only configuration using ti-sysc interconnect target module driver. Let's configure the module, but keep the legacy "ti,hwmods" peroperty to avoid new boot time warnings. The legacy property will be removed in later patches together with the legacy platform data. Note that the old sysc register offset is wrong, the real offset is at 0x1100 as listed in TRM for SATA_SYSCONFIG register. Looks like we've been happily using sata on the bootloader configured sysconfig register and nobody noticed. Also the old register range for SATAMAC_wrapper registers is wrong at 7 while it should be 8. But that too seems harmless. There is also an L3 parent interconnect range that we don't seem to be using. That can be added as needed later on. Signed-off-by: Tony Lindgren --- arch/arm/boot/dts/omap5-l4.dtsi | 28 +++++++++++++++++++++++++--- arch/arm/boot/dts/omap5.dtsi | 12 ------------ 2 files changed, 25 insertions(+), 15 deletions(-) diff --git a/arch/arm/boot/dts/omap5-l4.dtsi b/arch/arm/boot/dts/omap5-l4.dtsi index 887b3359dd5a1..b4b6adea4f45d 100644 --- a/arch/arm/boot/dts/omap5-l4.dtsi +++ b/arch/arm/boot/dts/omap5-l4.dtsi @@ -691,11 +691,33 @@ }; target-module@40000 { /* 0x4a140000, ap 101 16.0 */ - compatible = "ti,sysc"; - status = "disabled"; - #address-cells = <1>; + compatible = "ti,sysc-omap4", "ti,sysc"; + reg = <0x400fc 4>, + <0x41100 4>; + reg-names = "rev", "sysc"; + ti,sysc-midle = , + , + ; + ti,sysc-sidle = , + , + , + ; + power-domains = <&prm_l3init>; + clocks = <&l3init_clkctrl OMAP5_SATA_CLKCTRL 0>; + clock-names = "fck"; #size-cells = <1>; + #address-cells = <1>; ranges = <0x0 0x40000 0x10000>; + + sata: sata@0 { + compatible = "snps,dwc-ahci"; + reg = <0 0x1100>, <0x1100 0x8>; + interrupts = ; + phys = <&sata_phy>; + phy-names = "sata-phy"; + clocks = <&l3init_clkctrl OMAP5_SATA_CLKCTRL 8>; + ports-implemented = <0x1>; + }; }; }; diff --git a/arch/arm/boot/dts/omap5.dtsi b/arch/arm/boot/dts/omap5.dtsi index 5beab4964d5b4..f4132dfae814d 100644 --- a/arch/arm/boot/dts/omap5.dtsi +++ b/arch/arm/boot/dts/omap5.dtsi @@ -428,18 +428,6 @@ #thermal-sensor-cells = <1>; }; - /* OCP2SCP3 */ - sata: sata@4a141100 { - compatible = "snps,dwc-ahci"; - reg = <0x4a140000 0x1100>, <0x4a141100 0x7>; - interrupts = ; - phys = <&sata_phy>; - phy-names = "sata-phy"; - clocks = <&l3init_clkctrl OMAP5_SATA_CLKCTRL 8>; - ti,hwmods = "sata"; - ports-implemented = <0x1>; - }; - target-module@56000000 { compatible = "ti,sysc-omap4", "ti,sysc"; reg = <0x5600fe00 0x4>, -- 2.30.2