From 42e3f188b238b7fb1c42dee8b4dc4107cbb321e2 Mon Sep 17 00:00:00 2001 From: =?utf8?q?Andr=C3=A9=20Draszik?= Date: Tue, 30 Apr 2024 10:49:47 +0100 Subject: [PATCH] arm64: dts: exynos: gs101: specify bus clock for pinctrl_peric[01] MIME-Version: 1.0 Content-Type: text/plain; charset=utf8 Content-Transfer-Encoding: 8bit This bus clock is needed for pinctrl register access to work. Add it. Signed-off-by: André Draszik Reviewed-by: Tudor Ambarus Link: https://lore.kernel.org/r/20240430-samsung-pinctrl-busclock-dts-v2-2-14fc988139dd@linaro.org Signed-off-by: Krzysztof Kozlowski --- arch/arm64/boot/dts/exynos/google/gs101.dtsi | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/arch/arm64/boot/dts/exynos/google/gs101.dtsi b/arch/arm64/boot/dts/exynos/google/gs101.dtsi index 09f6b33cf5b46..878e05a865a05 100644 --- a/arch/arm64/boot/dts/exynos/google/gs101.dtsi +++ b/arch/arm64/boot/dts/exynos/google/gs101.dtsi @@ -370,6 +370,8 @@ pinctrl_peric0: pinctrl@10840000 { compatible = "google,gs101-pinctrl"; reg = <0x10840000 0x00001000>; + clocks = <&cmu_peric0 CLK_GOUT_PERIC0_GPIO_PERIC0_PCLK>; + clock-names = "pclk"; interrupts = ; }; @@ -914,6 +916,8 @@ pinctrl_peric1: pinctrl@10c40000 { compatible = "google,gs101-pinctrl"; reg = <0x10c40000 0x00001000>; + clocks = <&cmu_peric1 CLK_GOUT_PERIC1_GPIO_PERIC1_PCLK>; + clock-names = "pclk"; interrupts = ; }; -- 2.30.2