From 486b2ef2768222bb4210709ccf5443c3e381346e Mon Sep 17 00:00:00 2001 From: Matt Roper Date: Tue, 22 Aug 2023 17:33:14 -0700 Subject: [PATCH] drm/xe: Drop xe_mmio_write64() MIME-Version: 1.0 Content-Type: text/plain; charset=utf8 Content-Transfer-Encoding: 8bit The only possible 64-bit register writes in the driver come from the highly questionable MMIO ioctl. That ioctl's register write support only operates for userspace running as root and cannot be used by any real userspace; it exists solely to support the "xe_reg" debug tool in IGT. Since the spec indicates that hardware does not officially support 64-bit register accesses, there's no reason to allow such 64-bit writes, even for debugging. Bspec: 60027 Reviewed-by: Lucas De Marchi Reviewed-by: José Roberto de Souza Link: https://lore.kernel.org/r/20230823003312.1356779-4-matthew.d.roper@intel.com Signed-off-by: Matt Roper Signed-off-by: Rodrigo Vivi --- drivers/gpu/drm/xe/xe_mmio.c | 3 --- drivers/gpu/drm/xe/xe_mmio.h | 11 ----------- 2 files changed, 14 deletions(-) diff --git a/drivers/gpu/drm/xe/xe_mmio.c b/drivers/gpu/drm/xe/xe_mmio.c index c2ec52eefb2e4..3ccc0af4430be 100644 --- a/drivers/gpu/drm/xe/xe_mmio.c +++ b/drivers/gpu/drm/xe/xe_mmio.c @@ -490,9 +490,6 @@ int xe_mmio_ioctl(struct drm_device *dev, void *data, } xe_mmio_write32(gt, reg, args->value); break; - case DRM_XE_MMIO_64BIT: - xe_mmio_write64(gt, reg, args->value); - break; default: drm_dbg(&xe->drm, "Invalid MMIO bit size"); fallthrough; diff --git a/drivers/gpu/drm/xe/xe_mmio.h b/drivers/gpu/drm/xe/xe_mmio.h index f72c34c7d1d08..cd9fe08ccf4ad 100644 --- a/drivers/gpu/drm/xe/xe_mmio.h +++ b/drivers/gpu/drm/xe/xe_mmio.h @@ -75,17 +75,6 @@ static inline u32 xe_mmio_rmw32(struct xe_gt *gt, struct xe_reg reg, u32 clr, return old; } -static inline void xe_mmio_write64(struct xe_gt *gt, - struct xe_reg reg, u64 val) -{ - struct xe_tile *tile = gt_to_tile(gt); - - if (reg.addr < gt->mmio.adj_limit) - reg.addr += gt->mmio.adj_offset; - - writeq(val, tile->mmio.regs + reg.addr); -} - static inline int xe_mmio_write32_and_verify(struct xe_gt *gt, struct xe_reg reg, u32 val, u32 mask, u32 eval) -- 2.30.2