From 49ddaa495f8b60c8c4022ebe540024dd870e4dd1 Mon Sep 17 00:00:00 2001 From: "Jason-JH.Lin" Date: Thu, 7 Mar 2024 09:34:55 +0800 Subject: [PATCH] soc: mediatek: mtk-cmdq: Add specific purpose register definitions for GCE Add specific purpose register definitions for GCE, so CMDQ users can use them as a buffer to store data. Signed-off-by: Jason-JH.Lin Reviewed-by: AngeloGioacchino Del Regno Link: https://lore.kernel.org/r/20240307013458.23550-2-jason-jh.lin@mediatek.com Signed-off-by: AngeloGioacchino Del Regno --- include/linux/soc/mediatek/mtk-cmdq.h | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/include/linux/soc/mediatek/mtk-cmdq.h b/include/linux/soc/mediatek/mtk-cmdq.h index e5335fb22a3b4..042c61f29dc1b 100644 --- a/include/linux/soc/mediatek/mtk-cmdq.h +++ b/include/linux/soc/mediatek/mtk-cmdq.h @@ -14,6 +14,15 @@ #define CMDQ_ADDR_HIGH(addr) ((u32)(((addr) >> 16) & GENMASK(31, 0))) #define CMDQ_ADDR_LOW(addr) ((u16)(addr) | BIT(1)) +/* + * Every cmdq thread has its own SPRs (Specific Purpose Registers), + * so there are 4 * N (threads) SPRs in GCE that shares the same indexes below. + */ +#define CMDQ_THR_SPR_IDX0 (0) +#define CMDQ_THR_SPR_IDX1 (1) +#define CMDQ_THR_SPR_IDX2 (2) +#define CMDQ_THR_SPR_IDX3 (3) + struct cmdq_pkt; struct cmdq_client_reg { -- 2.30.2